1 | // SPDX-License-Identifier: MIT |
2 | /* |
3 | * Copyright © 2020 Intel Corporation |
4 | */ |
5 | |
6 | #include <linux/string_helpers.h> |
7 | |
8 | #include <drm/drm_debugfs.h> |
9 | #include <drm/drm_edid.h> |
10 | #include <drm/drm_fourcc.h> |
11 | |
12 | #include "hsw_ips.h" |
13 | #include "i915_debugfs.h" |
14 | #include "i915_irq.h" |
15 | #include "i915_reg.h" |
16 | #include "intel_crtc.h" |
17 | #include "intel_de.h" |
18 | #include "intel_crtc_state_dump.h" |
19 | #include "intel_display_debugfs.h" |
20 | #include "intel_display_debugfs_params.h" |
21 | #include "intel_display_power.h" |
22 | #include "intel_display_power_well.h" |
23 | #include "intel_display_types.h" |
24 | #include "intel_dmc.h" |
25 | #include "intel_dp.h" |
26 | #include "intel_dp_mst.h" |
27 | #include "intel_drrs.h" |
28 | #include "intel_fbc.h" |
29 | #include "intel_fbdev.h" |
30 | #include "intel_hdcp.h" |
31 | #include "intel_hdmi.h" |
32 | #include "intel_hotplug.h" |
33 | #include "intel_panel.h" |
34 | #include "intel_psr.h" |
35 | #include "intel_psr_regs.h" |
36 | #include "intel_wm.h" |
37 | |
38 | static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node) |
39 | { |
40 | return to_i915(dev: node->minor->dev); |
41 | } |
42 | |
43 | static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) |
44 | { |
45 | struct drm_i915_private *dev_priv = node_to_i915(node: m->private); |
46 | |
47 | spin_lock(lock: &dev_priv->display.fb_tracking.lock); |
48 | |
49 | seq_printf(m, fmt: "FB tracking busy bits: 0x%08x\n" , |
50 | dev_priv->display.fb_tracking.busy_bits); |
51 | |
52 | seq_printf(m, fmt: "FB tracking flip bits: 0x%08x\n" , |
53 | dev_priv->display.fb_tracking.flip_bits); |
54 | |
55 | spin_unlock(lock: &dev_priv->display.fb_tracking.lock); |
56 | |
57 | return 0; |
58 | } |
59 | |
60 | static int i915_sr_status(struct seq_file *m, void *unused) |
61 | { |
62 | struct drm_i915_private *dev_priv = node_to_i915(node: m->private); |
63 | intel_wakeref_t wakeref; |
64 | bool sr_enabled = false; |
65 | |
66 | wakeref = intel_display_power_get(dev_priv, domain: POWER_DOMAIN_INIT); |
67 | |
68 | if (DISPLAY_VER(dev_priv) >= 9) |
69 | /* no global SR status; inspect per-plane WM */; |
70 | else if (HAS_PCH_SPLIT(dev_priv)) |
71 | sr_enabled = intel_de_read(i915: dev_priv, WM1_LP_ILK) & WM_LP_ENABLE; |
72 | else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) || |
73 | IS_I945G(dev_priv) || IS_I945GM(dev_priv)) |
74 | sr_enabled = intel_de_read(i915: dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN; |
75 | else if (IS_I915GM(dev_priv)) |
76 | sr_enabled = intel_de_read(i915: dev_priv, INSTPM) & INSTPM_SELF_EN; |
77 | else if (IS_PINEVIEW(dev_priv)) |
78 | sr_enabled = intel_de_read(i915: dev_priv, DSPFW3) & PINEVIEW_SELF_REFRESH_EN; |
79 | else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) |
80 | sr_enabled = intel_de_read(i915: dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; |
81 | |
82 | intel_display_power_put(dev_priv, domain: POWER_DOMAIN_INIT, wakeref); |
83 | |
84 | seq_printf(m, fmt: "self-refresh: %s\n" , str_enabled_disabled(v: sr_enabled)); |
85 | |
86 | return 0; |
87 | } |
88 | |
89 | static int i915_gem_framebuffer_info(struct seq_file *m, void *data) |
90 | { |
91 | struct drm_i915_private *dev_priv = node_to_i915(node: m->private); |
92 | struct intel_framebuffer *fbdev_fb = NULL; |
93 | struct drm_framebuffer *drm_fb; |
94 | |
95 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
96 | fbdev_fb = intel_fbdev_framebuffer(fbdev: dev_priv->display.fbdev.fbdev); |
97 | if (fbdev_fb) { |
98 | seq_printf(m, fmt: "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj " , |
99 | fbdev_fb->base.width, |
100 | fbdev_fb->base.height, |
101 | fbdev_fb->base.format->depth, |
102 | fbdev_fb->base.format->cpp[0] * 8, |
103 | fbdev_fb->base.modifier, |
104 | drm_framebuffer_read_refcount(fb: &fbdev_fb->base)); |
105 | i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base)); |
106 | seq_putc(m, c: '\n'); |
107 | } |
108 | #endif |
109 | |
110 | mutex_lock(&dev_priv->drm.mode_config.fb_lock); |
111 | drm_for_each_fb(drm_fb, &dev_priv->drm) { |
112 | struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); |
113 | if (fb == fbdev_fb) |
114 | continue; |
115 | |
116 | seq_printf(m, fmt: "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj " , |
117 | fb->base.width, |
118 | fb->base.height, |
119 | fb->base.format->depth, |
120 | fb->base.format->cpp[0] * 8, |
121 | fb->base.modifier, |
122 | drm_framebuffer_read_refcount(fb: &fb->base)); |
123 | i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base)); |
124 | seq_putc(m, c: '\n'); |
125 | } |
126 | mutex_unlock(lock: &dev_priv->drm.mode_config.fb_lock); |
127 | |
128 | return 0; |
129 | } |
130 | |
131 | static int i915_power_domain_info(struct seq_file *m, void *unused) |
132 | { |
133 | struct drm_i915_private *i915 = node_to_i915(node: m->private); |
134 | |
135 | intel_display_power_debug(i915, m); |
136 | |
137 | return 0; |
138 | } |
139 | |
140 | static void intel_seq_print_mode(struct seq_file *m, int tabs, |
141 | const struct drm_display_mode *mode) |
142 | { |
143 | int i; |
144 | |
145 | for (i = 0; i < tabs; i++) |
146 | seq_putc(m, c: '\t'); |
147 | |
148 | seq_printf(m, DRM_MODE_FMT "\n" , DRM_MODE_ARG(mode)); |
149 | } |
150 | |
151 | static void intel_encoder_info(struct seq_file *m, |
152 | struct intel_crtc *crtc, |
153 | struct intel_encoder *encoder) |
154 | { |
155 | struct drm_i915_private *dev_priv = node_to_i915(node: m->private); |
156 | struct drm_connector_list_iter conn_iter; |
157 | struct drm_connector *connector; |
158 | |
159 | seq_printf(m, fmt: "\t[ENCODER:%d:%s]: connectors:\n" , |
160 | encoder->base.base.id, encoder->base.name); |
161 | |
162 | drm_connector_list_iter_begin(dev: &dev_priv->drm, iter: &conn_iter); |
163 | drm_for_each_connector_iter(connector, &conn_iter) { |
164 | const struct drm_connector_state *conn_state = |
165 | connector->state; |
166 | |
167 | if (conn_state->best_encoder != &encoder->base) |
168 | continue; |
169 | |
170 | seq_printf(m, fmt: "\t\t[CONNECTOR:%d:%s]\n" , |
171 | connector->base.id, connector->name); |
172 | } |
173 | drm_connector_list_iter_end(iter: &conn_iter); |
174 | } |
175 | |
176 | static void intel_panel_info(struct seq_file *m, |
177 | struct intel_connector *connector) |
178 | { |
179 | const struct drm_display_mode *fixed_mode; |
180 | |
181 | if (list_empty(head: &connector->panel.fixed_modes)) |
182 | return; |
183 | |
184 | seq_puts(m, s: "\tfixed modes:\n" ); |
185 | |
186 | list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) |
187 | intel_seq_print_mode(m, tabs: 2, mode: fixed_mode); |
188 | } |
189 | |
190 | static void intel_hdcp_info(struct seq_file *m, |
191 | struct intel_connector *intel_connector, |
192 | bool remote_req) |
193 | { |
194 | bool hdcp_cap, hdcp2_cap; |
195 | |
196 | if (!intel_connector->hdcp.shim) { |
197 | seq_puts(m, s: "No Connector Support" ); |
198 | goto out; |
199 | } |
200 | |
201 | if (remote_req) { |
202 | intel_hdcp_get_remote_capability(connector: intel_connector, |
203 | hdcp_capable: &hdcp_cap, |
204 | hdcp2_capable: &hdcp2_cap); |
205 | } else { |
206 | hdcp_cap = intel_hdcp_get_capability(connector: intel_connector); |
207 | hdcp2_cap = intel_hdcp2_get_capability(connector: intel_connector); |
208 | } |
209 | |
210 | if (hdcp_cap) |
211 | seq_puts(m, s: "HDCP1.4 " ); |
212 | if (hdcp2_cap) |
213 | seq_puts(m, s: "HDCP2.2 " ); |
214 | |
215 | if (!hdcp_cap && !hdcp2_cap) |
216 | seq_puts(m, s: "None" ); |
217 | |
218 | out: |
219 | seq_puts(m, s: "\n" ); |
220 | } |
221 | |
222 | static void intel_dp_info(struct seq_file *m, struct intel_connector *connector) |
223 | { |
224 | struct intel_encoder *intel_encoder = intel_attached_encoder(connector); |
225 | struct intel_dp *intel_dp = enc_to_intel_dp(encoder: intel_encoder); |
226 | |
227 | seq_printf(m, fmt: "\tDPCD rev: %x\n" , intel_dp->dpcd[DP_DPCD_REV]); |
228 | seq_printf(m, fmt: "\taudio support: %s\n" , |
229 | str_yes_no(v: connector->base.display_info.has_audio)); |
230 | |
231 | drm_dp_downstream_debug(m, dpcd: intel_dp->dpcd, port_cap: intel_dp->downstream_ports, |
232 | drm_edid: connector->detect_edid, aux: &intel_dp->aux); |
233 | } |
234 | |
235 | static void intel_dp_mst_info(struct seq_file *m, |
236 | struct intel_connector *connector) |
237 | { |
238 | bool has_audio = connector->base.display_info.has_audio; |
239 | |
240 | seq_printf(m, fmt: "\taudio support: %s\n" , str_yes_no(v: has_audio)); |
241 | } |
242 | |
243 | static void intel_hdmi_info(struct seq_file *m, |
244 | struct intel_connector *connector) |
245 | { |
246 | bool has_audio = connector->base.display_info.has_audio; |
247 | |
248 | seq_printf(m, fmt: "\taudio support: %s\n" , str_yes_no(v: has_audio)); |
249 | } |
250 | |
251 | static void intel_connector_info(struct seq_file *m, |
252 | struct drm_connector *connector) |
253 | { |
254 | struct intel_connector *intel_connector = to_intel_connector(connector); |
255 | const struct drm_connector_state *conn_state = connector->state; |
256 | struct intel_encoder *encoder = |
257 | to_intel_encoder(conn_state->best_encoder); |
258 | const struct drm_display_mode *mode; |
259 | |
260 | seq_printf(m, fmt: "[CONNECTOR:%d:%s]: status: %s\n" , |
261 | connector->base.id, connector->name, |
262 | drm_get_connector_status_name(status: connector->status)); |
263 | |
264 | if (connector->status == connector_status_disconnected) |
265 | return; |
266 | |
267 | seq_printf(m, fmt: "\tphysical dimensions: %dx%dmm\n" , |
268 | connector->display_info.width_mm, |
269 | connector->display_info.height_mm); |
270 | seq_printf(m, fmt: "\tsubpixel order: %s\n" , |
271 | drm_get_subpixel_order_name(order: connector->display_info.subpixel_order)); |
272 | seq_printf(m, fmt: "\tCEA rev: %d\n" , connector->display_info.cea_rev); |
273 | |
274 | if (!encoder) |
275 | return; |
276 | |
277 | switch (connector->connector_type) { |
278 | case DRM_MODE_CONNECTOR_DisplayPort: |
279 | case DRM_MODE_CONNECTOR_eDP: |
280 | if (encoder->type == INTEL_OUTPUT_DP_MST) |
281 | intel_dp_mst_info(m, connector: intel_connector); |
282 | else |
283 | intel_dp_info(m, connector: intel_connector); |
284 | break; |
285 | case DRM_MODE_CONNECTOR_HDMIA: |
286 | if (encoder->type == INTEL_OUTPUT_HDMI || |
287 | encoder->type == INTEL_OUTPUT_DDI) |
288 | intel_hdmi_info(m, connector: intel_connector); |
289 | break; |
290 | default: |
291 | break; |
292 | } |
293 | |
294 | seq_puts(m, s: "\tHDCP version: " ); |
295 | if (intel_encoder_is_mst(encoder)) { |
296 | intel_hdcp_info(m, intel_connector, remote_req: true); |
297 | seq_puts(m, s: "\tMST Hub HDCP version: " ); |
298 | } |
299 | intel_hdcp_info(m, intel_connector, remote_req: false); |
300 | |
301 | seq_printf(m, fmt: "\tmax bpc: %u\n" , connector->display_info.bpc); |
302 | |
303 | intel_panel_info(m, connector: intel_connector); |
304 | |
305 | seq_printf(m, fmt: "\tmodes:\n" ); |
306 | list_for_each_entry(mode, &connector->modes, head) |
307 | intel_seq_print_mode(m, tabs: 2, mode); |
308 | } |
309 | |
310 | static const char *plane_type(enum drm_plane_type type) |
311 | { |
312 | switch (type) { |
313 | case DRM_PLANE_TYPE_OVERLAY: |
314 | return "OVL" ; |
315 | case DRM_PLANE_TYPE_PRIMARY: |
316 | return "PRI" ; |
317 | case DRM_PLANE_TYPE_CURSOR: |
318 | return "CUR" ; |
319 | /* |
320 | * Deliberately omitting default: to generate compiler warnings |
321 | * when a new drm_plane_type gets added. |
322 | */ |
323 | } |
324 | |
325 | return "unknown" ; |
326 | } |
327 | |
328 | static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) |
329 | { |
330 | /* |
331 | * According to doc only one DRM_MODE_ROTATE_ is allowed but this |
332 | * will print them all to visualize if the values are misused |
333 | */ |
334 | snprintf(buf, size: bufsize, |
335 | fmt: "%s%s%s%s%s%s(0x%08x)" , |
336 | (rotation & DRM_MODE_ROTATE_0) ? "0 " : "" , |
337 | (rotation & DRM_MODE_ROTATE_90) ? "90 " : "" , |
338 | (rotation & DRM_MODE_ROTATE_180) ? "180 " : "" , |
339 | (rotation & DRM_MODE_ROTATE_270) ? "270 " : "" , |
340 | (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "" , |
341 | (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "" , |
342 | rotation); |
343 | } |
344 | |
345 | static const char *plane_visibility(const struct intel_plane_state *plane_state) |
346 | { |
347 | if (plane_state->uapi.visible) |
348 | return "visible" ; |
349 | |
350 | if (plane_state->planar_slave) |
351 | return "planar-slave" ; |
352 | |
353 | return "hidden" ; |
354 | } |
355 | |
356 | static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) |
357 | { |
358 | const struct intel_plane_state *plane_state = |
359 | to_intel_plane_state(plane->base.state); |
360 | const struct drm_framebuffer *fb = plane_state->uapi.fb; |
361 | struct drm_rect src, dst; |
362 | char rot_str[48]; |
363 | |
364 | src = drm_plane_state_src(state: &plane_state->uapi); |
365 | dst = drm_plane_state_dest(state: &plane_state->uapi); |
366 | |
367 | plane_rotation(buf: rot_str, bufsize: sizeof(rot_str), |
368 | rotation: plane_state->uapi.rotation); |
369 | |
370 | seq_puts(m, s: "\t\tuapi: [FB:" ); |
371 | if (fb) |
372 | seq_printf(m, fmt: "%d] %p4cc,0x%llx,%dx%d" , fb->base.id, |
373 | &fb->format->format, fb->modifier, fb->width, |
374 | fb->height); |
375 | else |
376 | seq_puts(m, s: "0] n/a,0x0,0x0," ); |
377 | seq_printf(m, fmt: ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT |
378 | ", rotation=%s\n" , plane_visibility(plane_state), |
379 | DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); |
380 | |
381 | if (plane_state->planar_linked_plane) |
382 | seq_printf(m, fmt: "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n" , |
383 | plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, |
384 | plane_state->planar_slave ? "slave" : "master" ); |
385 | } |
386 | |
387 | static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) |
388 | { |
389 | const struct intel_plane_state *plane_state = |
390 | to_intel_plane_state(plane->base.state); |
391 | const struct drm_framebuffer *fb = plane_state->hw.fb; |
392 | char rot_str[48]; |
393 | |
394 | if (!fb) |
395 | return; |
396 | |
397 | plane_rotation(buf: rot_str, bufsize: sizeof(rot_str), |
398 | rotation: plane_state->hw.rotation); |
399 | |
400 | seq_printf(m, fmt: "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" |
401 | DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n" , |
402 | fb->base.id, &fb->format->format, |
403 | fb->modifier, fb->width, fb->height, |
404 | str_yes_no(v: plane_state->uapi.visible), |
405 | DRM_RECT_FP_ARG(&plane_state->uapi.src), |
406 | DRM_RECT_ARG(&plane_state->uapi.dst), |
407 | rot_str); |
408 | } |
409 | |
410 | static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) |
411 | { |
412 | struct drm_i915_private *dev_priv = node_to_i915(node: m->private); |
413 | struct intel_plane *plane; |
414 | |
415 | for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { |
416 | seq_printf(m, fmt: "\t[PLANE:%d:%s]: type=%s\n" , |
417 | plane->base.base.id, plane->base.name, |
418 | plane_type(type: plane->base.type)); |
419 | intel_plane_uapi_info(m, plane); |
420 | intel_plane_hw_info(m, plane); |
421 | } |
422 | } |
423 | |
424 | static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) |
425 | { |
426 | const struct intel_crtc_state *crtc_state = |
427 | to_intel_crtc_state(crtc->base.state); |
428 | int num_scalers = crtc->num_scalers; |
429 | int i; |
430 | |
431 | /* Not all platformas have a scaler */ |
432 | if (num_scalers) { |
433 | seq_printf(m, fmt: "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d" , |
434 | num_scalers, |
435 | crtc_state->scaler_state.scaler_users, |
436 | crtc_state->scaler_state.scaler_id, |
437 | crtc_state->hw.scaling_filter); |
438 | |
439 | for (i = 0; i < num_scalers; i++) { |
440 | const struct intel_scaler *sc = |
441 | &crtc_state->scaler_state.scalers[i]; |
442 | |
443 | seq_printf(m, fmt: ", scalers[%d]: use=%s, mode=%x" , |
444 | i, str_yes_no(v: sc->in_use), sc->mode); |
445 | } |
446 | seq_puts(m, s: "\n" ); |
447 | } else { |
448 | seq_puts(m, s: "\tNo scalers available on this platform\n" ); |
449 | } |
450 | } |
451 | |
452 | #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) |
453 | static void crtc_updates_info(struct seq_file *m, |
454 | struct intel_crtc *crtc, |
455 | const char *hdr) |
456 | { |
457 | u64 count; |
458 | int row; |
459 | |
460 | count = 0; |
461 | for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) |
462 | count += crtc->debug.vbl.times[row]; |
463 | seq_printf(m, fmt: "%sUpdates: %llu\n" , hdr, count); |
464 | if (!count) |
465 | return; |
466 | |
467 | for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { |
468 | char columns[80] = " |" ; |
469 | unsigned int x; |
470 | |
471 | if (row & 1) { |
472 | const char *units; |
473 | |
474 | if (row > 10) { |
475 | x = 1000000; |
476 | units = "ms" ; |
477 | } else { |
478 | x = 1000; |
479 | units = "us" ; |
480 | } |
481 | |
482 | snprintf(buf: columns, size: sizeof(columns), fmt: "%4ld%s |" , |
483 | DIV_ROUND_CLOSEST(BIT(row + 9), x), units); |
484 | } |
485 | |
486 | if (crtc->debug.vbl.times[row]) { |
487 | x = ilog2(crtc->debug.vbl.times[row]); |
488 | memset(columns + 8, '*', x); |
489 | columns[8 + x] = '\0'; |
490 | } |
491 | |
492 | seq_printf(m, fmt: "%s%s\n" , hdr, columns); |
493 | } |
494 | |
495 | seq_printf(m, fmt: "%sMin update: %lluns\n" , |
496 | hdr, crtc->debug.vbl.min); |
497 | seq_printf(m, fmt: "%sMax update: %lluns\n" , |
498 | hdr, crtc->debug.vbl.max); |
499 | seq_printf(m, fmt: "%sAverage update: %lluns\n" , |
500 | hdr, div64_u64(dividend: crtc->debug.vbl.sum, divisor: count)); |
501 | seq_printf(m, fmt: "%sOverruns > %uus: %u\n" , |
502 | hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); |
503 | } |
504 | |
505 | static int crtc_updates_show(struct seq_file *m, void *data) |
506 | { |
507 | crtc_updates_info(m, crtc: m->private, hdr: "" ); |
508 | return 0; |
509 | } |
510 | |
511 | static int crtc_updates_open(struct inode *inode, struct file *file) |
512 | { |
513 | return single_open(file, crtc_updates_show, inode->i_private); |
514 | } |
515 | |
516 | static ssize_t crtc_updates_write(struct file *file, |
517 | const char __user *ubuf, |
518 | size_t len, loff_t *offp) |
519 | { |
520 | struct seq_file *m = file->private_data; |
521 | struct intel_crtc *crtc = m->private; |
522 | |
523 | /* May race with an update. Meh. */ |
524 | memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); |
525 | |
526 | return len; |
527 | } |
528 | |
529 | static const struct file_operations crtc_updates_fops = { |
530 | .owner = THIS_MODULE, |
531 | .open = crtc_updates_open, |
532 | .read = seq_read, |
533 | .llseek = seq_lseek, |
534 | .release = single_release, |
535 | .write = crtc_updates_write |
536 | }; |
537 | |
538 | static void crtc_updates_add(struct intel_crtc *crtc) |
539 | { |
540 | debugfs_create_file(name: "i915_update_info" , mode: 0644, parent: crtc->base.debugfs_entry, |
541 | data: crtc, fops: &crtc_updates_fops); |
542 | } |
543 | |
544 | #else |
545 | static void crtc_updates_info(struct seq_file *m, |
546 | struct intel_crtc *crtc, |
547 | const char *hdr) |
548 | { |
549 | } |
550 | |
551 | static void crtc_updates_add(struct intel_crtc *crtc) |
552 | { |
553 | } |
554 | #endif |
555 | |
556 | static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) |
557 | { |
558 | struct drm_i915_private *dev_priv = node_to_i915(node: m->private); |
559 | const struct intel_crtc_state *crtc_state = |
560 | to_intel_crtc_state(crtc->base.state); |
561 | struct intel_encoder *encoder; |
562 | |
563 | seq_printf(m, fmt: "[CRTC:%d:%s]:\n" , |
564 | crtc->base.base.id, crtc->base.name); |
565 | |
566 | seq_printf(m, fmt: "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n" , |
567 | str_yes_no(v: crtc_state->uapi.enable), |
568 | str_yes_no(v: crtc_state->uapi.active), |
569 | DRM_MODE_ARG(&crtc_state->uapi.mode)); |
570 | |
571 | seq_printf(m, fmt: "\thw: enable=%s, active=%s\n" , |
572 | str_yes_no(v: crtc_state->hw.enable), str_yes_no(v: crtc_state->hw.active)); |
573 | seq_printf(m, fmt: "\tadjusted_mode=" DRM_MODE_FMT "\n" , |
574 | DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); |
575 | seq_printf(m, fmt: "\tpipe__mode=" DRM_MODE_FMT "\n" , |
576 | DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); |
577 | |
578 | seq_printf(m, fmt: "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n" , |
579 | DRM_RECT_ARG(&crtc_state->pipe_src), |
580 | str_yes_no(v: crtc_state->dither), crtc_state->pipe_bpp); |
581 | |
582 | intel_scaler_info(m, crtc); |
583 | |
584 | if (crtc_state->bigjoiner_pipes) |
585 | seq_printf(m, fmt: "\tLinked to 0x%x pipes as a %s\n" , |
586 | crtc_state->bigjoiner_pipes, |
587 | intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master" ); |
588 | |
589 | for_each_intel_encoder_mask(&dev_priv->drm, encoder, |
590 | crtc_state->uapi.encoder_mask) |
591 | intel_encoder_info(m, crtc, encoder); |
592 | |
593 | intel_plane_info(m, crtc); |
594 | |
595 | seq_printf(m, fmt: "\tunderrun reporting: cpu=%s pch=%s\n" , |
596 | str_yes_no(v: !crtc->cpu_fifo_underrun_disabled), |
597 | str_yes_no(v: !crtc->pch_fifo_underrun_disabled)); |
598 | |
599 | crtc_updates_info(m, crtc, hdr: "\t" ); |
600 | } |
601 | |
602 | static int i915_display_info(struct seq_file *m, void *unused) |
603 | { |
604 | struct drm_i915_private *dev_priv = node_to_i915(node: m->private); |
605 | struct intel_crtc *crtc; |
606 | struct drm_connector *connector; |
607 | struct drm_connector_list_iter conn_iter; |
608 | intel_wakeref_t wakeref; |
609 | |
610 | wakeref = intel_runtime_pm_get(rpm: &dev_priv->runtime_pm); |
611 | |
612 | drm_modeset_lock_all(dev: &dev_priv->drm); |
613 | |
614 | seq_printf(m, fmt: "CRTC info\n" ); |
615 | seq_printf(m, fmt: "---------\n" ); |
616 | for_each_intel_crtc(&dev_priv->drm, crtc) |
617 | intel_crtc_info(m, crtc); |
618 | |
619 | seq_printf(m, fmt: "\n" ); |
620 | seq_printf(m, fmt: "Connector info\n" ); |
621 | seq_printf(m, fmt: "--------------\n" ); |
622 | drm_connector_list_iter_begin(dev: &dev_priv->drm, iter: &conn_iter); |
623 | drm_for_each_connector_iter(connector, &conn_iter) |
624 | intel_connector_info(m, connector); |
625 | drm_connector_list_iter_end(iter: &conn_iter); |
626 | |
627 | drm_modeset_unlock_all(dev: &dev_priv->drm); |
628 | |
629 | intel_runtime_pm_put(rpm: &dev_priv->runtime_pm, wref: wakeref); |
630 | |
631 | return 0; |
632 | } |
633 | |
634 | static int i915_display_capabilities(struct seq_file *m, void *unused) |
635 | { |
636 | struct drm_i915_private *i915 = node_to_i915(node: m->private); |
637 | struct drm_printer p = drm_seq_file_printer(f: m); |
638 | |
639 | intel_display_device_info_print(DISPLAY_INFO(i915), |
640 | DISPLAY_RUNTIME_INFO(i915), p: &p); |
641 | |
642 | return 0; |
643 | } |
644 | |
645 | static int i915_shared_dplls_info(struct seq_file *m, void *unused) |
646 | { |
647 | struct drm_i915_private *dev_priv = node_to_i915(node: m->private); |
648 | struct intel_shared_dpll *pll; |
649 | int i; |
650 | |
651 | drm_modeset_lock_all(dev: &dev_priv->drm); |
652 | |
653 | seq_printf(m, fmt: "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n" , |
654 | dev_priv->display.dpll.ref_clks.nssc, |
655 | dev_priv->display.dpll.ref_clks.ssc); |
656 | |
657 | for_each_shared_dpll(dev_priv, pll, i) { |
658 | seq_printf(m, fmt: "DPLL%i: %s, id: %i\n" , pll->index, |
659 | pll->info->name, pll->info->id); |
660 | seq_printf(m, fmt: " pipe_mask: 0x%x, active: 0x%x, on: %s\n" , |
661 | pll->state.pipe_mask, pll->active_mask, |
662 | str_yes_no(v: pll->on)); |
663 | seq_printf(m, fmt: " tracked hardware state:\n" ); |
664 | seq_printf(m, fmt: " dpll: 0x%08x\n" , pll->state.hw_state.dpll); |
665 | seq_printf(m, fmt: " dpll_md: 0x%08x\n" , |
666 | pll->state.hw_state.dpll_md); |
667 | seq_printf(m, fmt: " fp0: 0x%08x\n" , pll->state.hw_state.fp0); |
668 | seq_printf(m, fmt: " fp1: 0x%08x\n" , pll->state.hw_state.fp1); |
669 | seq_printf(m, fmt: " wrpll: 0x%08x\n" , pll->state.hw_state.wrpll); |
670 | seq_printf(m, fmt: " cfgcr0: 0x%08x\n" , pll->state.hw_state.cfgcr0); |
671 | seq_printf(m, fmt: " cfgcr1: 0x%08x\n" , pll->state.hw_state.cfgcr1); |
672 | seq_printf(m, fmt: " div0: 0x%08x\n" , pll->state.hw_state.div0); |
673 | seq_printf(m, fmt: " mg_refclkin_ctl: 0x%08x\n" , |
674 | pll->state.hw_state.mg_refclkin_ctl); |
675 | seq_printf(m, fmt: " mg_clktop2_coreclkctl1: 0x%08x\n" , |
676 | pll->state.hw_state.mg_clktop2_coreclkctl1); |
677 | seq_printf(m, fmt: " mg_clktop2_hsclkctl: 0x%08x\n" , |
678 | pll->state.hw_state.mg_clktop2_hsclkctl); |
679 | seq_printf(m, fmt: " mg_pll_div0: 0x%08x\n" , |
680 | pll->state.hw_state.mg_pll_div0); |
681 | seq_printf(m, fmt: " mg_pll_div1: 0x%08x\n" , |
682 | pll->state.hw_state.mg_pll_div1); |
683 | seq_printf(m, fmt: " mg_pll_lf: 0x%08x\n" , |
684 | pll->state.hw_state.mg_pll_lf); |
685 | seq_printf(m, fmt: " mg_pll_frac_lock: 0x%08x\n" , |
686 | pll->state.hw_state.mg_pll_frac_lock); |
687 | seq_printf(m, fmt: " mg_pll_ssc: 0x%08x\n" , |
688 | pll->state.hw_state.mg_pll_ssc); |
689 | seq_printf(m, fmt: " mg_pll_bias: 0x%08x\n" , |
690 | pll->state.hw_state.mg_pll_bias); |
691 | seq_printf(m, fmt: " mg_pll_tdc_coldst_bias: 0x%08x\n" , |
692 | pll->state.hw_state.mg_pll_tdc_coldst_bias); |
693 | } |
694 | drm_modeset_unlock_all(dev: &dev_priv->drm); |
695 | |
696 | return 0; |
697 | } |
698 | |
699 | static int i915_ddb_info(struct seq_file *m, void *unused) |
700 | { |
701 | struct drm_i915_private *dev_priv = node_to_i915(node: m->private); |
702 | struct skl_ddb_entry *entry; |
703 | struct intel_crtc *crtc; |
704 | |
705 | if (DISPLAY_VER(dev_priv) < 9) |
706 | return -ENODEV; |
707 | |
708 | drm_modeset_lock_all(dev: &dev_priv->drm); |
709 | |
710 | seq_printf(m, fmt: "%-15s%8s%8s%8s\n" , "" , "Start" , "End" , "Size" ); |
711 | |
712 | for_each_intel_crtc(&dev_priv->drm, crtc) { |
713 | struct intel_crtc_state *crtc_state = |
714 | to_intel_crtc_state(crtc->base.state); |
715 | enum pipe pipe = crtc->pipe; |
716 | enum plane_id plane_id; |
717 | |
718 | seq_printf(m, fmt: "Pipe %c\n" , pipe_name(pipe)); |
719 | |
720 | for_each_plane_id_on_crtc(crtc, plane_id) { |
721 | entry = &crtc_state->wm.skl.plane_ddb[plane_id]; |
722 | seq_printf(m, fmt: " Plane%-8d%8u%8u%8u\n" , plane_id + 1, |
723 | entry->start, entry->end, |
724 | skl_ddb_entry_size(entry)); |
725 | } |
726 | |
727 | entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; |
728 | seq_printf(m, fmt: " %-13s%8u%8u%8u\n" , "Cursor" , entry->start, |
729 | entry->end, skl_ddb_entry_size(entry)); |
730 | } |
731 | |
732 | drm_modeset_unlock_all(dev: &dev_priv->drm); |
733 | |
734 | return 0; |
735 | } |
736 | |
737 | static bool |
738 | intel_lpsp_power_well_enabled(struct drm_i915_private *i915, |
739 | enum i915_power_well_id power_well_id) |
740 | { |
741 | intel_wakeref_t wakeref; |
742 | bool is_enabled; |
743 | |
744 | wakeref = intel_runtime_pm_get(rpm: &i915->runtime_pm); |
745 | is_enabled = intel_display_power_well_is_enabled(dev_priv: i915, |
746 | power_well_id); |
747 | intel_runtime_pm_put(rpm: &i915->runtime_pm, wref: wakeref); |
748 | |
749 | return is_enabled; |
750 | } |
751 | |
752 | static int i915_lpsp_status(struct seq_file *m, void *unused) |
753 | { |
754 | struct drm_i915_private *i915 = node_to_i915(node: m->private); |
755 | bool lpsp_enabled = false; |
756 | |
757 | if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) { |
758 | lpsp_enabled = !intel_lpsp_power_well_enabled(i915, power_well_id: SKL_DISP_PW_2); |
759 | } else if (IS_DISPLAY_VER(i915, 11, 12)) { |
760 | lpsp_enabled = !intel_lpsp_power_well_enabled(i915, power_well_id: ICL_DISP_PW_3); |
761 | } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { |
762 | lpsp_enabled = !intel_lpsp_power_well_enabled(i915, power_well_id: HSW_DISP_PW_GLOBAL); |
763 | } else { |
764 | seq_puts(m, s: "LPSP: not supported\n" ); |
765 | return 0; |
766 | } |
767 | |
768 | seq_printf(m, fmt: "LPSP: %s\n" , str_enabled_disabled(v: lpsp_enabled)); |
769 | |
770 | return 0; |
771 | } |
772 | |
773 | static int i915_dp_mst_info(struct seq_file *m, void *unused) |
774 | { |
775 | struct drm_i915_private *dev_priv = node_to_i915(node: m->private); |
776 | struct intel_encoder *intel_encoder; |
777 | struct intel_digital_port *dig_port; |
778 | struct drm_connector *connector; |
779 | struct drm_connector_list_iter conn_iter; |
780 | |
781 | drm_connector_list_iter_begin(dev: &dev_priv->drm, iter: &conn_iter); |
782 | drm_for_each_connector_iter(connector, &conn_iter) { |
783 | if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) |
784 | continue; |
785 | |
786 | intel_encoder = intel_attached_encoder(to_intel_connector(connector)); |
787 | if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) |
788 | continue; |
789 | |
790 | dig_port = enc_to_dig_port(encoder: intel_encoder); |
791 | if (!intel_dp_mst_source_support(intel_dp: &dig_port->dp)) |
792 | continue; |
793 | |
794 | seq_printf(m, fmt: "MST Source Port [ENCODER:%d:%s]\n" , |
795 | dig_port->base.base.base.id, |
796 | dig_port->base.base.name); |
797 | drm_dp_mst_dump_topology(m, mgr: &dig_port->dp.mst_mgr); |
798 | } |
799 | drm_connector_list_iter_end(iter: &conn_iter); |
800 | |
801 | return 0; |
802 | } |
803 | |
804 | static ssize_t i915_displayport_test_active_write(struct file *file, |
805 | const char __user *ubuf, |
806 | size_t len, loff_t *offp) |
807 | { |
808 | char *input_buffer; |
809 | int status = 0; |
810 | struct drm_device *dev; |
811 | struct drm_connector *connector; |
812 | struct drm_connector_list_iter conn_iter; |
813 | struct intel_dp *intel_dp; |
814 | int val = 0; |
815 | |
816 | dev = ((struct seq_file *)file->private_data)->private; |
817 | |
818 | if (len == 0) |
819 | return 0; |
820 | |
821 | input_buffer = memdup_user_nul(ubuf, len); |
822 | if (IS_ERR(ptr: input_buffer)) |
823 | return PTR_ERR(ptr: input_buffer); |
824 | |
825 | drm_dbg(dev, "Copied %d bytes from user\n" , (unsigned int)len); |
826 | |
827 | drm_connector_list_iter_begin(dev, iter: &conn_iter); |
828 | drm_for_each_connector_iter(connector, &conn_iter) { |
829 | struct intel_encoder *encoder; |
830 | |
831 | if (connector->connector_type != |
832 | DRM_MODE_CONNECTOR_DisplayPort) |
833 | continue; |
834 | |
835 | encoder = to_intel_encoder(connector->encoder); |
836 | if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) |
837 | continue; |
838 | |
839 | if (encoder && connector->status == connector_status_connected) { |
840 | intel_dp = enc_to_intel_dp(encoder); |
841 | status = kstrtoint(s: input_buffer, base: 10, res: &val); |
842 | if (status < 0) |
843 | break; |
844 | drm_dbg(dev, "Got %d for test active\n" , val); |
845 | /* To prevent erroneous activation of the compliance |
846 | * testing code, only accept an actual value of 1 here |
847 | */ |
848 | if (val == 1) |
849 | intel_dp->compliance.test_active = true; |
850 | else |
851 | intel_dp->compliance.test_active = false; |
852 | } |
853 | } |
854 | drm_connector_list_iter_end(iter: &conn_iter); |
855 | kfree(objp: input_buffer); |
856 | if (status < 0) |
857 | return status; |
858 | |
859 | *offp += len; |
860 | return len; |
861 | } |
862 | |
863 | static int i915_displayport_test_active_show(struct seq_file *m, void *data) |
864 | { |
865 | struct drm_i915_private *dev_priv = m->private; |
866 | struct drm_connector *connector; |
867 | struct drm_connector_list_iter conn_iter; |
868 | struct intel_dp *intel_dp; |
869 | |
870 | drm_connector_list_iter_begin(dev: &dev_priv->drm, iter: &conn_iter); |
871 | drm_for_each_connector_iter(connector, &conn_iter) { |
872 | struct intel_encoder *encoder; |
873 | |
874 | if (connector->connector_type != |
875 | DRM_MODE_CONNECTOR_DisplayPort) |
876 | continue; |
877 | |
878 | encoder = to_intel_encoder(connector->encoder); |
879 | if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) |
880 | continue; |
881 | |
882 | if (encoder && connector->status == connector_status_connected) { |
883 | intel_dp = enc_to_intel_dp(encoder); |
884 | if (intel_dp->compliance.test_active) |
885 | seq_puts(m, s: "1" ); |
886 | else |
887 | seq_puts(m, s: "0" ); |
888 | } else |
889 | seq_puts(m, s: "0" ); |
890 | } |
891 | drm_connector_list_iter_end(iter: &conn_iter); |
892 | |
893 | return 0; |
894 | } |
895 | |
896 | static int i915_displayport_test_active_open(struct inode *inode, |
897 | struct file *file) |
898 | { |
899 | return single_open(file, i915_displayport_test_active_show, |
900 | inode->i_private); |
901 | } |
902 | |
903 | static const struct file_operations i915_displayport_test_active_fops = { |
904 | .owner = THIS_MODULE, |
905 | .open = i915_displayport_test_active_open, |
906 | .read = seq_read, |
907 | .llseek = seq_lseek, |
908 | .release = single_release, |
909 | .write = i915_displayport_test_active_write |
910 | }; |
911 | |
912 | static int i915_displayport_test_data_show(struct seq_file *m, void *data) |
913 | { |
914 | struct drm_i915_private *dev_priv = m->private; |
915 | struct drm_connector *connector; |
916 | struct drm_connector_list_iter conn_iter; |
917 | struct intel_dp *intel_dp; |
918 | |
919 | drm_connector_list_iter_begin(dev: &dev_priv->drm, iter: &conn_iter); |
920 | drm_for_each_connector_iter(connector, &conn_iter) { |
921 | struct intel_encoder *encoder; |
922 | |
923 | if (connector->connector_type != |
924 | DRM_MODE_CONNECTOR_DisplayPort) |
925 | continue; |
926 | |
927 | encoder = to_intel_encoder(connector->encoder); |
928 | if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) |
929 | continue; |
930 | |
931 | if (encoder && connector->status == connector_status_connected) { |
932 | intel_dp = enc_to_intel_dp(encoder); |
933 | if (intel_dp->compliance.test_type == |
934 | DP_TEST_LINK_EDID_READ) |
935 | seq_printf(m, fmt: "%lx" , |
936 | intel_dp->compliance.test_data.edid); |
937 | else if (intel_dp->compliance.test_type == |
938 | DP_TEST_LINK_VIDEO_PATTERN) { |
939 | seq_printf(m, fmt: "hdisplay: %d\n" , |
940 | intel_dp->compliance.test_data.hdisplay); |
941 | seq_printf(m, fmt: "vdisplay: %d\n" , |
942 | intel_dp->compliance.test_data.vdisplay); |
943 | seq_printf(m, fmt: "bpc: %u\n" , |
944 | intel_dp->compliance.test_data.bpc); |
945 | } else if (intel_dp->compliance.test_type == |
946 | DP_TEST_LINK_PHY_TEST_PATTERN) { |
947 | seq_printf(m, fmt: "pattern: %d\n" , |
948 | intel_dp->compliance.test_data.phytest.phy_pattern); |
949 | seq_printf(m, fmt: "Number of lanes: %d\n" , |
950 | intel_dp->compliance.test_data.phytest.num_lanes); |
951 | seq_printf(m, fmt: "Link Rate: %d\n" , |
952 | intel_dp->compliance.test_data.phytest.link_rate); |
953 | seq_printf(m, fmt: "level: %02x\n" , |
954 | intel_dp->train_set[0]); |
955 | } |
956 | } else |
957 | seq_puts(m, s: "0" ); |
958 | } |
959 | drm_connector_list_iter_end(iter: &conn_iter); |
960 | |
961 | return 0; |
962 | } |
963 | DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data); |
964 | |
965 | static int i915_displayport_test_type_show(struct seq_file *m, void *data) |
966 | { |
967 | struct drm_i915_private *dev_priv = m->private; |
968 | struct drm_connector *connector; |
969 | struct drm_connector_list_iter conn_iter; |
970 | struct intel_dp *intel_dp; |
971 | |
972 | drm_connector_list_iter_begin(dev: &dev_priv->drm, iter: &conn_iter); |
973 | drm_for_each_connector_iter(connector, &conn_iter) { |
974 | struct intel_encoder *encoder; |
975 | |
976 | if (connector->connector_type != |
977 | DRM_MODE_CONNECTOR_DisplayPort) |
978 | continue; |
979 | |
980 | encoder = to_intel_encoder(connector->encoder); |
981 | if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) |
982 | continue; |
983 | |
984 | if (encoder && connector->status == connector_status_connected) { |
985 | intel_dp = enc_to_intel_dp(encoder); |
986 | seq_printf(m, fmt: "%02lx\n" , intel_dp->compliance.test_type); |
987 | } else |
988 | seq_puts(m, s: "0" ); |
989 | } |
990 | drm_connector_list_iter_end(iter: &conn_iter); |
991 | |
992 | return 0; |
993 | } |
994 | DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type); |
995 | |
996 | static ssize_t |
997 | i915_fifo_underrun_reset_write(struct file *filp, |
998 | const char __user *ubuf, |
999 | size_t cnt, loff_t *ppos) |
1000 | { |
1001 | struct drm_i915_private *dev_priv = filp->private_data; |
1002 | struct intel_crtc *crtc; |
1003 | int ret; |
1004 | bool reset; |
1005 | |
1006 | ret = kstrtobool_from_user(s: ubuf, count: cnt, res: &reset); |
1007 | if (ret) |
1008 | return ret; |
1009 | |
1010 | if (!reset) |
1011 | return cnt; |
1012 | |
1013 | for_each_intel_crtc(&dev_priv->drm, crtc) { |
1014 | struct drm_crtc_commit *commit; |
1015 | struct intel_crtc_state *crtc_state; |
1016 | |
1017 | ret = drm_modeset_lock_single_interruptible(lock: &crtc->base.mutex); |
1018 | if (ret) |
1019 | return ret; |
1020 | |
1021 | crtc_state = to_intel_crtc_state(crtc->base.state); |
1022 | commit = crtc_state->uapi.commit; |
1023 | if (commit) { |
1024 | ret = wait_for_completion_interruptible(x: &commit->hw_done); |
1025 | if (!ret) |
1026 | ret = wait_for_completion_interruptible(x: &commit->flip_done); |
1027 | } |
1028 | |
1029 | if (!ret && crtc_state->hw.active) { |
1030 | drm_dbg_kms(&dev_priv->drm, |
1031 | "Re-arming FIFO underruns on pipe %c\n" , |
1032 | pipe_name(crtc->pipe)); |
1033 | |
1034 | intel_crtc_arm_fifo_underrun(crtc, crtc_state); |
1035 | } |
1036 | |
1037 | drm_modeset_unlock(lock: &crtc->base.mutex); |
1038 | |
1039 | if (ret) |
1040 | return ret; |
1041 | } |
1042 | |
1043 | intel_fbc_reset_underrun(i915: dev_priv); |
1044 | |
1045 | return cnt; |
1046 | } |
1047 | |
1048 | static const struct file_operations i915_fifo_underrun_reset_ops = { |
1049 | .owner = THIS_MODULE, |
1050 | .open = simple_open, |
1051 | .write = i915_fifo_underrun_reset_write, |
1052 | .llseek = default_llseek, |
1053 | }; |
1054 | |
1055 | static const struct drm_info_list intel_display_debugfs_list[] = { |
1056 | {"i915_frontbuffer_tracking" , i915_frontbuffer_tracking, 0}, |
1057 | {"i915_sr_status" , i915_sr_status, 0}, |
1058 | {"i915_gem_framebuffer" , i915_gem_framebuffer_info, 0}, |
1059 | {"i915_power_domain_info" , i915_power_domain_info, 0}, |
1060 | {"i915_display_info" , i915_display_info, 0}, |
1061 | {"i915_display_capabilities" , i915_display_capabilities, 0}, |
1062 | {"i915_shared_dplls_info" , i915_shared_dplls_info, 0}, |
1063 | {"i915_dp_mst_info" , i915_dp_mst_info, 0}, |
1064 | {"i915_ddb_info" , i915_ddb_info, 0}, |
1065 | {"i915_lpsp_status" , i915_lpsp_status, 0}, |
1066 | }; |
1067 | |
1068 | static const struct { |
1069 | const char *name; |
1070 | const struct file_operations *fops; |
1071 | } intel_display_debugfs_files[] = { |
1072 | {"i915_fifo_underrun_reset" , &i915_fifo_underrun_reset_ops}, |
1073 | {"i915_dp_test_data" , &i915_displayport_test_data_fops}, |
1074 | {"i915_dp_test_type" , &i915_displayport_test_type_fops}, |
1075 | {"i915_dp_test_active" , &i915_displayport_test_active_fops}, |
1076 | }; |
1077 | |
1078 | void intel_display_debugfs_register(struct drm_i915_private *i915) |
1079 | { |
1080 | struct drm_minor *minor = i915->drm.primary; |
1081 | int i; |
1082 | |
1083 | for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) { |
1084 | debugfs_create_file(name: intel_display_debugfs_files[i].name, |
1085 | mode: 0644, |
1086 | parent: minor->debugfs_root, |
1087 | data: to_i915(dev: minor->dev), |
1088 | fops: intel_display_debugfs_files[i].fops); |
1089 | } |
1090 | |
1091 | drm_debugfs_create_files(files: intel_display_debugfs_list, |
1092 | ARRAY_SIZE(intel_display_debugfs_list), |
1093 | root: minor->debugfs_root, minor); |
1094 | |
1095 | intel_bios_debugfs_register(i915); |
1096 | intel_cdclk_debugfs_register(i915); |
1097 | intel_dmc_debugfs_register(i915); |
1098 | intel_fbc_debugfs_register(i915); |
1099 | intel_hpd_debugfs_register(i915); |
1100 | intel_opregion_debugfs_register(i915); |
1101 | intel_psr_debugfs_register(i915); |
1102 | intel_wm_debugfs_register(i915); |
1103 | intel_display_debugfs_params(i915); |
1104 | } |
1105 | |
1106 | static int i915_panel_show(struct seq_file *m, void *data) |
1107 | { |
1108 | struct intel_connector *connector = m->private; |
1109 | struct intel_dp *intel_dp = intel_attached_dp(connector); |
1110 | |
1111 | if (connector->base.status != connector_status_connected) |
1112 | return -ENODEV; |
1113 | |
1114 | seq_printf(m, fmt: "Panel power up delay: %d\n" , |
1115 | intel_dp->pps.panel_power_up_delay); |
1116 | seq_printf(m, fmt: "Panel power down delay: %d\n" , |
1117 | intel_dp->pps.panel_power_down_delay); |
1118 | seq_printf(m, fmt: "Backlight on delay: %d\n" , |
1119 | intel_dp->pps.backlight_on_delay); |
1120 | seq_printf(m, fmt: "Backlight off delay: %d\n" , |
1121 | intel_dp->pps.backlight_off_delay); |
1122 | |
1123 | return 0; |
1124 | } |
1125 | DEFINE_SHOW_ATTRIBUTE(i915_panel); |
1126 | |
1127 | static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data) |
1128 | { |
1129 | struct intel_connector *connector = m->private; |
1130 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1131 | int ret; |
1132 | |
1133 | ret = drm_modeset_lock_single_interruptible(lock: &i915->drm.mode_config.connection_mutex); |
1134 | if (ret) |
1135 | return ret; |
1136 | |
1137 | if (!connector->base.encoder || |
1138 | connector->base.status != connector_status_connected) { |
1139 | ret = -ENODEV; |
1140 | goto out; |
1141 | } |
1142 | |
1143 | seq_printf(m, fmt: "%s:%d HDCP version: " , connector->base.name, |
1144 | connector->base.base.id); |
1145 | intel_hdcp_info(m, intel_connector: connector, remote_req: false); |
1146 | |
1147 | out: |
1148 | drm_modeset_unlock(lock: &i915->drm.mode_config.connection_mutex); |
1149 | |
1150 | return ret; |
1151 | } |
1152 | DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability); |
1153 | |
1154 | static int i915_lpsp_capability_show(struct seq_file *m, void *data) |
1155 | { |
1156 | struct intel_connector *connector = m->private; |
1157 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1158 | struct intel_encoder *encoder = intel_attached_encoder(connector); |
1159 | int connector_type = connector->base.connector_type; |
1160 | bool lpsp_capable = false; |
1161 | |
1162 | if (!encoder) |
1163 | return -ENODEV; |
1164 | |
1165 | if (connector->base.status != connector_status_connected) |
1166 | return -ENODEV; |
1167 | |
1168 | if (DISPLAY_VER(i915) >= 13) |
1169 | lpsp_capable = encoder->port <= PORT_B; |
1170 | else if (DISPLAY_VER(i915) >= 12) |
1171 | /* |
1172 | * Actually TGL can drive LPSP on port till DDI_C |
1173 | * but there is no physical connected DDI_C on TGL sku's, |
1174 | * even driver is not initilizing DDI_C port for gen12. |
1175 | */ |
1176 | lpsp_capable = encoder->port <= PORT_B; |
1177 | else if (DISPLAY_VER(i915) == 11) |
1178 | lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI || |
1179 | connector_type == DRM_MODE_CONNECTOR_eDP); |
1180 | else if (IS_DISPLAY_VER(i915, 9, 10)) |
1181 | lpsp_capable = (encoder->port == PORT_A && |
1182 | (connector_type == DRM_MODE_CONNECTOR_DSI || |
1183 | connector_type == DRM_MODE_CONNECTOR_eDP || |
1184 | connector_type == DRM_MODE_CONNECTOR_DisplayPort)); |
1185 | else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) |
1186 | lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP; |
1187 | |
1188 | seq_printf(m, fmt: "LPSP: %s\n" , lpsp_capable ? "capable" : "incapable" ); |
1189 | |
1190 | return 0; |
1191 | } |
1192 | DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); |
1193 | |
1194 | static int i915_dsc_fec_support_show(struct seq_file *m, void *data) |
1195 | { |
1196 | struct intel_connector *connector = m->private; |
1197 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1198 | struct drm_crtc *crtc; |
1199 | struct intel_dp *intel_dp; |
1200 | struct drm_modeset_acquire_ctx ctx; |
1201 | struct intel_crtc_state *crtc_state = NULL; |
1202 | int ret = 0; |
1203 | bool try_again = false; |
1204 | |
1205 | drm_modeset_acquire_init(ctx: &ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); |
1206 | |
1207 | do { |
1208 | try_again = false; |
1209 | ret = drm_modeset_lock(lock: &i915->drm.mode_config.connection_mutex, |
1210 | ctx: &ctx); |
1211 | if (ret) { |
1212 | if (ret == -EDEADLK && !drm_modeset_backoff(ctx: &ctx)) { |
1213 | try_again = true; |
1214 | continue; |
1215 | } |
1216 | break; |
1217 | } |
1218 | crtc = connector->base.state->crtc; |
1219 | if (connector->base.status != connector_status_connected || !crtc) { |
1220 | ret = -ENODEV; |
1221 | break; |
1222 | } |
1223 | ret = drm_modeset_lock(lock: &crtc->mutex, ctx: &ctx); |
1224 | if (ret == -EDEADLK) { |
1225 | ret = drm_modeset_backoff(ctx: &ctx); |
1226 | if (!ret) { |
1227 | try_again = true; |
1228 | continue; |
1229 | } |
1230 | break; |
1231 | } else if (ret) { |
1232 | break; |
1233 | } |
1234 | intel_dp = intel_attached_dp(connector); |
1235 | crtc_state = to_intel_crtc_state(crtc->state); |
1236 | seq_printf(m, fmt: "DSC_Enabled: %s\n" , |
1237 | str_yes_no(v: crtc_state->dsc.compression_enable)); |
1238 | seq_printf(m, fmt: "DSC_Sink_Support: %s\n" , |
1239 | str_yes_no(v: drm_dp_sink_supports_dsc(dsc_dpcd: connector->dp.dsc_dpcd))); |
1240 | seq_printf(m, fmt: "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n" , |
1241 | str_yes_no(v: drm_dp_dsc_sink_supports_format(dsc_dpcd: connector->dp.dsc_dpcd, |
1242 | DP_DSC_RGB)), |
1243 | str_yes_no(v: drm_dp_dsc_sink_supports_format(dsc_dpcd: connector->dp.dsc_dpcd, |
1244 | DP_DSC_YCbCr420_Native)), |
1245 | str_yes_no(v: drm_dp_dsc_sink_supports_format(dsc_dpcd: connector->dp.dsc_dpcd, |
1246 | DP_DSC_YCbCr444))); |
1247 | seq_printf(m, fmt: "DSC_Sink_BPP_Precision: %d\n" , |
1248 | drm_dp_dsc_sink_bpp_incr(dsc_dpcd: connector->dp.dsc_dpcd)); |
1249 | seq_printf(m, fmt: "Force_DSC_Enable: %s\n" , |
1250 | str_yes_no(v: intel_dp->force_dsc_en)); |
1251 | if (!intel_dp_is_edp(intel_dp)) |
1252 | seq_printf(m, fmt: "FEC_Sink_Support: %s\n" , |
1253 | str_yes_no(v: drm_dp_sink_supports_fec(fec_capable: connector->dp.fec_capability))); |
1254 | } while (try_again); |
1255 | |
1256 | drm_modeset_drop_locks(ctx: &ctx); |
1257 | drm_modeset_acquire_fini(ctx: &ctx); |
1258 | |
1259 | return ret; |
1260 | } |
1261 | |
1262 | static ssize_t i915_dsc_fec_support_write(struct file *file, |
1263 | const char __user *ubuf, |
1264 | size_t len, loff_t *offp) |
1265 | { |
1266 | struct seq_file *m = file->private_data; |
1267 | struct intel_connector *connector = m->private; |
1268 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1269 | struct intel_encoder *encoder = intel_attached_encoder(connector); |
1270 | struct intel_dp *intel_dp = enc_to_intel_dp(encoder); |
1271 | bool dsc_enable = false; |
1272 | int ret; |
1273 | |
1274 | if (len == 0) |
1275 | return 0; |
1276 | |
1277 | drm_dbg(&i915->drm, |
1278 | "Copied %zu bytes from user to force DSC\n" , len); |
1279 | |
1280 | ret = kstrtobool_from_user(s: ubuf, count: len, res: &dsc_enable); |
1281 | if (ret < 0) |
1282 | return ret; |
1283 | |
1284 | drm_dbg(&i915->drm, "Got %s for DSC Enable\n" , |
1285 | (dsc_enable) ? "true" : "false" ); |
1286 | intel_dp->force_dsc_en = dsc_enable; |
1287 | |
1288 | *offp += len; |
1289 | return len; |
1290 | } |
1291 | |
1292 | static int i915_dsc_fec_support_open(struct inode *inode, |
1293 | struct file *file) |
1294 | { |
1295 | return single_open(file, i915_dsc_fec_support_show, |
1296 | inode->i_private); |
1297 | } |
1298 | |
1299 | static const struct file_operations i915_dsc_fec_support_fops = { |
1300 | .owner = THIS_MODULE, |
1301 | .open = i915_dsc_fec_support_open, |
1302 | .read = seq_read, |
1303 | .llseek = seq_lseek, |
1304 | .release = single_release, |
1305 | .write = i915_dsc_fec_support_write |
1306 | }; |
1307 | |
1308 | static int i915_dsc_bpc_show(struct seq_file *m, void *data) |
1309 | { |
1310 | struct intel_connector *connector = m->private; |
1311 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1312 | struct intel_encoder *encoder = intel_attached_encoder(connector); |
1313 | struct drm_crtc *crtc; |
1314 | struct intel_crtc_state *crtc_state; |
1315 | int ret; |
1316 | |
1317 | if (!encoder) |
1318 | return -ENODEV; |
1319 | |
1320 | ret = drm_modeset_lock_single_interruptible(lock: &i915->drm.mode_config.connection_mutex); |
1321 | if (ret) |
1322 | return ret; |
1323 | |
1324 | crtc = connector->base.state->crtc; |
1325 | if (connector->base.status != connector_status_connected || !crtc) { |
1326 | ret = -ENODEV; |
1327 | goto out; |
1328 | } |
1329 | |
1330 | crtc_state = to_intel_crtc_state(crtc->state); |
1331 | seq_printf(m, fmt: "Input_BPC: %d\n" , crtc_state->dsc.config.bits_per_component); |
1332 | |
1333 | out: drm_modeset_unlock(lock: &i915->drm.mode_config.connection_mutex); |
1334 | |
1335 | return ret; |
1336 | } |
1337 | |
1338 | static ssize_t i915_dsc_bpc_write(struct file *file, |
1339 | const char __user *ubuf, |
1340 | size_t len, loff_t *offp) |
1341 | { |
1342 | struct seq_file *m = file->private_data; |
1343 | struct intel_connector *connector = m->private; |
1344 | struct intel_encoder *encoder = intel_attached_encoder(connector); |
1345 | struct intel_dp *intel_dp = enc_to_intel_dp(encoder); |
1346 | int dsc_bpc = 0; |
1347 | int ret; |
1348 | |
1349 | ret = kstrtoint_from_user(s: ubuf, count: len, base: 0, res: &dsc_bpc); |
1350 | if (ret < 0) |
1351 | return ret; |
1352 | |
1353 | intel_dp->force_dsc_bpc = dsc_bpc; |
1354 | *offp += len; |
1355 | |
1356 | return len; |
1357 | } |
1358 | |
1359 | static int i915_dsc_bpc_open(struct inode *inode, |
1360 | struct file *file) |
1361 | { |
1362 | return single_open(file, i915_dsc_bpc_show, inode->i_private); |
1363 | } |
1364 | |
1365 | static const struct file_operations i915_dsc_bpc_fops = { |
1366 | .owner = THIS_MODULE, |
1367 | .open = i915_dsc_bpc_open, |
1368 | .read = seq_read, |
1369 | .llseek = seq_lseek, |
1370 | .release = single_release, |
1371 | .write = i915_dsc_bpc_write |
1372 | }; |
1373 | |
1374 | static int i915_dsc_output_format_show(struct seq_file *m, void *data) |
1375 | { |
1376 | struct intel_connector *connector = m->private; |
1377 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1378 | struct intel_encoder *encoder = intel_attached_encoder(connector); |
1379 | struct drm_crtc *crtc; |
1380 | struct intel_crtc_state *crtc_state; |
1381 | int ret; |
1382 | |
1383 | if (!encoder) |
1384 | return -ENODEV; |
1385 | |
1386 | ret = drm_modeset_lock_single_interruptible(lock: &i915->drm.mode_config.connection_mutex); |
1387 | if (ret) |
1388 | return ret; |
1389 | |
1390 | crtc = connector->base.state->crtc; |
1391 | if (connector->base.status != connector_status_connected || !crtc) { |
1392 | ret = -ENODEV; |
1393 | goto out; |
1394 | } |
1395 | |
1396 | crtc_state = to_intel_crtc_state(crtc->state); |
1397 | seq_printf(m, fmt: "DSC_Output_Format: %s\n" , |
1398 | intel_output_format_name(format: crtc_state->output_format)); |
1399 | |
1400 | out: drm_modeset_unlock(lock: &i915->drm.mode_config.connection_mutex); |
1401 | |
1402 | return ret; |
1403 | } |
1404 | |
1405 | static int i915_bigjoiner_enable_show(struct seq_file *m, void *data) |
1406 | { |
1407 | struct intel_connector *connector = m->private; |
1408 | struct drm_crtc *crtc; |
1409 | |
1410 | crtc = connector->base.state->crtc; |
1411 | if (connector->base.status != connector_status_connected || !crtc) |
1412 | return -ENODEV; |
1413 | |
1414 | seq_printf(m, fmt: "Bigjoiner enable: %d\n" , connector->force_bigjoiner_enable); |
1415 | |
1416 | return 0; |
1417 | } |
1418 | |
1419 | static ssize_t i915_dsc_output_format_write(struct file *file, |
1420 | const char __user *ubuf, |
1421 | size_t len, loff_t *offp) |
1422 | { |
1423 | struct seq_file *m = file->private_data; |
1424 | struct intel_connector *connector = m->private; |
1425 | struct intel_encoder *encoder = intel_attached_encoder(connector); |
1426 | struct intel_dp *intel_dp = enc_to_intel_dp(encoder); |
1427 | int dsc_output_format = 0; |
1428 | int ret; |
1429 | |
1430 | ret = kstrtoint_from_user(s: ubuf, count: len, base: 0, res: &dsc_output_format); |
1431 | if (ret < 0) |
1432 | return ret; |
1433 | |
1434 | intel_dp->force_dsc_output_format = dsc_output_format; |
1435 | *offp += len; |
1436 | |
1437 | return len; |
1438 | } |
1439 | |
1440 | static ssize_t i915_bigjoiner_enable_write(struct file *file, |
1441 | const char __user *ubuf, |
1442 | size_t len, loff_t *offp) |
1443 | { |
1444 | struct seq_file *m = file->private_data; |
1445 | struct intel_connector *connector = m->private; |
1446 | struct drm_crtc *crtc; |
1447 | bool bigjoiner_en = 0; |
1448 | int ret; |
1449 | |
1450 | crtc = connector->base.state->crtc; |
1451 | if (connector->base.status != connector_status_connected || !crtc) |
1452 | return -ENODEV; |
1453 | |
1454 | ret = kstrtobool_from_user(s: ubuf, count: len, res: &bigjoiner_en); |
1455 | if (ret < 0) |
1456 | return ret; |
1457 | |
1458 | connector->force_bigjoiner_enable = bigjoiner_en; |
1459 | *offp += len; |
1460 | |
1461 | return len; |
1462 | } |
1463 | |
1464 | static int i915_dsc_output_format_open(struct inode *inode, |
1465 | struct file *file) |
1466 | { |
1467 | return single_open(file, i915_dsc_output_format_show, inode->i_private); |
1468 | } |
1469 | |
1470 | static const struct file_operations i915_dsc_output_format_fops = { |
1471 | .owner = THIS_MODULE, |
1472 | .open = i915_dsc_output_format_open, |
1473 | .read = seq_read, |
1474 | .llseek = seq_lseek, |
1475 | .release = single_release, |
1476 | .write = i915_dsc_output_format_write |
1477 | }; |
1478 | |
1479 | static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data) |
1480 | { |
1481 | struct intel_connector *connector = m->private; |
1482 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1483 | struct intel_encoder *encoder = intel_attached_encoder(connector); |
1484 | struct drm_crtc *crtc; |
1485 | struct intel_dp *intel_dp; |
1486 | int ret; |
1487 | |
1488 | if (!encoder) |
1489 | return -ENODEV; |
1490 | |
1491 | ret = drm_modeset_lock_single_interruptible(lock: &i915->drm.mode_config.connection_mutex); |
1492 | if (ret) |
1493 | return ret; |
1494 | |
1495 | crtc = connector->base.state->crtc; |
1496 | if (connector->base.status != connector_status_connected || !crtc) { |
1497 | ret = -ENODEV; |
1498 | goto out; |
1499 | } |
1500 | |
1501 | intel_dp = intel_attached_dp(connector); |
1502 | seq_printf(m, fmt: "Force_DSC_Fractional_BPP_Enable: %s\n" , |
1503 | str_yes_no(v: intel_dp->force_dsc_fractional_bpp_en)); |
1504 | |
1505 | out: |
1506 | drm_modeset_unlock(lock: &i915->drm.mode_config.connection_mutex); |
1507 | |
1508 | return ret; |
1509 | } |
1510 | |
1511 | static ssize_t i915_dsc_fractional_bpp_write(struct file *file, |
1512 | const char __user *ubuf, |
1513 | size_t len, loff_t *offp) |
1514 | { |
1515 | struct seq_file *m = file->private_data; |
1516 | struct intel_connector *connector = m->private; |
1517 | struct intel_encoder *encoder = intel_attached_encoder(connector); |
1518 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1519 | struct intel_dp *intel_dp = enc_to_intel_dp(encoder); |
1520 | bool dsc_fractional_bpp_enable = false; |
1521 | int ret; |
1522 | |
1523 | if (len == 0) |
1524 | return 0; |
1525 | |
1526 | drm_dbg(&i915->drm, |
1527 | "Copied %zu bytes from user to force fractional bpp for DSC\n" , len); |
1528 | |
1529 | ret = kstrtobool_from_user(s: ubuf, count: len, res: &dsc_fractional_bpp_enable); |
1530 | if (ret < 0) |
1531 | return ret; |
1532 | |
1533 | drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n" , |
1534 | (dsc_fractional_bpp_enable) ? "true" : "false" ); |
1535 | intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable; |
1536 | |
1537 | *offp += len; |
1538 | |
1539 | return len; |
1540 | } |
1541 | |
1542 | static int i915_dsc_fractional_bpp_open(struct inode *inode, |
1543 | struct file *file) |
1544 | { |
1545 | return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private); |
1546 | } |
1547 | |
1548 | static const struct file_operations i915_dsc_fractional_bpp_fops = { |
1549 | .owner = THIS_MODULE, |
1550 | .open = i915_dsc_fractional_bpp_open, |
1551 | .read = seq_read, |
1552 | .llseek = seq_lseek, |
1553 | .release = single_release, |
1554 | .write = i915_dsc_fractional_bpp_write |
1555 | }; |
1556 | |
1557 | DEFINE_SHOW_STORE_ATTRIBUTE(i915_bigjoiner_enable); |
1558 | |
1559 | /* |
1560 | * Returns the Current CRTC's bpc. |
1561 | * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc |
1562 | */ |
1563 | static int i915_current_bpc_show(struct seq_file *m, void *data) |
1564 | { |
1565 | struct intel_crtc *crtc = m->private; |
1566 | struct intel_crtc_state *crtc_state; |
1567 | int ret; |
1568 | |
1569 | ret = drm_modeset_lock_single_interruptible(lock: &crtc->base.mutex); |
1570 | if (ret) |
1571 | return ret; |
1572 | |
1573 | crtc_state = to_intel_crtc_state(crtc->base.state); |
1574 | seq_printf(m, fmt: "Current: %u\n" , crtc_state->pipe_bpp / 3); |
1575 | |
1576 | drm_modeset_unlock(lock: &crtc->base.mutex); |
1577 | |
1578 | return ret; |
1579 | } |
1580 | DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); |
1581 | |
1582 | /* Pipe may differ from crtc index if pipes are fused off */ |
1583 | static int intel_crtc_pipe_show(struct seq_file *m, void *unused) |
1584 | { |
1585 | struct intel_crtc *crtc = m->private; |
1586 | |
1587 | seq_printf(m, fmt: "%c\n" , pipe_name(crtc->pipe)); |
1588 | |
1589 | return 0; |
1590 | } |
1591 | DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); |
1592 | |
1593 | /** |
1594 | * intel_connector_debugfs_add - add i915 specific connector debugfs files |
1595 | * @connector: pointer to a registered intel_connector |
1596 | * |
1597 | * Cleanup will be done by drm_connector_unregister() through a call to |
1598 | * drm_debugfs_connector_remove(). |
1599 | */ |
1600 | void intel_connector_debugfs_add(struct intel_connector *connector) |
1601 | { |
1602 | struct drm_i915_private *i915 = to_i915(dev: connector->base.dev); |
1603 | struct dentry *root = connector->base.debugfs_entry; |
1604 | int connector_type = connector->base.connector_type; |
1605 | |
1606 | /* The connector must have been registered beforehands. */ |
1607 | if (!root) |
1608 | return; |
1609 | |
1610 | intel_drrs_connector_debugfs_add(connector); |
1611 | intel_psr_connector_debugfs_add(connector); |
1612 | |
1613 | if (connector_type == DRM_MODE_CONNECTOR_eDP) |
1614 | debugfs_create_file(name: "i915_panel_timings" , mode: 0444, parent: root, |
1615 | data: connector, fops: &i915_panel_fops); |
1616 | |
1617 | if (connector_type == DRM_MODE_CONNECTOR_DisplayPort || |
1618 | connector_type == DRM_MODE_CONNECTOR_HDMIA || |
1619 | connector_type == DRM_MODE_CONNECTOR_HDMIB) { |
1620 | debugfs_create_file(name: "i915_hdcp_sink_capability" , mode: 0444, parent: root, |
1621 | data: connector, fops: &i915_hdcp_sink_capability_fops); |
1622 | } |
1623 | |
1624 | if (DISPLAY_VER(i915) >= 11 && |
1625 | ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) || |
1626 | connector_type == DRM_MODE_CONNECTOR_eDP)) { |
1627 | debugfs_create_file(name: "i915_dsc_fec_support" , mode: 0644, parent: root, |
1628 | data: connector, fops: &i915_dsc_fec_support_fops); |
1629 | |
1630 | debugfs_create_file(name: "i915_dsc_bpc" , mode: 0644, parent: root, |
1631 | data: connector, fops: &i915_dsc_bpc_fops); |
1632 | |
1633 | debugfs_create_file(name: "i915_dsc_output_format" , mode: 0644, parent: root, |
1634 | data: connector, fops: &i915_dsc_output_format_fops); |
1635 | |
1636 | debugfs_create_file(name: "i915_dsc_fractional_bpp" , mode: 0644, parent: root, |
1637 | data: connector, fops: &i915_dsc_fractional_bpp_fops); |
1638 | } |
1639 | |
1640 | if (DISPLAY_VER(i915) >= 11 && |
1641 | (connector_type == DRM_MODE_CONNECTOR_DisplayPort || |
1642 | connector_type == DRM_MODE_CONNECTOR_eDP)) { |
1643 | debugfs_create_file(name: "i915_bigjoiner_force_enable" , mode: 0644, parent: root, |
1644 | data: connector, fops: &i915_bigjoiner_enable_fops); |
1645 | } |
1646 | |
1647 | if (connector_type == DRM_MODE_CONNECTOR_DSI || |
1648 | connector_type == DRM_MODE_CONNECTOR_eDP || |
1649 | connector_type == DRM_MODE_CONNECTOR_DisplayPort || |
1650 | connector_type == DRM_MODE_CONNECTOR_HDMIA || |
1651 | connector_type == DRM_MODE_CONNECTOR_HDMIB) |
1652 | debugfs_create_file(name: "i915_lpsp_capability" , mode: 0444, parent: root, |
1653 | data: connector, fops: &i915_lpsp_capability_fops); |
1654 | } |
1655 | |
1656 | /** |
1657 | * intel_crtc_debugfs_add - add i915 specific crtc debugfs files |
1658 | * @crtc: pointer to a drm_crtc |
1659 | * |
1660 | * Failure to add debugfs entries should generally be ignored. |
1661 | */ |
1662 | void intel_crtc_debugfs_add(struct intel_crtc *crtc) |
1663 | { |
1664 | struct dentry *root = crtc->base.debugfs_entry; |
1665 | |
1666 | if (!root) |
1667 | return; |
1668 | |
1669 | crtc_updates_add(crtc); |
1670 | intel_drrs_crtc_debugfs_add(crtc); |
1671 | intel_fbc_crtc_debugfs_add(crtc); |
1672 | hsw_ips_crtc_debugfs_add(crtc); |
1673 | |
1674 | debugfs_create_file(name: "i915_current_bpc" , mode: 0444, parent: root, data: crtc, |
1675 | fops: &i915_current_bpc_fops); |
1676 | debugfs_create_file(name: "i915_pipe" , mode: 0444, parent: root, data: crtc, |
1677 | fops: &intel_crtc_pipe_fops); |
1678 | } |
1679 | |