1 | /* |
2 | * Freescale Ethernet controllers |
3 | * |
4 | * Copyright (c) 2005 Intracom S.A. |
5 | * by Pantelis Antoniou <panto@intracom.gr> |
6 | * |
7 | * 2005 (c) MontaVista Software, Inc. |
8 | * Vitaly Bordug <vbordug@ru.mvista.com> |
9 | * |
10 | * This file is licensed under the terms of the GNU General Public License |
11 | * version 2. This program is licensed "as is" without any warranty of any |
12 | * kind, whether express or implied. |
13 | */ |
14 | |
15 | #include <linux/module.h> |
16 | #include <linux/kernel.h> |
17 | #include <linux/types.h> |
18 | #include <linux/string.h> |
19 | #include <linux/ptrace.h> |
20 | #include <linux/errno.h> |
21 | #include <linux/crc32.h> |
22 | #include <linux/ioport.h> |
23 | #include <linux/interrupt.h> |
24 | #include <linux/delay.h> |
25 | #include <linux/netdevice.h> |
26 | #include <linux/etherdevice.h> |
27 | #include <linux/skbuff.h> |
28 | #include <linux/spinlock.h> |
29 | #include <linux/mii.h> |
30 | #include <linux/ethtool.h> |
31 | #include <linux/bitops.h> |
32 | #include <linux/fs.h> |
33 | #include <linux/platform_device.h> |
34 | #include <linux/of_address.h> |
35 | #include <linux/of_irq.h> |
36 | #include <linux/gfp.h> |
37 | |
38 | #include <asm/irq.h> |
39 | #include <linux/uaccess.h> |
40 | |
41 | #include "fs_enet.h" |
42 | #include "fec.h" |
43 | |
44 | /*************************************************/ |
45 | |
46 | #if defined(CONFIG_CPM1) |
47 | /* for a CPM1 __raw_xxx's are sufficient */ |
48 | #define __fs_out32(addr, x) __raw_writel(x, addr) |
49 | #define __fs_out16(addr, x) __raw_writew(x, addr) |
50 | #define __fs_in32(addr) __raw_readl(addr) |
51 | #define __fs_in16(addr) __raw_readw(addr) |
52 | #else |
53 | /* for others play it safe */ |
54 | #define __fs_out32(addr, x) out_be32(addr, x) |
55 | #define __fs_out16(addr, x) out_be16(addr, x) |
56 | #define __fs_in32(addr) in_be32(addr) |
57 | #define __fs_in16(addr) in_be16(addr) |
58 | #endif |
59 | |
60 | /* write */ |
61 | #define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v)) |
62 | |
63 | /* read */ |
64 | #define FR(_fecp, _reg) __fs_in32(&(_fecp)->fec_ ## _reg) |
65 | |
66 | /* set bits */ |
67 | #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v)) |
68 | |
69 | /* clear bits */ |
70 | #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v)) |
71 | |
72 | /* |
73 | * Delay to wait for FEC reset command to complete (in us) |
74 | */ |
75 | #define FEC_RESET_DELAY 50 |
76 | |
77 | static int whack_reset(struct fec __iomem *fecp) |
78 | { |
79 | int i; |
80 | |
81 | FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET); |
82 | for (i = 0; i < FEC_RESET_DELAY; i++) { |
83 | if ((FR(fecp, ecntrl) & FEC_ECNTRL_RESET) == 0) |
84 | return 0; /* OK */ |
85 | udelay(1); |
86 | } |
87 | |
88 | return -1; |
89 | } |
90 | |
91 | static int do_pd_setup(struct fs_enet_private *fep) |
92 | { |
93 | struct platform_device *ofdev = to_platform_device(fep->dev); |
94 | |
95 | fep->interrupt = irq_of_parse_and_map(node: ofdev->dev.of_node, index: 0); |
96 | if (!fep->interrupt) |
97 | return -EINVAL; |
98 | |
99 | fep->fec.fecp = of_iomap(node: ofdev->dev.of_node, index: 0); |
100 | if (!fep->fec.fecp) |
101 | return -EINVAL; |
102 | |
103 | return 0; |
104 | } |
105 | |
106 | #define FEC_NAPI_EVENT_MSK (FEC_ENET_RXF | FEC_ENET_RXB | FEC_ENET_TXF) |
107 | #define FEC_EVENT (FEC_ENET_RXF | FEC_ENET_TXF) |
108 | #define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR | FEC_ENET_BABR | \ |
109 | FEC_ENET_BABT | FEC_ENET_EBERR) |
110 | |
111 | static int setup_data(struct net_device *dev) |
112 | { |
113 | struct fs_enet_private *fep = netdev_priv(dev); |
114 | |
115 | if (do_pd_setup(fep) != 0) |
116 | return -EINVAL; |
117 | |
118 | fep->fec.hthi = 0; |
119 | fep->fec.htlo = 0; |
120 | |
121 | fep->ev_napi = FEC_NAPI_EVENT_MSK; |
122 | fep->ev = FEC_EVENT; |
123 | fep->ev_err = FEC_ERR_EVENT_MSK; |
124 | |
125 | return 0; |
126 | } |
127 | |
128 | static int allocate_bd(struct net_device *dev) |
129 | { |
130 | struct fs_enet_private *fep = netdev_priv(dev); |
131 | const struct fs_platform_info *fpi = fep->fpi; |
132 | |
133 | fep->ring_base = (void __force __iomem *)dma_alloc_coherent(fep->dev, |
134 | (fpi->tx_ring + fpi->rx_ring) * |
135 | sizeof(cbd_t), &fep->ring_mem_addr, |
136 | GFP_KERNEL); |
137 | if (fep->ring_base == NULL) |
138 | return -ENOMEM; |
139 | |
140 | return 0; |
141 | } |
142 | |
143 | static void free_bd(struct net_device *dev) |
144 | { |
145 | struct fs_enet_private *fep = netdev_priv(dev); |
146 | const struct fs_platform_info *fpi = fep->fpi; |
147 | |
148 | if(fep->ring_base) |
149 | dma_free_coherent(fep->dev, (fpi->tx_ring + fpi->rx_ring) |
150 | * sizeof(cbd_t), |
151 | (void __force *)fep->ring_base, |
152 | fep->ring_mem_addr); |
153 | } |
154 | |
155 | static void cleanup_data(struct net_device *dev) |
156 | { |
157 | /* nothing */ |
158 | } |
159 | |
160 | static void set_promiscuous_mode(struct net_device *dev) |
161 | { |
162 | struct fs_enet_private *fep = netdev_priv(dev); |
163 | struct fec __iomem *fecp = fep->fec.fecp; |
164 | |
165 | FS(fecp, r_cntrl, FEC_RCNTRL_PROM); |
166 | } |
167 | |
168 | static void set_multicast_start(struct net_device *dev) |
169 | { |
170 | struct fs_enet_private *fep = netdev_priv(dev); |
171 | |
172 | fep->fec.hthi = 0; |
173 | fep->fec.htlo = 0; |
174 | } |
175 | |
176 | static void set_multicast_one(struct net_device *dev, const u8 *mac) |
177 | { |
178 | struct fs_enet_private *fep = netdev_priv(dev); |
179 | int temp, hash_index; |
180 | u32 crc, csrVal; |
181 | |
182 | crc = ether_crc(6, mac); |
183 | |
184 | temp = (crc & 0x3f) >> 1; |
185 | hash_index = ((temp & 0x01) << 4) | |
186 | ((temp & 0x02) << 2) | |
187 | ((temp & 0x04)) | |
188 | ((temp & 0x08) >> 2) | |
189 | ((temp & 0x10) >> 4); |
190 | csrVal = 1 << hash_index; |
191 | if (crc & 1) |
192 | fep->fec.hthi |= csrVal; |
193 | else |
194 | fep->fec.htlo |= csrVal; |
195 | } |
196 | |
197 | static void set_multicast_finish(struct net_device *dev) |
198 | { |
199 | struct fs_enet_private *fep = netdev_priv(dev); |
200 | struct fec __iomem *fecp = fep->fec.fecp; |
201 | |
202 | /* if all multi or too many multicasts; just enable all */ |
203 | if ((dev->flags & IFF_ALLMULTI) != 0 || |
204 | netdev_mc_count(dev) > FEC_MAX_MULTICAST_ADDRS) { |
205 | fep->fec.hthi = 0xffffffffU; |
206 | fep->fec.htlo = 0xffffffffU; |
207 | } |
208 | |
209 | FC(fecp, r_cntrl, FEC_RCNTRL_PROM); |
210 | FW(fecp, grp_hash_table_high, fep->fec.hthi); |
211 | FW(fecp, grp_hash_table_low, fep->fec.htlo); |
212 | } |
213 | |
214 | static void set_multicast_list(struct net_device *dev) |
215 | { |
216 | struct netdev_hw_addr *ha; |
217 | |
218 | if ((dev->flags & IFF_PROMISC) == 0) { |
219 | set_multicast_start(dev); |
220 | netdev_for_each_mc_addr(ha, dev) |
221 | set_multicast_one(dev, mac: ha->addr); |
222 | set_multicast_finish(dev); |
223 | } else |
224 | set_promiscuous_mode(dev); |
225 | } |
226 | |
227 | static void restart(struct net_device *dev) |
228 | { |
229 | struct fs_enet_private *fep = netdev_priv(dev); |
230 | struct fec __iomem *fecp = fep->fec.fecp; |
231 | const struct fs_platform_info *fpi = fep->fpi; |
232 | dma_addr_t rx_bd_base_phys, tx_bd_base_phys; |
233 | int r; |
234 | u32 addrhi, addrlo; |
235 | |
236 | struct mii_bus *mii = dev->phydev->mdio.bus; |
237 | struct fec_info* fec_inf = mii->priv; |
238 | |
239 | r = whack_reset(fecp: fep->fec.fecp); |
240 | if (r != 0) |
241 | dev_err(fep->dev, "FEC Reset FAILED!\n" ); |
242 | /* |
243 | * Set station address. |
244 | */ |
245 | addrhi = ((u32) dev->dev_addr[0] << 24) | |
246 | ((u32) dev->dev_addr[1] << 16) | |
247 | ((u32) dev->dev_addr[2] << 8) | |
248 | (u32) dev->dev_addr[3]; |
249 | addrlo = ((u32) dev->dev_addr[4] << 24) | |
250 | ((u32) dev->dev_addr[5] << 16); |
251 | FW(fecp, addr_low, addrhi); |
252 | FW(fecp, addr_high, addrlo); |
253 | |
254 | /* |
255 | * Reset all multicast. |
256 | */ |
257 | FW(fecp, grp_hash_table_high, fep->fec.hthi); |
258 | FW(fecp, grp_hash_table_low, fep->fec.htlo); |
259 | |
260 | /* |
261 | * Set maximum receive buffer size. |
262 | */ |
263 | FW(fecp, r_buff_size, PKT_MAXBLR_SIZE); |
264 | #ifdef CONFIG_FS_ENET_MPC5121_FEC |
265 | FW(fecp, r_cntrl, PKT_MAXBUF_SIZE << 16); |
266 | #else |
267 | FW(fecp, r_hash, PKT_MAXBUF_SIZE); |
268 | #endif |
269 | |
270 | /* get physical address */ |
271 | rx_bd_base_phys = fep->ring_mem_addr; |
272 | tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring; |
273 | |
274 | /* |
275 | * Set receive and transmit descriptor base. |
276 | */ |
277 | FW(fecp, r_des_start, rx_bd_base_phys); |
278 | FW(fecp, x_des_start, tx_bd_base_phys); |
279 | |
280 | fs_init_bds(dev); |
281 | |
282 | /* |
283 | * Enable big endian and don't care about SDMA FC. |
284 | */ |
285 | #ifdef CONFIG_FS_ENET_MPC5121_FEC |
286 | FS(fecp, dma_control, 0xC0000000); |
287 | #else |
288 | FW(fecp, fun_code, 0x78000000); |
289 | #endif |
290 | |
291 | /* |
292 | * Set MII speed. |
293 | */ |
294 | FW(fecp, mii_speed, fec_inf->mii_speed); |
295 | |
296 | /* |
297 | * Clear any outstanding interrupt. |
298 | */ |
299 | FW(fecp, ievent, 0xffc0); |
300 | #ifndef CONFIG_FS_ENET_MPC5121_FEC |
301 | FW(fecp, ivec, (virq_to_hw(fep->interrupt) / 2) << 29); |
302 | |
303 | FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */ |
304 | #else |
305 | /* |
306 | * Only set MII/RMII mode - do not touch maximum frame length |
307 | * configured before. |
308 | */ |
309 | FS(fecp, r_cntrl, fpi->use_rmii ? |
310 | FEC_RCNTRL_RMII_MODE : FEC_RCNTRL_MII_MODE); |
311 | #endif |
312 | /* |
313 | * adjust to duplex mode |
314 | */ |
315 | if (dev->phydev->duplex) { |
316 | FC(fecp, r_cntrl, FEC_RCNTRL_DRT); |
317 | FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */ |
318 | } else { |
319 | FS(fecp, r_cntrl, FEC_RCNTRL_DRT); |
320 | FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */ |
321 | } |
322 | |
323 | /* Restore multicast and promiscuous settings */ |
324 | set_multicast_list(dev); |
325 | |
326 | /* |
327 | * Enable interrupts we wish to service. |
328 | */ |
329 | FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB | |
330 | FEC_ENET_RXF | FEC_ENET_RXB); |
331 | |
332 | /* |
333 | * And last, enable the transmit and receive processing. |
334 | */ |
335 | FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN); |
336 | FW(fecp, r_des_active, 0x01000000); |
337 | } |
338 | |
339 | static void stop(struct net_device *dev) |
340 | { |
341 | struct fs_enet_private *fep = netdev_priv(dev); |
342 | struct fec __iomem *fecp = fep->fec.fecp; |
343 | int i; |
344 | |
345 | if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0) |
346 | return; /* already down */ |
347 | |
348 | FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */ |
349 | for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) && |
350 | i < FEC_RESET_DELAY; i++) |
351 | udelay(1); |
352 | |
353 | if (i == FEC_RESET_DELAY) |
354 | dev_warn(fep->dev, "FEC timeout on graceful transmit stop\n" ); |
355 | /* |
356 | * Disable FEC. Let only MII interrupts. |
357 | */ |
358 | FW(fecp, imask, 0); |
359 | FC(fecp, ecntrl, FEC_ECNTRL_ETHER_EN); |
360 | |
361 | fs_cleanup_bds(dev); |
362 | } |
363 | |
364 | static void napi_clear_event_fs(struct net_device *dev) |
365 | { |
366 | struct fs_enet_private *fep = netdev_priv(dev); |
367 | struct fec __iomem *fecp = fep->fec.fecp; |
368 | |
369 | FW(fecp, ievent, FEC_NAPI_EVENT_MSK); |
370 | } |
371 | |
372 | static void napi_enable_fs(struct net_device *dev) |
373 | { |
374 | struct fs_enet_private *fep = netdev_priv(dev); |
375 | struct fec __iomem *fecp = fep->fec.fecp; |
376 | |
377 | FS(fecp, imask, FEC_NAPI_EVENT_MSK); |
378 | } |
379 | |
380 | static void napi_disable_fs(struct net_device *dev) |
381 | { |
382 | struct fs_enet_private *fep = netdev_priv(dev); |
383 | struct fec __iomem *fecp = fep->fec.fecp; |
384 | |
385 | FC(fecp, imask, FEC_NAPI_EVENT_MSK); |
386 | } |
387 | |
388 | static void rx_bd_done(struct net_device *dev) |
389 | { |
390 | struct fs_enet_private *fep = netdev_priv(dev); |
391 | struct fec __iomem *fecp = fep->fec.fecp; |
392 | |
393 | FW(fecp, r_des_active, 0x01000000); |
394 | } |
395 | |
396 | static void tx_kickstart(struct net_device *dev) |
397 | { |
398 | struct fs_enet_private *fep = netdev_priv(dev); |
399 | struct fec __iomem *fecp = fep->fec.fecp; |
400 | |
401 | FW(fecp, x_des_active, 0x01000000); |
402 | } |
403 | |
404 | static u32 get_int_events(struct net_device *dev) |
405 | { |
406 | struct fs_enet_private *fep = netdev_priv(dev); |
407 | struct fec __iomem *fecp = fep->fec.fecp; |
408 | |
409 | return FR(fecp, ievent) & FR(fecp, imask); |
410 | } |
411 | |
412 | static void clear_int_events(struct net_device *dev, u32 int_events) |
413 | { |
414 | struct fs_enet_private *fep = netdev_priv(dev); |
415 | struct fec __iomem *fecp = fep->fec.fecp; |
416 | |
417 | FW(fecp, ievent, int_events); |
418 | } |
419 | |
420 | static void ev_error(struct net_device *dev, u32 int_events) |
421 | { |
422 | struct fs_enet_private *fep = netdev_priv(dev); |
423 | |
424 | dev_warn(fep->dev, "FEC ERROR(s) 0x%x\n" , int_events); |
425 | } |
426 | |
427 | static int get_regs(struct net_device *dev, void *p, int *sizep) |
428 | { |
429 | struct fs_enet_private *fep = netdev_priv(dev); |
430 | |
431 | if (*sizep < sizeof(struct fec)) |
432 | return -EINVAL; |
433 | |
434 | memcpy_fromio(p, fep->fec.fecp, sizeof(struct fec)); |
435 | |
436 | return 0; |
437 | } |
438 | |
439 | static int get_regs_len(struct net_device *dev) |
440 | { |
441 | return sizeof(struct fec); |
442 | } |
443 | |
444 | static void tx_restart(struct net_device *dev) |
445 | { |
446 | /* nothing */ |
447 | } |
448 | |
449 | /*************************************************************************/ |
450 | |
451 | const struct fs_ops fs_fec_ops = { |
452 | .setup_data = setup_data, |
453 | .cleanup_data = cleanup_data, |
454 | .set_multicast_list = set_multicast_list, |
455 | .restart = restart, |
456 | .stop = stop, |
457 | .napi_clear_event = napi_clear_event_fs, |
458 | .napi_enable = napi_enable_fs, |
459 | .napi_disable = napi_disable_fs, |
460 | .rx_bd_done = rx_bd_done, |
461 | .tx_kickstart = tx_kickstart, |
462 | .get_int_events = get_int_events, |
463 | .clear_int_events = clear_int_events, |
464 | .ev_error = ev_error, |
465 | .get_regs = get_regs, |
466 | .get_regs_len = get_regs_len, |
467 | .tx_restart = tx_restart, |
468 | .allocate_bd = allocate_bd, |
469 | .free_bd = free_bd, |
470 | }; |
471 | |
472 | |