1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 2013 - 2021 Intel Corporation. */
3
4#include <generated/utsrelease.h>
5#include <linux/crash_dump.h>
6#include <linux/net/intel/libie/pctype.h>
7#include <linux/if_bridge.h>
8#include <linux/if_macvlan.h>
9#include <linux/module.h>
10#include <net/pkt_cls.h>
11#include <net/xdp_sock_drv.h>
12
13/* Local includes */
14#include "i40e.h"
15#include "i40e_devids.h"
16#include "i40e_diag.h"
17#include "i40e_lan_hmc.h"
18#include "i40e_virtchnl_pf.h"
19#include "i40e_xsk.h"
20
21/* All i40e tracepoints are defined by the include below, which
22 * must be included exactly once across the whole kernel with
23 * CREATE_TRACE_POINTS defined
24 */
25#define CREATE_TRACE_POINTS
26#include "i40e_trace.h"
27
28const char i40e_driver_name[] = "i40e";
29static const char i40e_driver_string[] =
30 "Intel(R) Ethernet Connection XL710 Network Driver";
31
32static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
33
34/* a bit of forward declarations */
35static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
36static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
37static int i40e_add_vsi(struct i40e_vsi *vsi);
38static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
39static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired);
40static int i40e_setup_misc_vector(struct i40e_pf *pf);
41static void i40e_determine_queue_usage(struct i40e_pf *pf);
42static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
43static void i40e_prep_for_reset(struct i40e_pf *pf);
44static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
45 bool lock_acquired);
46static int i40e_reset(struct i40e_pf *pf);
47static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
48static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
49static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
50static bool i40e_check_recovery_mode(struct i40e_pf *pf);
51static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
52static void i40e_fdir_sb_setup(struct i40e_pf *pf);
53static int i40e_veb_get_bw_info(struct i40e_veb *veb);
54static int i40e_get_capabilities(struct i40e_pf *pf,
55 enum i40e_admin_queue_opc list_type);
56static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
57
58/* i40e_pci_tbl - PCI Device ID Table
59 *
60 * Last entry must be all 0s
61 *
62 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
63 * Class, Class Mask, private data (not used) }
64 */
65static const struct pci_device_id i40e_pci_tbl[] = {
66 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
67 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_BC), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722_A), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
92 /* required last entry */
93 {0, }
94};
95MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
96
97#define I40E_MAX_VF_COUNT 128
98static int debug = -1;
99module_param(debug, uint, 0);
100MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
101
102MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
103MODULE_IMPORT_NS("LIBIE");
104MODULE_IMPORT_NS("LIBIE_ADMINQ");
105MODULE_LICENSE("GPL v2");
106
107static struct workqueue_struct *i40e_wq;
108
109static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f,
110 struct net_device *netdev, int delta)
111{
112 struct netdev_hw_addr_list *ha_list;
113 struct netdev_hw_addr *ha;
114
115 if (!f || !netdev)
116 return;
117
118 if (is_unicast_ether_addr(addr: f->macaddr) || is_link_local_ether_addr(addr: f->macaddr))
119 ha_list = &netdev->uc;
120 else
121 ha_list = &netdev->mc;
122
123 netdev_hw_addr_list_for_each(ha, ha_list) {
124 if (ether_addr_equal(addr1: ha->addr, addr2: f->macaddr)) {
125 ha->refcount += delta;
126 if (ha->refcount <= 0)
127 ha->refcount = 1;
128 break;
129 }
130 }
131}
132
133/**
134 * i40e_hw_to_dev - get device pointer from the hardware structure
135 * @hw: pointer to the device HW structure
136 **/
137struct device *i40e_hw_to_dev(struct i40e_hw *hw)
138{
139 struct i40e_pf *pf = i40e_hw_to_pf(hw);
140
141 return &pf->pdev->dev;
142}
143
144/**
145 * i40e_allocate_dma_mem - OS specific memory alloc for shared code
146 * @hw: pointer to the HW structure
147 * @mem: ptr to mem struct to fill out
148 * @size: size of memory requested
149 * @alignment: what to align the allocation to
150 **/
151int i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem,
152 u64 size, u32 alignment)
153{
154 struct i40e_pf *pf = i40e_hw_to_pf(hw);
155
156 mem->size = ALIGN(size, alignment);
157 mem->va = dma_alloc_coherent(dev: &pf->pdev->dev, size: mem->size, dma_handle: &mem->pa,
158 GFP_KERNEL);
159 if (!mem->va)
160 return -ENOMEM;
161
162 return 0;
163}
164
165/**
166 * i40e_free_dma_mem - OS specific memory free for shared code
167 * @hw: pointer to the HW structure
168 * @mem: ptr to mem struct to free
169 **/
170int i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem)
171{
172 struct i40e_pf *pf = i40e_hw_to_pf(hw);
173
174 dma_free_coherent(dev: &pf->pdev->dev, size: mem->size, cpu_addr: mem->va, dma_handle: mem->pa);
175 mem->va = NULL;
176 mem->pa = 0;
177 mem->size = 0;
178
179 return 0;
180}
181
182/**
183 * i40e_allocate_virt_mem - OS specific memory alloc for shared code
184 * @hw: pointer to the HW structure
185 * @mem: ptr to mem struct to fill out
186 * @size: size of memory requested
187 **/
188int i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem,
189 u32 size)
190{
191 mem->size = size;
192 mem->va = kzalloc(size, GFP_KERNEL);
193
194 if (!mem->va)
195 return -ENOMEM;
196
197 return 0;
198}
199
200/**
201 * i40e_free_virt_mem - OS specific memory free for shared code
202 * @hw: pointer to the HW structure
203 * @mem: ptr to mem struct to free
204 **/
205int i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem)
206{
207 /* it's ok to kfree a NULL pointer */
208 kfree(objp: mem->va);
209 mem->va = NULL;
210 mem->size = 0;
211
212 return 0;
213}
214
215/**
216 * i40e_get_lump - find a lump of free generic resource
217 * @pf: board private structure
218 * @pile: the pile of resource to search
219 * @needed: the number of items needed
220 * @id: an owner id to stick on the items assigned
221 *
222 * Returns the base item index of the lump, or negative for error
223 **/
224static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
225 u16 needed, u16 id)
226{
227 int ret = -ENOMEM;
228 int i, j;
229
230 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
231 dev_info(&pf->pdev->dev,
232 "param err: pile=%s needed=%d id=0x%04x\n",
233 pile ? "<valid>" : "<null>", needed, id);
234 return -EINVAL;
235 }
236
237 /* Allocate last queue in the pile for FDIR VSI queue
238 * so it doesn't fragment the qp_pile
239 */
240 if (pile == pf->qp_pile && pf->vsi[id]->type == I40E_VSI_FDIR) {
241 if (pile->list[pile->num_entries - 1] & I40E_PILE_VALID_BIT) {
242 dev_err(&pf->pdev->dev,
243 "Cannot allocate queue %d for I40E_VSI_FDIR\n",
244 pile->num_entries - 1);
245 return -ENOMEM;
246 }
247 pile->list[pile->num_entries - 1] = id | I40E_PILE_VALID_BIT;
248 return pile->num_entries - 1;
249 }
250
251 i = 0;
252 while (i < pile->num_entries) {
253 /* skip already allocated entries */
254 if (pile->list[i] & I40E_PILE_VALID_BIT) {
255 i++;
256 continue;
257 }
258
259 /* do we have enough in this lump? */
260 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
261 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
262 break;
263 }
264
265 if (j == needed) {
266 /* there was enough, so assign it to the requestor */
267 for (j = 0; j < needed; j++)
268 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
269 ret = i;
270 break;
271 }
272
273 /* not enough, so skip over it and continue looking */
274 i += j;
275 }
276
277 return ret;
278}
279
280/**
281 * i40e_put_lump - return a lump of generic resource
282 * @pile: the pile of resource to search
283 * @index: the base item index
284 * @id: the owner id of the items assigned
285 *
286 * Returns the count of items in the lump
287 **/
288static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
289{
290 int valid_id = (id | I40E_PILE_VALID_BIT);
291 int count = 0;
292 u16 i;
293
294 if (!pile || index >= pile->num_entries)
295 return -EINVAL;
296
297 for (i = index;
298 i < pile->num_entries && pile->list[i] == valid_id;
299 i++) {
300 pile->list[i] = 0;
301 count++;
302 }
303
304
305 return count;
306}
307
308/**
309 * i40e_find_vsi_from_id - searches for the vsi with the given id
310 * @pf: the pf structure to search for the vsi
311 * @id: id of the vsi it is searching for
312 **/
313struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
314{
315 struct i40e_vsi *vsi;
316 int i;
317
318 i40e_pf_for_each_vsi(pf, i, vsi)
319 if (vsi->id == id)
320 return vsi;
321
322 return NULL;
323}
324
325/**
326 * i40e_service_event_schedule - Schedule the service task to wake up
327 * @pf: board private structure
328 *
329 * If not already scheduled, this puts the task into the work queue
330 **/
331void i40e_service_event_schedule(struct i40e_pf *pf)
332{
333 if ((!test_bit(__I40E_DOWN, pf->state) &&
334 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
335 test_bit(__I40E_RECOVERY_MODE, pf->state))
336 queue_work(wq: i40e_wq, work: &pf->service_task);
337}
338
339/**
340 * i40e_tx_timeout - Respond to a Tx Hang
341 * @netdev: network interface device structure
342 * @txqueue: queue number timing out
343 *
344 * If any port has noticed a Tx timeout, it is likely that the whole
345 * device is munged, not just the one netdev port, so go for the full
346 * reset.
347 **/
348static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
349{
350 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
351 struct i40e_vsi *vsi = np->vsi;
352 struct i40e_pf *pf = vsi->back;
353 struct i40e_ring *tx_ring = NULL;
354 unsigned int i;
355 u32 head, val;
356
357 pf->tx_timeout_count++;
358
359 /* with txqueue index, find the tx_ring struct */
360 for (i = 0; i < vsi->num_queue_pairs; i++) {
361 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
362 if (txqueue ==
363 vsi->tx_rings[i]->queue_index) {
364 tx_ring = vsi->tx_rings[i];
365 break;
366 }
367 }
368 }
369
370 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
371 pf->tx_timeout_recovery_level = 1; /* reset after some time */
372 else if (time_before(jiffies,
373 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
374 return; /* don't do any new action before the next timeout */
375
376 /* don't kick off another recovery if one is already pending */
377 if (test_and_set_bit(nr: __I40E_TIMEOUT_RECOVERY_PENDING, addr: pf->state))
378 return;
379
380 if (tx_ring) {
381 head = i40e_get_head(tx_ring);
382 /* Read interrupt register */
383 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
384 val = rd32(&pf->hw,
385 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
386 tx_ring->vsi->base_vector - 1));
387 else
388 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
389
390 netdev_info(dev: netdev, format: "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
391 vsi->seid, txqueue, tx_ring->next_to_clean,
392 head, tx_ring->next_to_use,
393 readl(addr: tx_ring->tail), val);
394 }
395
396 pf->tx_timeout_last_recovery = jiffies;
397 netdev_info(dev: netdev, format: "tx_timeout recovery level %d, txqueue %d\n",
398 pf->tx_timeout_recovery_level, txqueue);
399
400 switch (pf->tx_timeout_recovery_level) {
401 case 1:
402 set_bit(nr: __I40E_PF_RESET_REQUESTED, addr: pf->state);
403 break;
404 case 2:
405 set_bit(nr: __I40E_CORE_RESET_REQUESTED, addr: pf->state);
406 break;
407 case 3:
408 set_bit(nr: __I40E_GLOBAL_RESET_REQUESTED, addr: pf->state);
409 break;
410 default:
411 netdev_err(dev: netdev, format: "tx_timeout recovery unsuccessful, device is in non-recoverable state.\n");
412 set_bit(nr: __I40E_DOWN_REQUESTED, addr: pf->state);
413 set_bit(nr: __I40E_VSI_DOWN_REQUESTED, addr: vsi->state);
414 break;
415 }
416
417 i40e_service_event_schedule(pf);
418 pf->tx_timeout_recovery_level++;
419}
420
421/**
422 * i40e_get_vsi_stats_struct - Get System Network Statistics
423 * @vsi: the VSI we care about
424 *
425 * Returns the address of the device statistics structure.
426 * The statistics are actually updated from the service task.
427 **/
428struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
429{
430 return &vsi->net_stats;
431}
432
433/**
434 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
435 * @ring: Tx ring to get statistics from
436 * @stats: statistics entry to be updated
437 **/
438static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
439 struct rtnl_link_stats64 *stats)
440{
441 u64 bytes, packets;
442 unsigned int start;
443
444 do {
445 start = u64_stats_fetch_begin(syncp: &ring->syncp);
446 packets = ring->stats.packets;
447 bytes = ring->stats.bytes;
448 } while (u64_stats_fetch_retry(syncp: &ring->syncp, start));
449
450 stats->tx_packets += packets;
451 stats->tx_bytes += bytes;
452}
453
454/**
455 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
456 * @netdev: network interface device structure
457 * @stats: data structure to store statistics
458 *
459 * Returns the address of the device statistics structure.
460 * The statistics are actually updated from the service task.
461 **/
462static void i40e_get_netdev_stats_struct(struct net_device *netdev,
463 struct rtnl_link_stats64 *stats)
464{
465 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
466 struct i40e_vsi *vsi = np->vsi;
467 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
468 struct i40e_ring *ring;
469 int i;
470
471 if (test_bit(__I40E_VSI_DOWN, vsi->state))
472 return;
473
474 if (!vsi->tx_rings)
475 return;
476
477 rcu_read_lock();
478 for (i = 0; i < vsi->num_queue_pairs; i++) {
479 u64 bytes, packets;
480 unsigned int start;
481
482 ring = READ_ONCE(vsi->tx_rings[i]);
483 if (!ring)
484 continue;
485 i40e_get_netdev_stats_struct_tx(ring, stats);
486
487 if (i40e_enabled_xdp_vsi(vsi)) {
488 ring = READ_ONCE(vsi->xdp_rings[i]);
489 if (!ring)
490 continue;
491 i40e_get_netdev_stats_struct_tx(ring, stats);
492 }
493
494 ring = READ_ONCE(vsi->rx_rings[i]);
495 if (!ring)
496 continue;
497 do {
498 start = u64_stats_fetch_begin(syncp: &ring->syncp);
499 packets = ring->stats.packets;
500 bytes = ring->stats.bytes;
501 } while (u64_stats_fetch_retry(syncp: &ring->syncp, start));
502
503 stats->rx_packets += packets;
504 stats->rx_bytes += bytes;
505
506 }
507 rcu_read_unlock();
508
509 /* following stats updated by i40e_watchdog_subtask() */
510 stats->multicast = vsi_stats->multicast;
511 stats->tx_errors = vsi_stats->tx_errors;
512 stats->tx_dropped = vsi_stats->tx_dropped;
513 stats->rx_errors = vsi_stats->rx_errors;
514 stats->rx_dropped = vsi_stats->rx_dropped;
515 stats->rx_missed_errors = vsi_stats->rx_missed_errors;
516 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
517 stats->rx_length_errors = vsi_stats->rx_length_errors;
518}
519
520/**
521 * i40e_vsi_reset_stats - Resets all stats of the given vsi
522 * @vsi: the VSI to have its stats reset
523 **/
524void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
525{
526 struct rtnl_link_stats64 *ns;
527 int i;
528
529 if (!vsi)
530 return;
531
532 ns = i40e_get_vsi_stats_struct(vsi);
533 memset(ns, 0, sizeof(*ns));
534 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
535 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
536 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
537 if (vsi->rx_rings && vsi->rx_rings[0]) {
538 for (i = 0; i < vsi->num_queue_pairs; i++) {
539 memset(&vsi->rx_rings[i]->stats, 0,
540 sizeof(vsi->rx_rings[i]->stats));
541 memset(&vsi->rx_rings[i]->rx_stats, 0,
542 sizeof(vsi->rx_rings[i]->rx_stats));
543 memset(&vsi->tx_rings[i]->stats, 0,
544 sizeof(vsi->tx_rings[i]->stats));
545 memset(&vsi->tx_rings[i]->tx_stats, 0,
546 sizeof(vsi->tx_rings[i]->tx_stats));
547 }
548 }
549 vsi->stat_offsets_loaded = false;
550}
551
552/**
553 * i40e_pf_reset_stats - Reset all of the stats for the given PF
554 * @pf: the PF to be reset
555 **/
556void i40e_pf_reset_stats(struct i40e_pf *pf)
557{
558 struct i40e_veb *veb;
559 int i;
560
561 memset(&pf->stats, 0, sizeof(pf->stats));
562 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
563 pf->stat_offsets_loaded = false;
564
565 i40e_pf_for_each_veb(pf, i, veb) {
566 memset(&veb->stats, 0, sizeof(veb->stats));
567 memset(&veb->stats_offsets, 0, sizeof(veb->stats_offsets));
568 memset(&veb->tc_stats, 0, sizeof(veb->tc_stats));
569 memset(&veb->tc_stats_offsets, 0, sizeof(veb->tc_stats_offsets));
570 veb->stat_offsets_loaded = false;
571 }
572 pf->hw_csum_rx_error = 0;
573}
574
575/**
576 * i40e_compute_pci_to_hw_id - compute index form PCI function.
577 * @vsi: ptr to the VSI to read from.
578 * @hw: ptr to the hardware info.
579 **/
580static u32 i40e_compute_pci_to_hw_id(struct i40e_vsi *vsi, struct i40e_hw *hw)
581{
582 int pf_count = i40e_get_pf_count(hw);
583
584 if (vsi->type == I40E_VSI_SRIOV)
585 return (hw->port * BIT(7)) / pf_count + vsi->vf_id;
586
587 return hw->port + BIT(7);
588}
589
590/**
591 * i40e_stat_update64 - read and update a 64 bit stat from the chip.
592 * @hw: ptr to the hardware info.
593 * @hireg: the high 32 bit reg to read.
594 * @loreg: the low 32 bit reg to read.
595 * @offset_loaded: has the initial offset been loaded yet.
596 * @offset: ptr to current offset value.
597 * @stat: ptr to the stat.
598 *
599 * Since the device stats are not reset at PFReset, they will not
600 * be zeroed when the driver starts. We'll save the first values read
601 * and use them as offsets to be subtracted from the raw values in order
602 * to report stats that count from zero.
603 **/
604static void i40e_stat_update64(struct i40e_hw *hw, u32 hireg, u32 loreg,
605 bool offset_loaded, u64 *offset, u64 *stat)
606{
607 u64 new_data;
608
609 new_data = rd64(hw, loreg);
610
611 if (!offset_loaded || new_data < *offset)
612 *offset = new_data;
613 *stat = new_data - *offset;
614}
615
616/**
617 * i40e_stat_update48 - read and update a 48 bit stat from the chip
618 * @hw: ptr to the hardware info
619 * @hireg: the high 32 bit reg to read
620 * @loreg: the low 32 bit reg to read
621 * @offset_loaded: has the initial offset been loaded yet
622 * @offset: ptr to current offset value
623 * @stat: ptr to the stat
624 *
625 * Since the device stats are not reset at PFReset, they likely will not
626 * be zeroed when the driver starts. We'll save the first values read
627 * and use them as offsets to be subtracted from the raw values in order
628 * to report stats that count from zero. In the process, we also manage
629 * the potential roll-over.
630 **/
631static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
632 bool offset_loaded, u64 *offset, u64 *stat)
633{
634 u64 new_data;
635
636 if (hw->device_id == I40E_DEV_ID_QEMU) {
637 new_data = rd32(hw, loreg);
638 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
639 } else {
640 new_data = rd64(hw, loreg);
641 }
642 if (!offset_loaded)
643 *offset = new_data;
644 if (likely(new_data >= *offset))
645 *stat = new_data - *offset;
646 else
647 *stat = (new_data + BIT_ULL(48)) - *offset;
648 *stat &= 0xFFFFFFFFFFFFULL;
649}
650
651/**
652 * i40e_stat_update32 - read and update a 32 bit stat from the chip
653 * @hw: ptr to the hardware info
654 * @reg: the hw reg to read
655 * @offset_loaded: has the initial offset been loaded yet
656 * @offset: ptr to current offset value
657 * @stat: ptr to the stat
658 **/
659static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
660 bool offset_loaded, u64 *offset, u64 *stat)
661{
662 u32 new_data;
663
664 new_data = rd32(hw, reg);
665 if (!offset_loaded)
666 *offset = new_data;
667 if (likely(new_data >= *offset))
668 *stat = (u32)(new_data - *offset);
669 else
670 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
671}
672
673/**
674 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
675 * @hw: ptr to the hardware info
676 * @reg: the hw reg to read and clear
677 * @stat: ptr to the stat
678 **/
679static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
680{
681 u32 new_data = rd32(hw, reg);
682
683 wr32(hw, reg, 1); /* must write a nonzero value to clear register */
684 *stat += new_data;
685}
686
687/**
688 * i40e_stats_update_rx_discards - update rx_discards.
689 * @vsi: ptr to the VSI to be updated.
690 * @hw: ptr to the hardware info.
691 * @stat_idx: VSI's stat_counter_idx.
692 * @offset_loaded: ptr to the VSI's stat_offsets_loaded.
693 * @stat_offset: ptr to stat_offset to store first read of specific register.
694 * @stat: ptr to VSI's stat to be updated.
695 **/
696static void
697i40e_stats_update_rx_discards(struct i40e_vsi *vsi, struct i40e_hw *hw,
698 int stat_idx, bool offset_loaded,
699 struct i40e_eth_stats *stat_offset,
700 struct i40e_eth_stats *stat)
701{
702 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), offset_loaded,
703 offset: &stat_offset->rx_discards, stat: &stat->rx_discards);
704 i40e_stat_update64(hw,
705 I40E_GL_RXERR1H(i40e_compute_pci_to_hw_id(vsi, hw)),
706 I40E_GL_RXERR1L(i40e_compute_pci_to_hw_id(vsi, hw)),
707 offset_loaded, offset: &stat_offset->rx_discards_other,
708 stat: &stat->rx_discards_other);
709}
710
711/**
712 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
713 * @vsi: the VSI to be updated
714 **/
715void i40e_update_eth_stats(struct i40e_vsi *vsi)
716{
717 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
718 struct i40e_pf *pf = vsi->back;
719 struct i40e_hw *hw = &pf->hw;
720 struct i40e_eth_stats *oes;
721 struct i40e_eth_stats *es; /* device's eth stats */
722
723 es = &vsi->eth_stats;
724 oes = &vsi->eth_stats_offsets;
725
726 /* Gather up the stats that the hw collects */
727 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
728 offset_loaded: vsi->stat_offsets_loaded,
729 offset: &oes->tx_errors, stat: &es->tx_errors);
730 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
731 offset_loaded: vsi->stat_offsets_loaded,
732 offset: &oes->rx_unknown_protocol, stat: &es->rx_unknown_protocol);
733
734 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
735 I40E_GLV_GORCL(stat_idx),
736 offset_loaded: vsi->stat_offsets_loaded,
737 offset: &oes->rx_bytes, stat: &es->rx_bytes);
738 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
739 I40E_GLV_UPRCL(stat_idx),
740 offset_loaded: vsi->stat_offsets_loaded,
741 offset: &oes->rx_unicast, stat: &es->rx_unicast);
742 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
743 I40E_GLV_MPRCL(stat_idx),
744 offset_loaded: vsi->stat_offsets_loaded,
745 offset: &oes->rx_multicast, stat: &es->rx_multicast);
746 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
747 I40E_GLV_BPRCL(stat_idx),
748 offset_loaded: vsi->stat_offsets_loaded,
749 offset: &oes->rx_broadcast, stat: &es->rx_broadcast);
750
751 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
752 I40E_GLV_GOTCL(stat_idx),
753 offset_loaded: vsi->stat_offsets_loaded,
754 offset: &oes->tx_bytes, stat: &es->tx_bytes);
755 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
756 I40E_GLV_UPTCL(stat_idx),
757 offset_loaded: vsi->stat_offsets_loaded,
758 offset: &oes->tx_unicast, stat: &es->tx_unicast);
759 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
760 I40E_GLV_MPTCL(stat_idx),
761 offset_loaded: vsi->stat_offsets_loaded,
762 offset: &oes->tx_multicast, stat: &es->tx_multicast);
763 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
764 I40E_GLV_BPTCL(stat_idx),
765 offset_loaded: vsi->stat_offsets_loaded,
766 offset: &oes->tx_broadcast, stat: &es->tx_broadcast);
767
768 i40e_stats_update_rx_discards(vsi, hw, stat_idx,
769 offset_loaded: vsi->stat_offsets_loaded, stat_offset: oes, stat: es);
770
771 vsi->stat_offsets_loaded = true;
772}
773
774/**
775 * i40e_update_veb_stats - Update Switch component statistics
776 * @veb: the VEB being updated
777 **/
778void i40e_update_veb_stats(struct i40e_veb *veb)
779{
780 struct i40e_pf *pf = veb->pf;
781 struct i40e_hw *hw = &pf->hw;
782 struct i40e_eth_stats *oes;
783 struct i40e_eth_stats *es; /* device's eth stats */
784 struct i40e_veb_tc_stats *veb_oes;
785 struct i40e_veb_tc_stats *veb_es;
786 int i, idx = 0;
787
788 idx = veb->stats_idx;
789 es = &veb->stats;
790 oes = &veb->stats_offsets;
791 veb_es = &veb->tc_stats;
792 veb_oes = &veb->tc_stats_offsets;
793
794 /* Gather up the stats that the hw collects */
795 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
796 offset_loaded: veb->stat_offsets_loaded,
797 offset: &oes->tx_discards, stat: &es->tx_discards);
798 if (hw->revision_id > 0)
799 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
800 offset_loaded: veb->stat_offsets_loaded,
801 offset: &oes->rx_unknown_protocol,
802 stat: &es->rx_unknown_protocol);
803 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
804 offset_loaded: veb->stat_offsets_loaded,
805 offset: &oes->rx_bytes, stat: &es->rx_bytes);
806 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
807 offset_loaded: veb->stat_offsets_loaded,
808 offset: &oes->rx_unicast, stat: &es->rx_unicast);
809 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
810 offset_loaded: veb->stat_offsets_loaded,
811 offset: &oes->rx_multicast, stat: &es->rx_multicast);
812 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
813 offset_loaded: veb->stat_offsets_loaded,
814 offset: &oes->rx_broadcast, stat: &es->rx_broadcast);
815
816 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
817 offset_loaded: veb->stat_offsets_loaded,
818 offset: &oes->tx_bytes, stat: &es->tx_bytes);
819 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
820 offset_loaded: veb->stat_offsets_loaded,
821 offset: &oes->tx_unicast, stat: &es->tx_unicast);
822 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
823 offset_loaded: veb->stat_offsets_loaded,
824 offset: &oes->tx_multicast, stat: &es->tx_multicast);
825 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
826 offset_loaded: veb->stat_offsets_loaded,
827 offset: &oes->tx_broadcast, stat: &es->tx_broadcast);
828 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
829 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
830 I40E_GLVEBTC_RPCL(i, idx),
831 offset_loaded: veb->stat_offsets_loaded,
832 offset: &veb_oes->tc_rx_packets[i],
833 stat: &veb_es->tc_rx_packets[i]);
834 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
835 I40E_GLVEBTC_RBCL(i, idx),
836 offset_loaded: veb->stat_offsets_loaded,
837 offset: &veb_oes->tc_rx_bytes[i],
838 stat: &veb_es->tc_rx_bytes[i]);
839 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
840 I40E_GLVEBTC_TPCL(i, idx),
841 offset_loaded: veb->stat_offsets_loaded,
842 offset: &veb_oes->tc_tx_packets[i],
843 stat: &veb_es->tc_tx_packets[i]);
844 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
845 I40E_GLVEBTC_TBCL(i, idx),
846 offset_loaded: veb->stat_offsets_loaded,
847 offset: &veb_oes->tc_tx_bytes[i],
848 stat: &veb_es->tc_tx_bytes[i]);
849 }
850 veb->stat_offsets_loaded = true;
851}
852
853/**
854 * i40e_update_vsi_stats - Update the vsi statistics counters.
855 * @vsi: the VSI to be updated
856 *
857 * There are a few instances where we store the same stat in a
858 * couple of different structs. This is partly because we have
859 * the netdev stats that need to be filled out, which is slightly
860 * different from the "eth_stats" defined by the chip and used in
861 * VF communications. We sort it out here.
862 **/
863static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
864{
865 u64 rx_page, rx_buf, rx_reuse, rx_alloc, rx_waive, rx_busy;
866 struct i40e_pf *pf = vsi->back;
867 struct rtnl_link_stats64 *ons;
868 struct rtnl_link_stats64 *ns; /* netdev stats */
869 struct i40e_eth_stats *oes;
870 struct i40e_eth_stats *es; /* device's eth stats */
871 u64 tx_restart, tx_busy;
872 struct i40e_ring *p;
873 u64 bytes, packets;
874 unsigned int start;
875 u64 tx_linearize;
876 u64 tx_force_wb;
877 u64 tx_stopped;
878 u64 rx_p, rx_b;
879 u64 tx_p, tx_b;
880 u16 q;
881
882 if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
883 test_bit(__I40E_CONFIG_BUSY, pf->state))
884 return;
885
886 ns = i40e_get_vsi_stats_struct(vsi);
887 ons = &vsi->net_stats_offsets;
888 es = &vsi->eth_stats;
889 oes = &vsi->eth_stats_offsets;
890
891 /* Gather up the netdev and vsi stats that the driver collects
892 * on the fly during packet processing
893 */
894 rx_b = rx_p = 0;
895 tx_b = tx_p = 0;
896 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
897 tx_stopped = 0;
898 rx_page = 0;
899 rx_buf = 0;
900 rx_reuse = 0;
901 rx_alloc = 0;
902 rx_waive = 0;
903 rx_busy = 0;
904 rcu_read_lock();
905 for (q = 0; q < vsi->num_queue_pairs; q++) {
906 /* locate Tx ring */
907 p = READ_ONCE(vsi->tx_rings[q]);
908 if (!p)
909 continue;
910
911 do {
912 start = u64_stats_fetch_begin(syncp: &p->syncp);
913 packets = p->stats.packets;
914 bytes = p->stats.bytes;
915 } while (u64_stats_fetch_retry(syncp: &p->syncp, start));
916 tx_b += bytes;
917 tx_p += packets;
918 tx_restart += p->tx_stats.restart_queue;
919 tx_busy += p->tx_stats.tx_busy;
920 tx_linearize += p->tx_stats.tx_linearize;
921 tx_force_wb += p->tx_stats.tx_force_wb;
922 tx_stopped += p->tx_stats.tx_stopped;
923
924 /* locate Rx ring */
925 p = READ_ONCE(vsi->rx_rings[q]);
926 if (!p)
927 continue;
928
929 do {
930 start = u64_stats_fetch_begin(syncp: &p->syncp);
931 packets = p->stats.packets;
932 bytes = p->stats.bytes;
933 } while (u64_stats_fetch_retry(syncp: &p->syncp, start));
934 rx_b += bytes;
935 rx_p += packets;
936 rx_buf += p->rx_stats.alloc_buff_failed;
937 rx_page += p->rx_stats.alloc_page_failed;
938 rx_reuse += p->rx_stats.page_reuse_count;
939 rx_alloc += p->rx_stats.page_alloc_count;
940 rx_waive += p->rx_stats.page_waive_count;
941 rx_busy += p->rx_stats.page_busy_count;
942
943 if (i40e_enabled_xdp_vsi(vsi)) {
944 /* locate XDP ring */
945 p = READ_ONCE(vsi->xdp_rings[q]);
946 if (!p)
947 continue;
948
949 do {
950 start = u64_stats_fetch_begin(syncp: &p->syncp);
951 packets = p->stats.packets;
952 bytes = p->stats.bytes;
953 } while (u64_stats_fetch_retry(syncp: &p->syncp, start));
954 tx_b += bytes;
955 tx_p += packets;
956 tx_restart += p->tx_stats.restart_queue;
957 tx_busy += p->tx_stats.tx_busy;
958 tx_linearize += p->tx_stats.tx_linearize;
959 tx_force_wb += p->tx_stats.tx_force_wb;
960 }
961 }
962 rcu_read_unlock();
963 vsi->tx_restart = tx_restart;
964 vsi->tx_busy = tx_busy;
965 vsi->tx_linearize = tx_linearize;
966 vsi->tx_force_wb = tx_force_wb;
967 vsi->tx_stopped = tx_stopped;
968 vsi->rx_page_failed = rx_page;
969 vsi->rx_buf_failed = rx_buf;
970 vsi->rx_page_reuse = rx_reuse;
971 vsi->rx_page_alloc = rx_alloc;
972 vsi->rx_page_waive = rx_waive;
973 vsi->rx_page_busy = rx_busy;
974
975 ns->rx_packets = rx_p;
976 ns->rx_bytes = rx_b;
977 ns->tx_packets = tx_p;
978 ns->tx_bytes = tx_b;
979
980 /* update netdev stats from eth stats */
981 i40e_update_eth_stats(vsi);
982 ons->tx_errors = oes->tx_errors;
983 ns->tx_errors = es->tx_errors;
984 ons->multicast = oes->rx_multicast;
985 ns->multicast = es->rx_multicast;
986 ons->rx_dropped = oes->rx_discards_other;
987 ns->rx_dropped = es->rx_discards_other;
988 ons->rx_missed_errors = oes->rx_discards;
989 ns->rx_missed_errors = es->rx_discards;
990 ons->tx_dropped = oes->tx_discards;
991 ns->tx_dropped = es->tx_discards;
992
993 /* pull in a couple PF stats if this is the main vsi */
994 if (vsi->type == I40E_VSI_MAIN) {
995 ns->rx_crc_errors = pf->stats.crc_errors;
996 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
997 ns->rx_length_errors = pf->stats.rx_length_errors;
998 }
999}
1000
1001/**
1002 * i40e_update_pf_stats - Update the PF statistics counters.
1003 * @pf: the PF to be updated
1004 **/
1005static void i40e_update_pf_stats(struct i40e_pf *pf)
1006{
1007 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
1008 struct i40e_hw_port_stats *nsd = &pf->stats;
1009 struct i40e_hw *hw = &pf->hw;
1010 u32 val;
1011 int i;
1012
1013 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
1014 I40E_GLPRT_GORCL(hw->port),
1015 offset_loaded: pf->stat_offsets_loaded,
1016 offset: &osd->eth.rx_bytes, stat: &nsd->eth.rx_bytes);
1017 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
1018 I40E_GLPRT_GOTCL(hw->port),
1019 offset_loaded: pf->stat_offsets_loaded,
1020 offset: &osd->eth.tx_bytes, stat: &nsd->eth.tx_bytes);
1021 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
1022 offset_loaded: pf->stat_offsets_loaded,
1023 offset: &osd->eth.rx_discards,
1024 stat: &nsd->eth.rx_discards);
1025 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
1026 I40E_GLPRT_UPRCL(hw->port),
1027 offset_loaded: pf->stat_offsets_loaded,
1028 offset: &osd->eth.rx_unicast,
1029 stat: &nsd->eth.rx_unicast);
1030 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
1031 I40E_GLPRT_MPRCL(hw->port),
1032 offset_loaded: pf->stat_offsets_loaded,
1033 offset: &osd->eth.rx_multicast,
1034 stat: &nsd->eth.rx_multicast);
1035 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1036 I40E_GLPRT_BPRCL(hw->port),
1037 offset_loaded: pf->stat_offsets_loaded,
1038 offset: &osd->eth.rx_broadcast,
1039 stat: &nsd->eth.rx_broadcast);
1040 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1041 I40E_GLPRT_UPTCL(hw->port),
1042 offset_loaded: pf->stat_offsets_loaded,
1043 offset: &osd->eth.tx_unicast,
1044 stat: &nsd->eth.tx_unicast);
1045 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1046 I40E_GLPRT_MPTCL(hw->port),
1047 offset_loaded: pf->stat_offsets_loaded,
1048 offset: &osd->eth.tx_multicast,
1049 stat: &nsd->eth.tx_multicast);
1050 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1051 I40E_GLPRT_BPTCL(hw->port),
1052 offset_loaded: pf->stat_offsets_loaded,
1053 offset: &osd->eth.tx_broadcast,
1054 stat: &nsd->eth.tx_broadcast);
1055
1056 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1057 offset_loaded: pf->stat_offsets_loaded,
1058 offset: &osd->tx_dropped_link_down,
1059 stat: &nsd->tx_dropped_link_down);
1060
1061 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1062 offset_loaded: pf->stat_offsets_loaded,
1063 offset: &osd->crc_errors, stat: &nsd->crc_errors);
1064
1065 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1066 offset_loaded: pf->stat_offsets_loaded,
1067 offset: &osd->illegal_bytes, stat: &nsd->illegal_bytes);
1068
1069 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1070 offset_loaded: pf->stat_offsets_loaded,
1071 offset: &osd->mac_local_faults,
1072 stat: &nsd->mac_local_faults);
1073 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1074 offset_loaded: pf->stat_offsets_loaded,
1075 offset: &osd->mac_remote_faults,
1076 stat: &nsd->mac_remote_faults);
1077
1078 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1079 offset_loaded: pf->stat_offsets_loaded,
1080 offset: &osd->rx_length_errors,
1081 stat: &nsd->rx_length_errors);
1082
1083 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1084 offset_loaded: pf->stat_offsets_loaded,
1085 offset: &osd->link_xon_rx, stat: &nsd->link_xon_rx);
1086 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1087 offset_loaded: pf->stat_offsets_loaded,
1088 offset: &osd->link_xon_tx, stat: &nsd->link_xon_tx);
1089 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1090 offset_loaded: pf->stat_offsets_loaded,
1091 offset: &osd->link_xoff_rx, stat: &nsd->link_xoff_rx);
1092 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1093 offset_loaded: pf->stat_offsets_loaded,
1094 offset: &osd->link_xoff_tx, stat: &nsd->link_xoff_tx);
1095
1096 for (i = 0; i < 8; i++) {
1097 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1098 offset_loaded: pf->stat_offsets_loaded,
1099 offset: &osd->priority_xoff_rx[i],
1100 stat: &nsd->priority_xoff_rx[i]);
1101 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1102 offset_loaded: pf->stat_offsets_loaded,
1103 offset: &osd->priority_xon_rx[i],
1104 stat: &nsd->priority_xon_rx[i]);
1105 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1106 offset_loaded: pf->stat_offsets_loaded,
1107 offset: &osd->priority_xon_tx[i],
1108 stat: &nsd->priority_xon_tx[i]);
1109 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1110 offset_loaded: pf->stat_offsets_loaded,
1111 offset: &osd->priority_xoff_tx[i],
1112 stat: &nsd->priority_xoff_tx[i]);
1113 i40e_stat_update32(hw,
1114 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1115 offset_loaded: pf->stat_offsets_loaded,
1116 offset: &osd->priority_xon_2_xoff[i],
1117 stat: &nsd->priority_xon_2_xoff[i]);
1118 }
1119
1120 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1121 I40E_GLPRT_PRC64L(hw->port),
1122 offset_loaded: pf->stat_offsets_loaded,
1123 offset: &osd->rx_size_64, stat: &nsd->rx_size_64);
1124 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1125 I40E_GLPRT_PRC127L(hw->port),
1126 offset_loaded: pf->stat_offsets_loaded,
1127 offset: &osd->rx_size_127, stat: &nsd->rx_size_127);
1128 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1129 I40E_GLPRT_PRC255L(hw->port),
1130 offset_loaded: pf->stat_offsets_loaded,
1131 offset: &osd->rx_size_255, stat: &nsd->rx_size_255);
1132 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1133 I40E_GLPRT_PRC511L(hw->port),
1134 offset_loaded: pf->stat_offsets_loaded,
1135 offset: &osd->rx_size_511, stat: &nsd->rx_size_511);
1136 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1137 I40E_GLPRT_PRC1023L(hw->port),
1138 offset_loaded: pf->stat_offsets_loaded,
1139 offset: &osd->rx_size_1023, stat: &nsd->rx_size_1023);
1140 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1141 I40E_GLPRT_PRC1522L(hw->port),
1142 offset_loaded: pf->stat_offsets_loaded,
1143 offset: &osd->rx_size_1522, stat: &nsd->rx_size_1522);
1144 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1145 I40E_GLPRT_PRC9522L(hw->port),
1146 offset_loaded: pf->stat_offsets_loaded,
1147 offset: &osd->rx_size_big, stat: &nsd->rx_size_big);
1148
1149 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1150 I40E_GLPRT_PTC64L(hw->port),
1151 offset_loaded: pf->stat_offsets_loaded,
1152 offset: &osd->tx_size_64, stat: &nsd->tx_size_64);
1153 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1154 I40E_GLPRT_PTC127L(hw->port),
1155 offset_loaded: pf->stat_offsets_loaded,
1156 offset: &osd->tx_size_127, stat: &nsd->tx_size_127);
1157 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1158 I40E_GLPRT_PTC255L(hw->port),
1159 offset_loaded: pf->stat_offsets_loaded,
1160 offset: &osd->tx_size_255, stat: &nsd->tx_size_255);
1161 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1162 I40E_GLPRT_PTC511L(hw->port),
1163 offset_loaded: pf->stat_offsets_loaded,
1164 offset: &osd->tx_size_511, stat: &nsd->tx_size_511);
1165 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1166 I40E_GLPRT_PTC1023L(hw->port),
1167 offset_loaded: pf->stat_offsets_loaded,
1168 offset: &osd->tx_size_1023, stat: &nsd->tx_size_1023);
1169 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1170 I40E_GLPRT_PTC1522L(hw->port),
1171 offset_loaded: pf->stat_offsets_loaded,
1172 offset: &osd->tx_size_1522, stat: &nsd->tx_size_1522);
1173 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1174 I40E_GLPRT_PTC9522L(hw->port),
1175 offset_loaded: pf->stat_offsets_loaded,
1176 offset: &osd->tx_size_big, stat: &nsd->tx_size_big);
1177
1178 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1179 offset_loaded: pf->stat_offsets_loaded,
1180 offset: &osd->rx_undersize, stat: &nsd->rx_undersize);
1181 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1182 offset_loaded: pf->stat_offsets_loaded,
1183 offset: &osd->rx_fragments, stat: &nsd->rx_fragments);
1184 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1185 offset_loaded: pf->stat_offsets_loaded,
1186 offset: &osd->rx_oversize, stat: &nsd->rx_oversize);
1187 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1188 offset_loaded: pf->stat_offsets_loaded,
1189 offset: &osd->rx_jabber, stat: &nsd->rx_jabber);
1190
1191 /* FDIR stats */
1192 i40e_stat_update_and_clear32(hw,
1193 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1194 stat: &nsd->fd_atr_match);
1195 i40e_stat_update_and_clear32(hw,
1196 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1197 stat: &nsd->fd_sb_match);
1198 i40e_stat_update_and_clear32(hw,
1199 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1200 stat: &nsd->fd_atr_tunnel_match);
1201
1202 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1203 nsd->tx_lpi_status =
1204 FIELD_GET(I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK, val);
1205 nsd->rx_lpi_status =
1206 FIELD_GET(I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK, val);
1207 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1208 offset_loaded: pf->stat_offsets_loaded,
1209 offset: &osd->tx_lpi_count, stat: &nsd->tx_lpi_count);
1210 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1211 offset_loaded: pf->stat_offsets_loaded,
1212 offset: &osd->rx_lpi_count, stat: &nsd->rx_lpi_count);
1213
1214 if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) &&
1215 !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1216 nsd->fd_sb_status = true;
1217 else
1218 nsd->fd_sb_status = false;
1219
1220 if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
1221 !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1222 nsd->fd_atr_status = true;
1223 else
1224 nsd->fd_atr_status = false;
1225
1226 pf->stat_offsets_loaded = true;
1227}
1228
1229/**
1230 * i40e_update_stats - Update the various statistics counters.
1231 * @vsi: the VSI to be updated
1232 *
1233 * Update the various stats for this VSI and its related entities.
1234 **/
1235void i40e_update_stats(struct i40e_vsi *vsi)
1236{
1237 struct i40e_pf *pf = vsi->back;
1238
1239 if (vsi->type == I40E_VSI_MAIN)
1240 i40e_update_pf_stats(pf);
1241
1242 i40e_update_vsi_stats(vsi);
1243}
1244
1245/**
1246 * i40e_count_all_filters - counts VSI MAC filters
1247 * @vsi: the VSI to be searched
1248 *
1249 * Return: count of MAC filters in any state.
1250 */
1251int i40e_count_all_filters(struct i40e_vsi *vsi)
1252{
1253 struct i40e_mac_filter *f;
1254 struct hlist_node *h;
1255 int bkt, cnt = 0;
1256
1257 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1258 cnt++;
1259
1260 return cnt;
1261}
1262
1263/**
1264 * i40e_count_active_filters - counts VSI MAC filters
1265 * @vsi: the VSI to be searched
1266 *
1267 * Return: count of active MAC filters.
1268 */
1269int i40e_count_active_filters(struct i40e_vsi *vsi)
1270{
1271 struct i40e_mac_filter *f;
1272 struct hlist_node *h;
1273 int bkt;
1274 int cnt = 0;
1275
1276 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1277 if (f->state == I40E_FILTER_NEW ||
1278 f->state == I40E_FILTER_NEW_SYNC ||
1279 f->state == I40E_FILTER_ACTIVE)
1280 ++cnt;
1281 }
1282
1283 return cnt;
1284}
1285
1286/**
1287 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1288 * @vsi: the VSI to be searched
1289 * @macaddr: the MAC address
1290 * @vlan: the vlan
1291 *
1292 * Returns ptr to the filter object or NULL
1293 **/
1294static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1295 const u8 *macaddr, s16 vlan)
1296{
1297 struct i40e_mac_filter *f;
1298 u64 key;
1299
1300 if (!vsi || !macaddr)
1301 return NULL;
1302
1303 key = i40e_addr_to_hkey(macaddr);
1304 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1305 if ((ether_addr_equal(addr1: macaddr, addr2: f->macaddr)) &&
1306 (vlan == f->vlan))
1307 return f;
1308 }
1309 return NULL;
1310}
1311
1312/**
1313 * i40e_find_mac - Find a mac addr in the macvlan filters list
1314 * @vsi: the VSI to be searched
1315 * @macaddr: the MAC address we are searching for
1316 *
1317 * Returns the first filter with the provided MAC address or NULL if
1318 * MAC address was not found
1319 **/
1320struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1321{
1322 struct i40e_mac_filter *f;
1323 u64 key;
1324
1325 if (!vsi || !macaddr)
1326 return NULL;
1327
1328 key = i40e_addr_to_hkey(macaddr);
1329 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1330 if ((ether_addr_equal(addr1: macaddr, addr2: f->macaddr)))
1331 return f;
1332 }
1333 return NULL;
1334}
1335
1336/**
1337 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1338 * @vsi: the VSI to be searched
1339 *
1340 * Returns true if VSI is in vlan mode or false otherwise
1341 **/
1342bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1343{
1344 /* If we have a PVID, always operate in VLAN mode */
1345 if (vsi->info.pvid)
1346 return true;
1347
1348 /* We need to operate in VLAN mode whenever we have any filters with
1349 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1350 * time, incurring search cost repeatedly. However, we can notice two
1351 * things:
1352 *
1353 * 1) the only place where we can gain a VLAN filter is in
1354 * i40e_add_filter.
1355 *
1356 * 2) the only place where filters are actually removed is in
1357 * i40e_sync_filters_subtask.
1358 *
1359 * Thus, we can simply use a boolean value, has_vlan_filters which we
1360 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1361 * we have to perform the full search after deleting filters in
1362 * i40e_sync_filters_subtask, but we already have to search
1363 * filters here and can perform the check at the same time. This
1364 * results in avoiding embedding a loop for VLAN mode inside another
1365 * loop over all the filters, and should maintain correctness as noted
1366 * above.
1367 */
1368 return vsi->has_vlan_filter;
1369}
1370
1371/**
1372 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1373 * @vsi: the VSI to configure
1374 * @tmp_add_list: list of filters ready to be added
1375 * @tmp_del_list: list of filters ready to be deleted
1376 * @vlan_filters: the number of active VLAN filters
1377 *
1378 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1379 * behave as expected. If we have any active VLAN filters remaining or about
1380 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1381 * so that they only match against untagged traffic. If we no longer have any
1382 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1383 * so that they match against both tagged and untagged traffic. In this way,
1384 * we ensure that we correctly receive the desired traffic. This ensures that
1385 * when we have an active VLAN we will receive only untagged traffic and
1386 * traffic matching active VLANs. If we have no active VLANs then we will
1387 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1388 *
1389 * Finally, in a similar fashion, this function also corrects filters when
1390 * there is an active PVID assigned to this VSI.
1391 *
1392 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1393 *
1394 * This function is only expected to be called from within
1395 * i40e_sync_vsi_filters.
1396 *
1397 * NOTE: This function expects to be called while under the
1398 * mac_filter_hash_lock
1399 */
1400static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1401 struct hlist_head *tmp_add_list,
1402 struct hlist_head *tmp_del_list,
1403 int vlan_filters)
1404{
1405 s16 pvid = le16_to_cpu(vsi->info.pvid);
1406 struct i40e_mac_filter *f, *add_head;
1407 struct i40e_new_mac_filter *new;
1408 struct hlist_node *h;
1409 int bkt, new_vlan;
1410
1411 /* To determine if a particular filter needs to be replaced we
1412 * have the three following conditions:
1413 *
1414 * a) if we have a PVID assigned, then all filters which are
1415 * not marked as VLAN=PVID must be replaced with filters that
1416 * are.
1417 * b) otherwise, if we have any active VLANS, all filters
1418 * which are marked as VLAN=-1 must be replaced with
1419 * filters marked as VLAN=0
1420 * c) finally, if we do not have any active VLANS, all filters
1421 * which are marked as VLAN=0 must be replaced with filters
1422 * marked as VLAN=-1
1423 */
1424
1425 /* Update the filters about to be added in place */
1426 hlist_for_each_entry(new, tmp_add_list, hlist) {
1427 if (pvid && new->f->vlan != pvid)
1428 new->f->vlan = pvid;
1429 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1430 new->f->vlan = 0;
1431 else if (!vlan_filters && new->f->vlan == 0)
1432 new->f->vlan = I40E_VLAN_ANY;
1433 }
1434
1435 /* Update the remaining active filters */
1436 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1437 /* Combine the checks for whether a filter needs to be changed
1438 * and then determine the new VLAN inside the if block, in
1439 * order to avoid duplicating code for adding the new filter
1440 * then deleting the old filter.
1441 */
1442 if ((pvid && f->vlan != pvid) ||
1443 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1444 (!vlan_filters && f->vlan == 0)) {
1445 /* Determine the new vlan we will be adding */
1446 if (pvid)
1447 new_vlan = pvid;
1448 else if (vlan_filters)
1449 new_vlan = 0;
1450 else
1451 new_vlan = I40E_VLAN_ANY;
1452
1453 /* Create the new filter */
1454 add_head = i40e_add_filter(vsi, macaddr: f->macaddr, vlan: new_vlan);
1455 if (!add_head)
1456 return -ENOMEM;
1457
1458 /* Create a temporary i40e_new_mac_filter */
1459 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1460 if (!new)
1461 return -ENOMEM;
1462
1463 new->f = add_head;
1464 new->state = add_head->state;
1465 if (add_head->state == I40E_FILTER_NEW)
1466 add_head->state = I40E_FILTER_NEW_SYNC;
1467
1468 /* Add the new filter to the tmp list */
1469 hlist_add_head(n: &new->hlist, h: tmp_add_list);
1470
1471 /* Put the original filter into the delete list */
1472 f->state = I40E_FILTER_REMOVE;
1473 hash_del(node: &f->hlist);
1474 hlist_add_head(n: &f->hlist, h: tmp_del_list);
1475 }
1476 }
1477
1478 vsi->has_vlan_filter = !!vlan_filters;
1479
1480 return 0;
1481}
1482
1483/**
1484 * i40e_get_vf_new_vlan - Get new vlan id on a vf
1485 * @vsi: the vsi to configure
1486 * @new_mac: new mac filter to be added
1487 * @f: existing mac filter, replaced with new_mac->f if new_mac is not NULL
1488 * @vlan_filters: the number of active VLAN filters
1489 * @trusted: flag if the VF is trusted
1490 *
1491 * Get new VLAN id based on current VLAN filters, trust, PVID
1492 * and vf-vlan-prune-disable flag.
1493 *
1494 * Returns the value of the new vlan filter or
1495 * the old value if no new filter is needed.
1496 */
1497static s16 i40e_get_vf_new_vlan(struct i40e_vsi *vsi,
1498 struct i40e_new_mac_filter *new_mac,
1499 struct i40e_mac_filter *f,
1500 int vlan_filters,
1501 bool trusted)
1502{
1503 s16 pvid = le16_to_cpu(vsi->info.pvid);
1504 struct i40e_pf *pf = vsi->back;
1505 bool is_any;
1506
1507 if (new_mac)
1508 f = new_mac->f;
1509
1510 if (pvid && f->vlan != pvid)
1511 return pvid;
1512
1513 is_any = (trusted ||
1514 !test_bit(I40E_FLAG_VF_VLAN_PRUNING_ENA, pf->flags));
1515
1516 if ((vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1517 (!is_any && !vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1518 (is_any && !vlan_filters && f->vlan == 0)) {
1519 if (is_any)
1520 return I40E_VLAN_ANY;
1521 else
1522 return 0;
1523 }
1524
1525 return f->vlan;
1526}
1527
1528/**
1529 * i40e_correct_vf_mac_vlan_filters - Correct non-VLAN VF filters if necessary
1530 * @vsi: the vsi to configure
1531 * @tmp_add_list: list of filters ready to be added
1532 * @tmp_del_list: list of filters ready to be deleted
1533 * @vlan_filters: the number of active VLAN filters
1534 * @trusted: flag if the VF is trusted
1535 *
1536 * Correct VF VLAN filters based on current VLAN filters, trust, PVID
1537 * and vf-vlan-prune-disable flag.
1538 *
1539 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1540 *
1541 * This function is only expected to be called from within
1542 * i40e_sync_vsi_filters.
1543 *
1544 * NOTE: This function expects to be called while under the
1545 * mac_filter_hash_lock
1546 */
1547static int i40e_correct_vf_mac_vlan_filters(struct i40e_vsi *vsi,
1548 struct hlist_head *tmp_add_list,
1549 struct hlist_head *tmp_del_list,
1550 int vlan_filters,
1551 bool trusted)
1552{
1553 struct i40e_mac_filter *f, *add_head;
1554 struct i40e_new_mac_filter *new_mac;
1555 struct hlist_node *h;
1556 int bkt, new_vlan;
1557
1558 hlist_for_each_entry(new_mac, tmp_add_list, hlist) {
1559 new_mac->f->vlan = i40e_get_vf_new_vlan(vsi, new_mac, NULL,
1560 vlan_filters, trusted);
1561 }
1562
1563 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1564 new_vlan = i40e_get_vf_new_vlan(vsi, NULL, f, vlan_filters,
1565 trusted);
1566 if (new_vlan != f->vlan) {
1567 add_head = i40e_add_filter(vsi, macaddr: f->macaddr, vlan: new_vlan);
1568 if (!add_head)
1569 return -ENOMEM;
1570 /* Create a temporary i40e_new_mac_filter */
1571 new_mac = kzalloc(sizeof(*new_mac), GFP_ATOMIC);
1572 if (!new_mac)
1573 return -ENOMEM;
1574 new_mac->f = add_head;
1575 new_mac->state = add_head->state;
1576 if (add_head->state == I40E_FILTER_NEW)
1577 add_head->state = I40E_FILTER_NEW_SYNC;
1578
1579 /* Add the new filter to the tmp list */
1580 hlist_add_head(n: &new_mac->hlist, h: tmp_add_list);
1581
1582 /* Put the original filter into the delete list */
1583 f->state = I40E_FILTER_REMOVE;
1584 hash_del(node: &f->hlist);
1585 hlist_add_head(n: &f->hlist, h: tmp_del_list);
1586 }
1587 }
1588
1589 vsi->has_vlan_filter = !!vlan_filters;
1590 return 0;
1591}
1592
1593/**
1594 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1595 * @vsi: the PF Main VSI - inappropriate for any other VSI
1596 * @macaddr: the MAC address
1597 *
1598 * Remove whatever filter the firmware set up so the driver can manage
1599 * its own filtering intelligently.
1600 **/
1601static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1602{
1603 struct i40e_aqc_remove_macvlan_element_data element;
1604 struct i40e_pf *pf = vsi->back;
1605
1606 /* Only appropriate for the PF main VSI */
1607 if (vsi->type != I40E_VSI_MAIN)
1608 return;
1609
1610 memset(&element, 0, sizeof(element));
1611 ether_addr_copy(dst: element.mac_addr, src: macaddr);
1612 element.vlan_tag = 0;
1613 /* Ignore error returns, some firmware does it this way... */
1614 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1615 i40e_aq_remove_macvlan(hw: &pf->hw, vsi_id: vsi->seid, mv_list: &element, count: 1, NULL);
1616
1617 memset(&element, 0, sizeof(element));
1618 ether_addr_copy(dst: element.mac_addr, src: macaddr);
1619 element.vlan_tag = 0;
1620 /* ...and some firmware does it this way. */
1621 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1622 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1623 i40e_aq_remove_macvlan(hw: &pf->hw, vsi_id: vsi->seid, mv_list: &element, count: 1, NULL);
1624}
1625
1626/**
1627 * i40e_add_filter - Add a mac/vlan filter to the VSI
1628 * @vsi: the VSI to be searched
1629 * @macaddr: the MAC address
1630 * @vlan: the vlan
1631 *
1632 * Returns ptr to the filter object or NULL when no memory available.
1633 *
1634 * NOTE: This function is expected to be called with mac_filter_hash_lock
1635 * being held.
1636 **/
1637struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1638 const u8 *macaddr, s16 vlan)
1639{
1640 struct i40e_mac_filter *f;
1641 u64 key;
1642
1643 if (!vsi || !macaddr)
1644 return NULL;
1645
1646 f = i40e_find_filter(vsi, macaddr, vlan);
1647 if (!f) {
1648 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1649 if (!f)
1650 return NULL;
1651
1652 /* Update the boolean indicating if we need to function in
1653 * VLAN mode.
1654 */
1655 if (vlan >= 0)
1656 vsi->has_vlan_filter = true;
1657
1658 ether_addr_copy(dst: f->macaddr, src: macaddr);
1659 f->vlan = vlan;
1660 f->state = I40E_FILTER_NEW;
1661 INIT_HLIST_NODE(h: &f->hlist);
1662
1663 key = i40e_addr_to_hkey(macaddr);
1664 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1665
1666 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1667 set_bit(nr: __I40E_MACVLAN_SYNC_PENDING, addr: vsi->back->state);
1668 }
1669
1670 /* If we're asked to add a filter that has been marked for removal, it
1671 * is safe to simply restore it to active state. __i40e_del_filter
1672 * will have simply deleted any filters which were previously marked
1673 * NEW or FAILED, so if it is currently marked REMOVE it must have
1674 * previously been ACTIVE. Since we haven't yet run the sync filters
1675 * task, just restore this filter to the ACTIVE state so that the
1676 * sync task leaves it in place
1677 */
1678 if (f->state == I40E_FILTER_REMOVE)
1679 f->state = I40E_FILTER_ACTIVE;
1680
1681 return f;
1682}
1683
1684/**
1685 * __i40e_del_filter - Remove a specific filter from the VSI
1686 * @vsi: VSI to remove from
1687 * @f: the filter to remove from the list
1688 *
1689 * This function requires you've found * the exact filter you will remove
1690 * already, such as via i40e_find_filter or i40e_find_mac.
1691 *
1692 * NOTE: This function is expected to be called with mac_filter_hash_lock
1693 * being held.
1694 * ANOTHER NOTE: This function MUST be called from within the context of
1695 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1696 * instead of list_for_each_entry().
1697 **/
1698void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1699{
1700 if (!f)
1701 return;
1702
1703 /* If the filter was never added to firmware then we can just delete it
1704 * directly and we don't want to set the status to remove or else an
1705 * admin queue command will unnecessarily fire.
1706 */
1707 if ((f->state == I40E_FILTER_FAILED) ||
1708 (f->state == I40E_FILTER_NEW)) {
1709 hash_del(node: &f->hlist);
1710 kfree(objp: f);
1711 } else {
1712 f->state = I40E_FILTER_REMOVE;
1713 }
1714
1715 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1716 set_bit(nr: __I40E_MACVLAN_SYNC_PENDING, addr: vsi->back->state);
1717}
1718
1719/**
1720 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1721 * @vsi: the VSI to be searched
1722 * @macaddr: the mac address to be filtered
1723 *
1724 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1725 * go through all the macvlan filters and add a macvlan filter for each
1726 * unique vlan that already exists. If a PVID has been assigned, instead only
1727 * add the macaddr to that VLAN.
1728 *
1729 * Returns last filter added on success, else NULL
1730 **/
1731struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1732 const u8 *macaddr)
1733{
1734 struct i40e_mac_filter *f, *add = NULL;
1735 struct hlist_node *h;
1736 int bkt;
1737
1738 lockdep_assert_held(&vsi->mac_filter_hash_lock);
1739 if (vsi->info.pvid)
1740 return i40e_add_filter(vsi, macaddr,
1741 le16_to_cpu(vsi->info.pvid));
1742
1743 if (!i40e_is_vsi_in_vlan(vsi))
1744 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1745
1746 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1747 if (f->state == I40E_FILTER_REMOVE)
1748 continue;
1749 add = i40e_add_filter(vsi, macaddr, vlan: f->vlan);
1750 if (!add)
1751 return NULL;
1752 }
1753
1754 return add;
1755}
1756
1757/**
1758 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1759 * @vsi: the VSI to be searched
1760 * @macaddr: the mac address to be removed
1761 *
1762 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1763 * associated with.
1764 *
1765 * Returns 0 for success, or error
1766 **/
1767int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1768{
1769 struct i40e_mac_filter *f;
1770 struct hlist_node *h;
1771 bool found = false;
1772 int bkt;
1773
1774 lockdep_assert_held(&vsi->mac_filter_hash_lock);
1775 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1776 if (ether_addr_equal(addr1: macaddr, addr2: f->macaddr)) {
1777 __i40e_del_filter(vsi, f);
1778 found = true;
1779 }
1780 }
1781
1782 if (found)
1783 return 0;
1784 else
1785 return -ENOENT;
1786}
1787
1788/**
1789 * i40e_set_mac - NDO callback to set mac address
1790 * @netdev: network interface device structure
1791 * @p: pointer to an address structure
1792 *
1793 * Returns 0 on success, negative on failure
1794 **/
1795static int i40e_set_mac(struct net_device *netdev, void *p)
1796{
1797 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
1798 struct i40e_vsi *vsi = np->vsi;
1799 struct i40e_pf *pf = vsi->back;
1800 struct i40e_hw *hw = &pf->hw;
1801 struct sockaddr *addr = p;
1802
1803 if (!is_valid_ether_addr(addr: addr->sa_data))
1804 return -EADDRNOTAVAIL;
1805
1806 if (test_bit(__I40E_DOWN, pf->state) ||
1807 test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1808 return -EADDRNOTAVAIL;
1809
1810 if (ether_addr_equal(addr1: hw->mac.addr, addr2: addr->sa_data))
1811 netdev_info(dev: netdev, format: "returning to hw mac address %pM\n",
1812 hw->mac.addr);
1813 else
1814 netdev_info(dev: netdev, format: "set new mac address %pM\n", addr->sa_data);
1815
1816 /* Copy the address first, so that we avoid a possible race with
1817 * .set_rx_mode().
1818 * - Remove old address from MAC filter
1819 * - Copy new address
1820 * - Add new address to MAC filter
1821 */
1822 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
1823 i40e_del_mac_filter(vsi, macaddr: netdev->dev_addr);
1824 eth_hw_addr_set(dev: netdev, addr: addr->sa_data);
1825 i40e_add_mac_filter(vsi, macaddr: netdev->dev_addr);
1826 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
1827
1828 if (vsi->type == I40E_VSI_MAIN) {
1829 int ret;
1830
1831 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1832 mac_addr: addr->sa_data, NULL);
1833 if (ret)
1834 netdev_info(dev: netdev, format: "Ignoring error from firmware on LAA update, status %pe, AQ ret %s\n",
1835 ERR_PTR(error: ret),
1836 libie_aq_str(err: hw->aq.asq_last_status));
1837 }
1838
1839 /* schedule our worker thread which will take care of
1840 * applying the new filter changes
1841 */
1842 i40e_service_event_schedule(pf);
1843 return 0;
1844}
1845
1846/**
1847 * i40e_config_rss_aq - Prepare for RSS using AQ commands
1848 * @vsi: vsi structure
1849 * @seed: RSS hash seed
1850 * @lut: pointer to lookup table of lut_size
1851 * @lut_size: size of the lookup table
1852 **/
1853static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1854 u8 *lut, u16 lut_size)
1855{
1856 struct i40e_pf *pf = vsi->back;
1857 struct i40e_hw *hw = &pf->hw;
1858 int ret = 0;
1859
1860 if (seed) {
1861 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1862 (struct i40e_aqc_get_set_rss_key_data *)seed;
1863 ret = i40e_aq_set_rss_key(hw, seid: vsi->id, key: seed_dw);
1864 if (ret) {
1865 dev_info(&pf->pdev->dev,
1866 "Cannot set RSS key, err %pe aq_err %s\n",
1867 ERR_PTR(ret),
1868 libie_aq_str(hw->aq.asq_last_status));
1869 return ret;
1870 }
1871 }
1872 if (lut) {
1873 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1874
1875 ret = i40e_aq_set_rss_lut(hw, seid: vsi->id, pf_lut, lut, lut_size);
1876 if (ret) {
1877 dev_info(&pf->pdev->dev,
1878 "Cannot set RSS lut, err %pe aq_err %s\n",
1879 ERR_PTR(ret),
1880 libie_aq_str(hw->aq.asq_last_status));
1881 return ret;
1882 }
1883 }
1884 return ret;
1885}
1886
1887/**
1888 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1889 * @vsi: VSI structure
1890 **/
1891static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1892{
1893 struct i40e_pf *pf = vsi->back;
1894 u8 seed[I40E_HKEY_ARRAY_SIZE];
1895 u8 *lut;
1896 int ret;
1897
1898 if (!test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps))
1899 return 0;
1900 if (!vsi->rss_size)
1901 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1902 vsi->num_queue_pairs);
1903 if (!vsi->rss_size)
1904 return -EINVAL;
1905 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1906 if (!lut)
1907 return -ENOMEM;
1908
1909 /* Use the user configured hash keys and lookup table if there is one,
1910 * otherwise use default
1911 */
1912 if (vsi->rss_lut_user)
1913 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1914 else
1915 i40e_fill_rss_lut(pf, lut, rss_table_size: vsi->rss_table_size, rss_size: vsi->rss_size);
1916 if (vsi->rss_hkey_user)
1917 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1918 else
1919 netdev_rss_key_fill(buffer: (void *)seed, I40E_HKEY_ARRAY_SIZE);
1920 ret = i40e_config_rss_aq(vsi, seed, lut, lut_size: vsi->rss_table_size);
1921 kfree(objp: lut);
1922 return ret;
1923}
1924
1925/**
1926 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1927 * @vsi: the VSI being configured,
1928 * @ctxt: VSI context structure
1929 * @enabled_tc: number of traffic classes to enable
1930 *
1931 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1932 **/
1933static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1934 struct i40e_vsi_context *ctxt,
1935 u8 enabled_tc)
1936{
1937 u16 qcount = 0, max_qcount, qmap, sections = 0;
1938 int i, override_q, pow, num_qps, ret;
1939 u8 netdev_tc = 0, offset = 0;
1940
1941 if (vsi->type != I40E_VSI_MAIN)
1942 return -EINVAL;
1943 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1944 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1945 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1946 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1947 num_qps = vsi->mqprio_qopt.qopt.count[0];
1948
1949 /* find the next higher power-of-2 of num queue pairs */
1950 pow = ilog2(num_qps);
1951 if (!is_power_of_2(n: num_qps))
1952 pow++;
1953 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1954 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1955
1956 /* Setup queue offset/count for all TCs for given VSI */
1957 max_qcount = vsi->mqprio_qopt.qopt.count[0];
1958 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1959 /* See if the given TC is enabled for the given VSI */
1960 if (vsi->tc_config.enabled_tc & BIT(i)) {
1961 offset = vsi->mqprio_qopt.qopt.offset[i];
1962 qcount = vsi->mqprio_qopt.qopt.count[i];
1963 if (qcount > max_qcount)
1964 max_qcount = qcount;
1965 vsi->tc_config.tc_info[i].qoffset = offset;
1966 vsi->tc_config.tc_info[i].qcount = qcount;
1967 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1968 } else {
1969 /* TC is not enabled so set the offset to
1970 * default queue and allocate one queue
1971 * for the given TC.
1972 */
1973 vsi->tc_config.tc_info[i].qoffset = 0;
1974 vsi->tc_config.tc_info[i].qcount = 1;
1975 vsi->tc_config.tc_info[i].netdev_tc = 0;
1976 }
1977 }
1978
1979 /* Set actual Tx/Rx queue pairs */
1980 vsi->num_queue_pairs = offset + qcount;
1981
1982 /* Setup queue TC[0].qmap for given VSI context */
1983 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1984 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1985 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1986 ctxt->info.valid_sections |= cpu_to_le16(sections);
1987
1988 /* Reconfigure RSS for main VSI with max queue count */
1989 vsi->rss_size = max_qcount;
1990 ret = i40e_vsi_config_rss(vsi);
1991 if (ret) {
1992 dev_info(&vsi->back->pdev->dev,
1993 "Failed to reconfig rss for num_queues (%u)\n",
1994 max_qcount);
1995 return ret;
1996 }
1997 vsi->reconfig_rss = true;
1998 dev_dbg(&vsi->back->pdev->dev,
1999 "Reconfigured rss with num_queues (%u)\n", max_qcount);
2000
2001 /* Find queue count available for channel VSIs and starting offset
2002 * for channel VSIs
2003 */
2004 override_q = vsi->mqprio_qopt.qopt.count[0];
2005 if (override_q && override_q < vsi->num_queue_pairs) {
2006 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
2007 vsi->next_base_queue = override_q;
2008 }
2009 return 0;
2010}
2011
2012/**
2013 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
2014 * @vsi: the VSI being setup
2015 * @ctxt: VSI context structure
2016 * @enabled_tc: Enabled TCs bitmap
2017 * @is_add: True if called before Add VSI
2018 *
2019 * Setup VSI queue mapping for enabled traffic classes.
2020 **/
2021static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
2022 struct i40e_vsi_context *ctxt,
2023 u8 enabled_tc,
2024 bool is_add)
2025{
2026 struct i40e_pf *pf = vsi->back;
2027 u16 num_tc_qps = 0;
2028 u16 sections = 0;
2029 u8 netdev_tc = 0;
2030 u16 numtc = 1;
2031 u16 qcount;
2032 u8 offset;
2033 u16 qmap;
2034 int i;
2035
2036 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
2037 offset = 0;
2038 /* zero out queue mapping, it will get updated on the end of the function */
2039 memset(ctxt->info.queue_mapping, 0, sizeof(ctxt->info.queue_mapping));
2040
2041 if (vsi->type == I40E_VSI_MAIN) {
2042 /* This code helps add more queue to the VSI if we have
2043 * more cores than RSS can support, the higher cores will
2044 * be served by ATR or other filters. Furthermore, the
2045 * non-zero req_queue_pairs says that user requested a new
2046 * queue count via ethtool's set_channels, so use this
2047 * value for queues distribution across traffic classes
2048 * We need at least one queue pair for the interface
2049 * to be usable as we see in else statement.
2050 */
2051 if (vsi->req_queue_pairs > 0)
2052 vsi->num_queue_pairs = vsi->req_queue_pairs;
2053 else if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
2054 vsi->num_queue_pairs = pf->num_lan_msix;
2055 else
2056 vsi->num_queue_pairs = 1;
2057 }
2058
2059 /* Number of queues per enabled TC */
2060 if (vsi->type == I40E_VSI_MAIN ||
2061 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs != 0))
2062 num_tc_qps = vsi->num_queue_pairs;
2063 else
2064 num_tc_qps = vsi->alloc_queue_pairs;
2065
2066 if (enabled_tc && test_bit(I40E_FLAG_DCB_ENA, vsi->back->flags)) {
2067 /* Find numtc from enabled TC bitmap */
2068 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
2069 if (enabled_tc & BIT(i)) /* TC is enabled */
2070 numtc++;
2071 }
2072 if (!numtc) {
2073 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
2074 numtc = 1;
2075 }
2076 num_tc_qps = num_tc_qps / numtc;
2077 num_tc_qps = min_t(int, num_tc_qps,
2078 i40e_pf_get_max_q_per_tc(pf));
2079 }
2080
2081 vsi->tc_config.numtc = numtc;
2082 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
2083
2084 /* Do not allow use more TC queue pairs than MSI-X vectors exist */
2085 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
2086 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
2087
2088 /* Setup queue offset/count for all TCs for given VSI */
2089 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
2090 /* See if the given TC is enabled for the given VSI */
2091 if (vsi->tc_config.enabled_tc & BIT(i)) {
2092 /* TC is enabled */
2093 int pow, num_qps;
2094
2095 switch (vsi->type) {
2096 case I40E_VSI_MAIN:
2097 if ((!test_bit(I40E_FLAG_FD_SB_ENA,
2098 pf->flags) &&
2099 !test_bit(I40E_FLAG_FD_ATR_ENA,
2100 pf->flags)) ||
2101 vsi->tc_config.enabled_tc != 1) {
2102 qcount = min_t(int, pf->alloc_rss_size,
2103 num_tc_qps);
2104 break;
2105 }
2106 fallthrough;
2107 case I40E_VSI_FDIR:
2108 case I40E_VSI_SRIOV:
2109 case I40E_VSI_VMDQ2:
2110 default:
2111 qcount = num_tc_qps;
2112 WARN_ON(i != 0);
2113 break;
2114 }
2115 vsi->tc_config.tc_info[i].qoffset = offset;
2116 vsi->tc_config.tc_info[i].qcount = qcount;
2117
2118 /* find the next higher power-of-2 of num queue pairs */
2119 num_qps = qcount;
2120 pow = 0;
2121 while (num_qps && (BIT_ULL(pow) < qcount)) {
2122 pow++;
2123 num_qps >>= 1;
2124 }
2125
2126 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
2127 qmap =
2128 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
2129 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
2130
2131 offset += qcount;
2132 } else {
2133 /* TC is not enabled so set the offset to
2134 * default queue and allocate one queue
2135 * for the given TC.
2136 */
2137 vsi->tc_config.tc_info[i].qoffset = 0;
2138 vsi->tc_config.tc_info[i].qcount = 1;
2139 vsi->tc_config.tc_info[i].netdev_tc = 0;
2140
2141 qmap = 0;
2142 }
2143 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
2144 }
2145 /* Do not change previously set num_queue_pairs for PFs and VFs*/
2146 if ((vsi->type == I40E_VSI_MAIN && numtc != 1) ||
2147 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs == 0) ||
2148 (vsi->type != I40E_VSI_MAIN && vsi->type != I40E_VSI_SRIOV))
2149 vsi->num_queue_pairs = offset;
2150
2151 /* Scheduler section valid can only be set for ADD VSI */
2152 if (is_add) {
2153 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
2154
2155 ctxt->info.up_enable_bits = enabled_tc;
2156 }
2157 if (vsi->type == I40E_VSI_SRIOV) {
2158 ctxt->info.mapping_flags |=
2159 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
2160 for (i = 0; i < vsi->num_queue_pairs; i++)
2161 ctxt->info.queue_mapping[i] =
2162 cpu_to_le16(vsi->base_queue + i);
2163 } else {
2164 ctxt->info.mapping_flags |=
2165 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
2166 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
2167 }
2168 ctxt->info.valid_sections |= cpu_to_le16(sections);
2169}
2170
2171/**
2172 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
2173 * @netdev: the netdevice
2174 * @addr: address to add
2175 *
2176 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
2177 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2178 */
2179static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
2180{
2181 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
2182 struct i40e_vsi *vsi = np->vsi;
2183
2184 if (i40e_add_mac_filter(vsi, macaddr: addr))
2185 return 0;
2186 else
2187 return -ENOMEM;
2188}
2189
2190/**
2191 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
2192 * @netdev: the netdevice
2193 * @addr: address to add
2194 *
2195 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
2196 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2197 */
2198static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
2199{
2200 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
2201 struct i40e_vsi *vsi = np->vsi;
2202
2203 /* Under some circumstances, we might receive a request to delete
2204 * our own device address from our uc list. Because we store the
2205 * device address in the VSI's MAC/VLAN filter list, we need to ignore
2206 * such requests and not delete our device address from this list.
2207 */
2208 if (ether_addr_equal(addr1: addr, addr2: netdev->dev_addr))
2209 return 0;
2210
2211 i40e_del_mac_filter(vsi, macaddr: addr);
2212
2213 return 0;
2214}
2215
2216/**
2217 * i40e_set_rx_mode - NDO callback to set the netdev filters
2218 * @netdev: network interface device structure
2219 **/
2220static void i40e_set_rx_mode(struct net_device *netdev)
2221{
2222 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
2223 struct i40e_vsi *vsi = np->vsi;
2224
2225 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
2226
2227 __dev_uc_sync(dev: netdev, sync: i40e_addr_sync, unsync: i40e_addr_unsync);
2228 __dev_mc_sync(dev: netdev, sync: i40e_addr_sync, unsync: i40e_addr_unsync);
2229
2230 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
2231
2232 /* check for other flag changes */
2233 if (vsi->current_netdev_flags != vsi->netdev->flags) {
2234 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2235 set_bit(nr: __I40E_MACVLAN_SYNC_PENDING, addr: vsi->back->state);
2236 }
2237 i40e_service_event_schedule(pf: vsi->back);
2238}
2239
2240/**
2241 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
2242 * @vsi: Pointer to VSI struct
2243 * @from: Pointer to list which contains MAC filter entries - changes to
2244 * those entries needs to be undone.
2245 *
2246 * MAC filter entries from this list were slated for deletion.
2247 **/
2248static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
2249 struct hlist_head *from)
2250{
2251 struct i40e_mac_filter *f;
2252 struct hlist_node *h;
2253
2254 hlist_for_each_entry_safe(f, h, from, hlist) {
2255 u64 key = i40e_addr_to_hkey(macaddr: f->macaddr);
2256
2257 /* Move the element back into MAC filter list*/
2258 hlist_del(n: &f->hlist);
2259 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2260 }
2261}
2262
2263/**
2264 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2265 * @vsi: Pointer to vsi struct
2266 * @from: Pointer to list which contains MAC filter entries - changes to
2267 * those entries needs to be undone.
2268 *
2269 * MAC filter entries from this list were slated for addition.
2270 **/
2271static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2272 struct hlist_head *from)
2273{
2274 struct i40e_new_mac_filter *new;
2275 struct hlist_node *h;
2276
2277 hlist_for_each_entry_safe(new, h, from, hlist) {
2278 /* We can simply free the wrapper structure */
2279 hlist_del(n: &new->hlist);
2280 netdev_hw_addr_refcnt(f: new->f, netdev: vsi->netdev, delta: -1);
2281 kfree(objp: new);
2282 }
2283}
2284
2285/**
2286 * i40e_next_filter - Get the next non-broadcast filter from a list
2287 * @next: pointer to filter in list
2288 *
2289 * Returns the next non-broadcast filter in the list. Required so that we
2290 * ignore broadcast filters within the list, since these are not handled via
2291 * the normal firmware update path.
2292 */
2293static
2294struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2295{
2296 hlist_for_each_entry_continue(next, hlist) {
2297 if (!is_broadcast_ether_addr(addr: next->f->macaddr))
2298 return next;
2299 }
2300
2301 return NULL;
2302}
2303
2304/**
2305 * i40e_update_filter_state - Update filter state based on return data
2306 * from firmware
2307 * @count: Number of filters added
2308 * @add_list: return data from fw
2309 * @add_head: pointer to first filter in current batch
2310 *
2311 * MAC filter entries from list were slated to be added to device. Returns
2312 * number of successful filters. Note that 0 does NOT mean success!
2313 **/
2314static int
2315i40e_update_filter_state(int count,
2316 struct i40e_aqc_add_macvlan_element_data *add_list,
2317 struct i40e_new_mac_filter *add_head)
2318{
2319 int retval = 0;
2320 int i;
2321
2322 for (i = 0; i < count; i++) {
2323 /* Always check status of each filter. We don't need to check
2324 * the firmware return status because we pre-set the filter
2325 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2326 * request to the adminq. Thus, if it no longer matches then
2327 * we know the filter is active.
2328 */
2329 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2330 add_head->state = I40E_FILTER_FAILED;
2331 } else {
2332 add_head->state = I40E_FILTER_ACTIVE;
2333 retval++;
2334 }
2335
2336 add_head = i40e_next_filter(next: add_head);
2337 if (!add_head)
2338 break;
2339 }
2340
2341 return retval;
2342}
2343
2344/**
2345 * i40e_aqc_del_filters - Request firmware to delete a set of filters
2346 * @vsi: ptr to the VSI
2347 * @vsi_name: name to display in messages
2348 * @list: the list of filters to send to firmware
2349 * @num_del: the number of filters to delete
2350 * @retval: Set to -EIO on failure to delete
2351 *
2352 * Send a request to firmware via AdminQ to delete a set of filters. Uses
2353 * *retval instead of a return value so that success does not force ret_val to
2354 * be set to 0. This ensures that a sequence of calls to this function
2355 * preserve the previous value of *retval on successful delete.
2356 */
2357static
2358void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2359 struct i40e_aqc_remove_macvlan_element_data *list,
2360 int num_del, int *retval)
2361{
2362 struct i40e_hw *hw = &vsi->back->hw;
2363 enum libie_aq_err aq_status;
2364 int aq_ret;
2365
2366 aq_ret = i40e_aq_remove_macvlan_v2(hw, seid: vsi->seid, mv_list: list, count: num_del, NULL,
2367 aq_status: &aq_status);
2368
2369 /* Explicitly ignore and do not report when firmware returns ENOENT */
2370 if (aq_ret && !(aq_status == LIBIE_AQ_RC_ENOENT)) {
2371 *retval = -EIO;
2372 dev_info(&vsi->back->pdev->dev,
2373 "ignoring delete macvlan error on %s, err %pe, aq_err %s\n",
2374 vsi_name, ERR_PTR(aq_ret), libie_aq_str(aq_status));
2375 }
2376}
2377
2378/**
2379 * i40e_aqc_add_filters - Request firmware to add a set of filters
2380 * @vsi: ptr to the VSI
2381 * @vsi_name: name to display in messages
2382 * @list: the list of filters to send to firmware
2383 * @add_head: Position in the add hlist
2384 * @num_add: the number of filters to add
2385 *
2386 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2387 * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2388 * space for more filters.
2389 */
2390static
2391void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2392 struct i40e_aqc_add_macvlan_element_data *list,
2393 struct i40e_new_mac_filter *add_head,
2394 int num_add)
2395{
2396 struct i40e_hw *hw = &vsi->back->hw;
2397 enum libie_aq_err aq_status;
2398 int fcnt;
2399
2400 i40e_aq_add_macvlan_v2(hw, seid: vsi->seid, mv_list: list, count: num_add, NULL, aq_status: &aq_status);
2401 fcnt = i40e_update_filter_state(count: num_add, add_list: list, add_head);
2402
2403 if (fcnt != num_add) {
2404 if (vsi->type == I40E_VSI_MAIN) {
2405 set_bit(nr: __I40E_VSI_OVERFLOW_PROMISC, addr: vsi->state);
2406 dev_warn(&vsi->back->pdev->dev,
2407 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2408 libie_aq_str(aq_status), vsi_name);
2409 } else if (vsi->type == I40E_VSI_SRIOV ||
2410 vsi->type == I40E_VSI_VMDQ1 ||
2411 vsi->type == I40E_VSI_VMDQ2) {
2412 dev_warn(&vsi->back->pdev->dev,
2413 "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2414 libie_aq_str(aq_status), vsi_name, vsi_name);
2415 } else {
2416 dev_warn(&vsi->back->pdev->dev,
2417 "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2418 libie_aq_str(aq_status), vsi_name, vsi->type);
2419 }
2420 }
2421}
2422
2423/**
2424 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2425 * @vsi: pointer to the VSI
2426 * @vsi_name: the VSI name
2427 * @f: filter data
2428 *
2429 * This function sets or clears the promiscuous broadcast flags for VLAN
2430 * filters in order to properly receive broadcast frames. Assumes that only
2431 * broadcast filters are passed.
2432 *
2433 * Returns status indicating success or failure;
2434 **/
2435static int
2436i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2437 struct i40e_mac_filter *f)
2438{
2439 bool enable = f->state == I40E_FILTER_NEW ||
2440 f->state == I40E_FILTER_NEW_SYNC;
2441 struct i40e_hw *hw = &vsi->back->hw;
2442 int aq_ret;
2443
2444 if (f->vlan == I40E_VLAN_ANY) {
2445 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2446 vsi_id: vsi->seid,
2447 set_filter: enable,
2448 NULL);
2449 } else {
2450 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2451 seid: vsi->seid,
2452 enable,
2453 vid: f->vlan,
2454 NULL);
2455 }
2456
2457 if (aq_ret) {
2458 set_bit(nr: __I40E_VSI_OVERFLOW_PROMISC, addr: vsi->state);
2459 dev_warn(&vsi->back->pdev->dev,
2460 "Error %s, forcing overflow promiscuous on %s\n",
2461 libie_aq_str(hw->aq.asq_last_status), vsi_name);
2462 }
2463
2464 return aq_ret;
2465}
2466
2467/**
2468 * i40e_set_promiscuous - set promiscuous mode
2469 * @pf: board private structure
2470 * @promisc: promisc on or off
2471 *
2472 * There are different ways of setting promiscuous mode on a PF depending on
2473 * what state/environment we're in. This identifies and sets it appropriately.
2474 * Returns 0 on success.
2475 **/
2476static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2477{
2478 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
2479 struct i40e_hw *hw = &pf->hw;
2480 int aq_ret;
2481
2482 if (vsi->type == I40E_VSI_MAIN &&
2483 i40e_pf_get_main_veb(pf) &&
2484 !test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
2485 /* set defport ON for Main VSI instead of true promisc
2486 * this way we will get all unicast/multicast and VLAN
2487 * promisc behavior but will not get VF or VMDq traffic
2488 * replicated on the Main VSI.
2489 */
2490 if (promisc)
2491 aq_ret = i40e_aq_set_default_vsi(hw,
2492 vsi_id: vsi->seid,
2493 NULL);
2494 else
2495 aq_ret = i40e_aq_clear_default_vsi(hw,
2496 vsi_id: vsi->seid,
2497 NULL);
2498 if (aq_ret) {
2499 dev_info(&pf->pdev->dev,
2500 "Set default VSI failed, err %pe, aq_err %s\n",
2501 ERR_PTR(aq_ret),
2502 libie_aq_str(hw->aq.asq_last_status));
2503 }
2504 } else {
2505 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2506 hw,
2507 vsi_id: vsi->seid,
2508 set: promisc, NULL,
2509 rx_only_promisc: true);
2510 if (aq_ret) {
2511 dev_info(&pf->pdev->dev,
2512 "set unicast promisc failed, err %pe, aq_err %s\n",
2513 ERR_PTR(aq_ret),
2514 libie_aq_str(hw->aq.asq_last_status));
2515 }
2516 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2517 hw,
2518 vsi_id: vsi->seid,
2519 set: promisc, NULL);
2520 if (aq_ret) {
2521 dev_info(&pf->pdev->dev,
2522 "set multicast promisc failed, err %pe, aq_err %s\n",
2523 ERR_PTR(aq_ret),
2524 libie_aq_str(hw->aq.asq_last_status));
2525 }
2526 }
2527
2528 if (!aq_ret)
2529 pf->cur_promisc = promisc;
2530
2531 return aq_ret;
2532}
2533
2534/**
2535 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2536 * @vsi: ptr to the VSI
2537 *
2538 * Push any outstanding VSI filter changes through the AdminQ.
2539 *
2540 * Returns 0 or error value
2541 **/
2542int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2543{
2544 struct hlist_head tmp_add_list, tmp_del_list;
2545 struct i40e_mac_filter *f;
2546 struct i40e_new_mac_filter *new, *add_head = NULL;
2547 struct i40e_hw *hw = &vsi->back->hw;
2548 bool old_overflow, new_overflow;
2549 unsigned int failed_filters = 0;
2550 unsigned int vlan_filters = 0;
2551 char vsi_name[16] = "PF";
2552 int filter_list_len = 0;
2553 u32 changed_flags = 0;
2554 struct hlist_node *h;
2555 struct i40e_pf *pf;
2556 int num_add = 0;
2557 int num_del = 0;
2558 int aq_ret = 0;
2559 int retval = 0;
2560 u16 cmd_flags;
2561 int list_size;
2562 int bkt;
2563
2564 /* empty array typed pointers, kcalloc later */
2565 struct i40e_aqc_add_macvlan_element_data *add_list;
2566 struct i40e_aqc_remove_macvlan_element_data *del_list;
2567
2568 while (test_and_set_bit(nr: __I40E_VSI_SYNCING_FILTERS, addr: vsi->state))
2569 usleep_range(min: 1000, max: 2000);
2570 pf = vsi->back;
2571
2572 old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2573
2574 if (vsi->netdev) {
2575 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2576 vsi->current_netdev_flags = vsi->netdev->flags;
2577 }
2578
2579 INIT_HLIST_HEAD(&tmp_add_list);
2580 INIT_HLIST_HEAD(&tmp_del_list);
2581
2582 if (vsi->type == I40E_VSI_SRIOV)
2583 snprintf(buf: vsi_name, size: sizeof(vsi_name) - 1, fmt: "VF %d", vsi->vf_id);
2584 else if (vsi->type != I40E_VSI_MAIN)
2585 snprintf(buf: vsi_name, size: sizeof(vsi_name) - 1, fmt: "vsi %d", vsi->seid);
2586
2587 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2588 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2589
2590 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
2591 /* Create a list of filters to delete. */
2592 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2593 if (f->state == I40E_FILTER_REMOVE) {
2594 /* Move the element into temporary del_list */
2595 hash_del(node: &f->hlist);
2596 hlist_add_head(n: &f->hlist, h: &tmp_del_list);
2597
2598 /* Avoid counting removed filters */
2599 continue;
2600 }
2601 if (f->state == I40E_FILTER_NEW) {
2602 /* Create a temporary i40e_new_mac_filter */
2603 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2604 if (!new)
2605 goto err_no_memory_locked;
2606
2607 /* Store pointer to the real filter */
2608 new->f = f;
2609 new->state = f->state;
2610
2611 /* Add it to the hash list */
2612 hlist_add_head(n: &new->hlist, h: &tmp_add_list);
2613 f->state = I40E_FILTER_NEW_SYNC;
2614 }
2615
2616 /* Count the number of active (current and new) VLAN
2617 * filters we have now. Does not count filters which
2618 * are marked for deletion.
2619 */
2620 if (f->vlan > 0)
2621 vlan_filters++;
2622 }
2623
2624 if (vsi->type != I40E_VSI_SRIOV)
2625 retval = i40e_correct_mac_vlan_filters
2626 (vsi, tmp_add_list: &tmp_add_list, tmp_del_list: &tmp_del_list,
2627 vlan_filters);
2628 else if (pf->vf)
2629 retval = i40e_correct_vf_mac_vlan_filters
2630 (vsi, tmp_add_list: &tmp_add_list, tmp_del_list: &tmp_del_list,
2631 vlan_filters, trusted: pf->vf[vsi->vf_id].trusted);
2632
2633 hlist_for_each_entry(new, &tmp_add_list, hlist)
2634 netdev_hw_addr_refcnt(f: new->f, netdev: vsi->netdev, delta: 1);
2635
2636 if (retval)
2637 goto err_no_memory_locked;
2638
2639 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
2640 }
2641
2642 /* Now process 'del_list' outside the lock */
2643 if (!hlist_empty(h: &tmp_del_list)) {
2644 filter_list_len = hw->aq.asq_buf_size /
2645 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2646 list_size = filter_list_len *
2647 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2648 del_list = kzalloc(list_size, GFP_ATOMIC);
2649 if (!del_list)
2650 goto err_no_memory;
2651
2652 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2653 cmd_flags = 0;
2654
2655 /* handle broadcast filters by updating the broadcast
2656 * promiscuous flag and release filter list.
2657 */
2658 if (is_broadcast_ether_addr(addr: f->macaddr)) {
2659 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2660
2661 hlist_del(n: &f->hlist);
2662 kfree(objp: f);
2663 continue;
2664 }
2665
2666 /* add to delete list */
2667 ether_addr_copy(dst: del_list[num_del].mac_addr, src: f->macaddr);
2668 if (f->vlan == I40E_VLAN_ANY) {
2669 del_list[num_del].vlan_tag = 0;
2670 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2671 } else {
2672 del_list[num_del].vlan_tag =
2673 cpu_to_le16((u16)(f->vlan));
2674 }
2675
2676 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2677 del_list[num_del].flags = cmd_flags;
2678 num_del++;
2679
2680 /* flush a full buffer */
2681 if (num_del == filter_list_len) {
2682 i40e_aqc_del_filters(vsi, vsi_name, list: del_list,
2683 num_del, retval: &retval);
2684 memset(del_list, 0, list_size);
2685 num_del = 0;
2686 }
2687 /* Release memory for MAC filter entries which were
2688 * synced up with HW.
2689 */
2690 hlist_del(n: &f->hlist);
2691 kfree(objp: f);
2692 }
2693
2694 if (num_del) {
2695 i40e_aqc_del_filters(vsi, vsi_name, list: del_list,
2696 num_del, retval: &retval);
2697 }
2698
2699 kfree(objp: del_list);
2700 del_list = NULL;
2701 }
2702
2703 if (!hlist_empty(h: &tmp_add_list)) {
2704 /* Do all the adds now. */
2705 filter_list_len = hw->aq.asq_buf_size /
2706 sizeof(struct i40e_aqc_add_macvlan_element_data);
2707 list_size = filter_list_len *
2708 sizeof(struct i40e_aqc_add_macvlan_element_data);
2709 add_list = kzalloc(list_size, GFP_ATOMIC);
2710 if (!add_list)
2711 goto err_no_memory;
2712
2713 num_add = 0;
2714 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2715 /* handle broadcast filters by updating the broadcast
2716 * promiscuous flag instead of adding a MAC filter.
2717 */
2718 if (is_broadcast_ether_addr(addr: new->f->macaddr)) {
2719 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2720 f: new->f))
2721 new->state = I40E_FILTER_FAILED;
2722 else
2723 new->state = I40E_FILTER_ACTIVE;
2724 continue;
2725 }
2726
2727 /* add to add array */
2728 if (num_add == 0)
2729 add_head = new;
2730 cmd_flags = 0;
2731 ether_addr_copy(dst: add_list[num_add].mac_addr,
2732 src: new->f->macaddr);
2733 if (new->f->vlan == I40E_VLAN_ANY) {
2734 add_list[num_add].vlan_tag = 0;
2735 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2736 } else {
2737 add_list[num_add].vlan_tag =
2738 cpu_to_le16((u16)(new->f->vlan));
2739 }
2740 add_list[num_add].queue_number = 0;
2741 /* set invalid match method for later detection */
2742 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2743 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2744 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2745 num_add++;
2746
2747 /* flush a full buffer */
2748 if (num_add == filter_list_len) {
2749 i40e_aqc_add_filters(vsi, vsi_name, list: add_list,
2750 add_head, num_add);
2751 memset(add_list, 0, list_size);
2752 num_add = 0;
2753 }
2754 }
2755 if (num_add) {
2756 i40e_aqc_add_filters(vsi, vsi_name, list: add_list, add_head,
2757 num_add);
2758 }
2759 /* Now move all of the filters from the temp add list back to
2760 * the VSI's list.
2761 */
2762 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
2763 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2764 /* Only update the state if we're still NEW */
2765 if (new->f->state == I40E_FILTER_NEW ||
2766 new->f->state == I40E_FILTER_NEW_SYNC)
2767 new->f->state = new->state;
2768 hlist_del(n: &new->hlist);
2769 netdev_hw_addr_refcnt(f: new->f, netdev: vsi->netdev, delta: -1);
2770 kfree(objp: new);
2771 }
2772 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
2773 kfree(objp: add_list);
2774 add_list = NULL;
2775 }
2776
2777 /* Determine the number of active and failed filters. */
2778 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
2779 vsi->active_filters = 0;
2780 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2781 if (f->state == I40E_FILTER_ACTIVE)
2782 vsi->active_filters++;
2783 else if (f->state == I40E_FILTER_FAILED)
2784 failed_filters++;
2785 }
2786 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
2787
2788 /* Check if we are able to exit overflow promiscuous mode. We can
2789 * safely exit if we didn't just enter, we no longer have any failed
2790 * filters, and we have reduced filters below the threshold value.
2791 */
2792 if (old_overflow && !failed_filters &&
2793 vsi->active_filters < vsi->promisc_threshold) {
2794 dev_info(&pf->pdev->dev,
2795 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2796 vsi_name);
2797 clear_bit(nr: __I40E_VSI_OVERFLOW_PROMISC, addr: vsi->state);
2798 vsi->promisc_threshold = 0;
2799 }
2800
2801 /* if the VF is not trusted do not do promisc */
2802 if (vsi->type == I40E_VSI_SRIOV && pf->vf &&
2803 !pf->vf[vsi->vf_id].trusted) {
2804 clear_bit(nr: __I40E_VSI_OVERFLOW_PROMISC, addr: vsi->state);
2805 goto out;
2806 }
2807
2808 new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2809
2810 /* If we are entering overflow promiscuous, we need to calculate a new
2811 * threshold for when we are safe to exit
2812 */
2813 if (!old_overflow && new_overflow)
2814 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2815
2816 /* check for changes in promiscuous modes */
2817 if (changed_flags & IFF_ALLMULTI) {
2818 bool cur_multipromisc;
2819
2820 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2821 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw: &vsi->back->hw,
2822 vsi_id: vsi->seid,
2823 set: cur_multipromisc,
2824 NULL);
2825 if (aq_ret) {
2826 retval = i40e_aq_rc_to_posix(aq_ret,
2827 aq_rc: hw->aq.asq_last_status);
2828 dev_info(&pf->pdev->dev,
2829 "set multi promisc failed on %s, err %pe aq_err %s\n",
2830 vsi_name,
2831 ERR_PTR(aq_ret),
2832 libie_aq_str(hw->aq.asq_last_status));
2833 } else {
2834 dev_info(&pf->pdev->dev, "%s allmulti mode.\n",
2835 cur_multipromisc ? "entering" : "leaving");
2836 }
2837 }
2838
2839 if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2840 bool cur_promisc;
2841
2842 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2843 new_overflow);
2844 aq_ret = i40e_set_promiscuous(pf, promisc: cur_promisc);
2845 if (aq_ret) {
2846 retval = i40e_aq_rc_to_posix(aq_ret,
2847 aq_rc: hw->aq.asq_last_status);
2848 dev_info(&pf->pdev->dev,
2849 "Setting promiscuous %s failed on %s, err %pe aq_err %s\n",
2850 cur_promisc ? "on" : "off",
2851 vsi_name,
2852 ERR_PTR(aq_ret),
2853 libie_aq_str(hw->aq.asq_last_status));
2854 }
2855 }
2856out:
2857 /* if something went wrong then set the changed flag so we try again */
2858 if (retval)
2859 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2860
2861 clear_bit(nr: __I40E_VSI_SYNCING_FILTERS, addr: vsi->state);
2862 return retval;
2863
2864err_no_memory:
2865 /* Restore elements on the temporary add and delete lists */
2866 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
2867err_no_memory_locked:
2868 i40e_undo_del_filter_entries(vsi, from: &tmp_del_list);
2869 i40e_undo_add_filter_entries(vsi, from: &tmp_add_list);
2870 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
2871
2872 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2873 clear_bit(nr: __I40E_VSI_SYNCING_FILTERS, addr: vsi->state);
2874 return -ENOMEM;
2875}
2876
2877/**
2878 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2879 * @pf: board private structure
2880 **/
2881static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2882{
2883 struct i40e_vsi *vsi;
2884 int v;
2885
2886 if (!pf)
2887 return;
2888 if (!test_and_clear_bit(nr: __I40E_MACVLAN_SYNC_PENDING, addr: pf->state))
2889 return;
2890 if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2891 set_bit(nr: __I40E_MACVLAN_SYNC_PENDING, addr: pf->state);
2892 return;
2893 }
2894
2895 i40e_pf_for_each_vsi(pf, v, vsi) {
2896 if ((vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) &&
2897 !test_bit(__I40E_VSI_RELEASING, vsi->state)) {
2898 int ret = i40e_sync_vsi_filters(vsi);
2899
2900 if (ret) {
2901 /* come back and try again later */
2902 set_bit(nr: __I40E_MACVLAN_SYNC_PENDING,
2903 addr: pf->state);
2904 break;
2905 }
2906 }
2907 }
2908}
2909
2910/**
2911 * i40e_calculate_vsi_rx_buf_len - Calculates buffer length
2912 *
2913 * @vsi: VSI to calculate rx_buf_len from
2914 */
2915static u16 i40e_calculate_vsi_rx_buf_len(struct i40e_vsi *vsi)
2916{
2917 if (!vsi->netdev || test_bit(I40E_FLAG_LEGACY_RX_ENA, vsi->back->flags))
2918 return SKB_WITH_OVERHEAD(I40E_RXBUFFER_2048);
2919
2920 return PAGE_SIZE < 8192 ? I40E_RXBUFFER_3072 : I40E_RXBUFFER_2048;
2921}
2922
2923/**
2924 * i40e_max_vsi_frame_size - returns the maximum allowed frame size for VSI
2925 * @vsi: the vsi
2926 * @xdp_prog: XDP program
2927 **/
2928static int i40e_max_vsi_frame_size(struct i40e_vsi *vsi,
2929 struct bpf_prog *xdp_prog)
2930{
2931 u16 rx_buf_len = i40e_calculate_vsi_rx_buf_len(vsi);
2932 u16 chain_len;
2933
2934 if (xdp_prog && !xdp_prog->aux->xdp_has_frags)
2935 chain_len = 1;
2936 else
2937 chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
2938
2939 return min_t(u16, rx_buf_len * chain_len, I40E_MAX_RXBUFFER);
2940}
2941
2942/**
2943 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2944 * @netdev: network interface device structure
2945 * @new_mtu: new value for maximum frame size
2946 *
2947 * Returns 0 on success, negative on failure
2948 **/
2949static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2950{
2951 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
2952 struct i40e_vsi *vsi = np->vsi;
2953 struct i40e_pf *pf = vsi->back;
2954 int frame_size;
2955
2956 frame_size = i40e_max_vsi_frame_size(vsi, xdp_prog: vsi->xdp_prog);
2957 if (new_mtu > frame_size - I40E_PACKET_HDR_PAD) {
2958 netdev_err(dev: netdev, format: "Error changing mtu to %d, Max is %d\n",
2959 new_mtu, frame_size - I40E_PACKET_HDR_PAD);
2960 return -EINVAL;
2961 }
2962
2963 netdev_dbg(netdev, "changing MTU from %d to %d\n",
2964 netdev->mtu, new_mtu);
2965 WRITE_ONCE(netdev->mtu, new_mtu);
2966 if (netif_running(dev: netdev))
2967 i40e_vsi_reinit_locked(vsi);
2968 set_bit(nr: __I40E_CLIENT_SERVICE_REQUESTED, addr: pf->state);
2969 set_bit(nr: __I40E_CLIENT_L2_CHANGE, addr: pf->state);
2970 return 0;
2971}
2972
2973/**
2974 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2975 * @vsi: the vsi being adjusted
2976 **/
2977void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2978{
2979 struct i40e_vsi_context ctxt;
2980 int ret;
2981
2982 /* Don't modify stripping options if a port VLAN is active */
2983 if (vsi->info.pvid)
2984 return;
2985
2986 if ((vsi->info.valid_sections &
2987 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2988 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2989 return; /* already enabled */
2990
2991 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2992 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2993 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2994
2995 ctxt.seid = vsi->seid;
2996 ctxt.info = vsi->info;
2997 ret = i40e_aq_update_vsi_params(hw: &vsi->back->hw, vsi_ctx: &ctxt, NULL);
2998 if (ret) {
2999 dev_info(&vsi->back->pdev->dev,
3000 "update vlan stripping failed, err %pe aq_err %s\n",
3001 ERR_PTR(ret),
3002 libie_aq_str(vsi->back->hw.aq.asq_last_status));
3003 }
3004}
3005
3006/**
3007 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
3008 * @vsi: the vsi being adjusted
3009 **/
3010void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
3011{
3012 struct i40e_vsi_context ctxt;
3013 int ret;
3014
3015 /* Don't modify stripping options if a port VLAN is active */
3016 if (vsi->info.pvid)
3017 return;
3018
3019 if ((vsi->info.valid_sections &
3020 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
3021 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
3022 I40E_AQ_VSI_PVLAN_EMOD_MASK))
3023 return; /* already disabled */
3024
3025 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3026 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
3027 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
3028
3029 ctxt.seid = vsi->seid;
3030 ctxt.info = vsi->info;
3031 ret = i40e_aq_update_vsi_params(hw: &vsi->back->hw, vsi_ctx: &ctxt, NULL);
3032 if (ret) {
3033 dev_info(&vsi->back->pdev->dev,
3034 "update vlan stripping failed, err %pe aq_err %s\n",
3035 ERR_PTR(ret),
3036 libie_aq_str(vsi->back->hw.aq.asq_last_status));
3037 }
3038}
3039
3040/**
3041 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
3042 * @vsi: the vsi being configured
3043 * @vid: vlan id to be added (0 = untagged only , -1 = any)
3044 *
3045 * This is a helper function for adding a new MAC/VLAN filter with the
3046 * specified VLAN for each existing MAC address already in the hash table.
3047 * This function does *not* perform any accounting to update filters based on
3048 * VLAN mode.
3049 *
3050 * NOTE: this function expects to be called while under the
3051 * mac_filter_hash_lock
3052 **/
3053int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
3054{
3055 struct i40e_mac_filter *f, *add_f;
3056 struct hlist_node *h;
3057 int bkt;
3058
3059 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3060 /* If we're asked to add a filter that has been marked for
3061 * removal, it is safe to simply restore it to active state.
3062 * __i40e_del_filter will have simply deleted any filters which
3063 * were previously marked NEW or FAILED, so if it is currently
3064 * marked REMOVE it must have previously been ACTIVE. Since we
3065 * haven't yet run the sync filters task, just restore this
3066 * filter to the ACTIVE state so that the sync task leaves it
3067 * in place.
3068 */
3069 if (f->state == I40E_FILTER_REMOVE && f->vlan == vid) {
3070 f->state = I40E_FILTER_ACTIVE;
3071 continue;
3072 } else if (f->state == I40E_FILTER_REMOVE) {
3073 continue;
3074 }
3075 add_f = i40e_add_filter(vsi, macaddr: f->macaddr, vlan: vid);
3076 if (!add_f) {
3077 dev_info(&vsi->back->pdev->dev,
3078 "Could not add vlan filter %d for %pM\n",
3079 vid, f->macaddr);
3080 return -ENOMEM;
3081 }
3082 }
3083
3084 return 0;
3085}
3086
3087/**
3088 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
3089 * @vsi: the VSI being configured
3090 * @vid: VLAN id to be added
3091 **/
3092int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
3093{
3094 int err;
3095
3096 if (vsi->info.pvid)
3097 return -EINVAL;
3098
3099 /* The network stack will attempt to add VID=0, with the intention to
3100 * receive priority tagged packets with a VLAN of 0. Our HW receives
3101 * these packets by default when configured to receive untagged
3102 * packets, so we don't need to add a filter for this case.
3103 * Additionally, HW interprets adding a VID=0 filter as meaning to
3104 * receive *only* tagged traffic and stops receiving untagged traffic.
3105 * Thus, we do not want to actually add a filter for VID=0
3106 */
3107 if (!vid)
3108 return 0;
3109
3110 /* Locked once because all functions invoked below iterates list*/
3111 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
3112 err = i40e_add_vlan_all_mac(vsi, vid);
3113 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
3114 if (err)
3115 return err;
3116
3117 /* schedule our worker thread which will take care of
3118 * applying the new filter changes
3119 */
3120 i40e_service_event_schedule(pf: vsi->back);
3121 return 0;
3122}
3123
3124/**
3125 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
3126 * @vsi: the vsi being configured
3127 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
3128 *
3129 * This function should be used to remove all VLAN filters which match the
3130 * given VID. It does not schedule the service event and does not take the
3131 * mac_filter_hash_lock so it may be combined with other operations under
3132 * a single invocation of the mac_filter_hash_lock.
3133 *
3134 * NOTE: this function expects to be called while under the
3135 * mac_filter_hash_lock
3136 */
3137void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
3138{
3139 struct i40e_mac_filter *f;
3140 struct hlist_node *h;
3141 int bkt;
3142
3143 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3144 if (f->vlan == vid)
3145 __i40e_del_filter(vsi, f);
3146 }
3147}
3148
3149/**
3150 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
3151 * @vsi: the VSI being configured
3152 * @vid: VLAN id to be removed
3153 **/
3154void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
3155{
3156 if (!vid || vsi->info.pvid)
3157 return;
3158
3159 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
3160 i40e_rm_vlan_all_mac(vsi, vid);
3161 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
3162
3163 /* schedule our worker thread which will take care of
3164 * applying the new filter changes
3165 */
3166 i40e_service_event_schedule(pf: vsi->back);
3167}
3168
3169/**
3170 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
3171 * @netdev: network interface to be adjusted
3172 * @proto: unused protocol value
3173 * @vid: vlan id to be added
3174 *
3175 * net_device_ops implementation for adding vlan ids
3176 **/
3177static int i40e_vlan_rx_add_vid(struct net_device *netdev,
3178 __always_unused __be16 proto, u16 vid)
3179{
3180 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
3181 struct i40e_vsi *vsi = np->vsi;
3182 int ret = 0;
3183
3184 if (vid >= VLAN_N_VID)
3185 return -EINVAL;
3186
3187 ret = i40e_vsi_add_vlan(vsi, vid);
3188 if (!ret)
3189 set_bit(nr: vid, addr: vsi->active_vlans);
3190
3191 return ret;
3192}
3193
3194/**
3195 * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
3196 * @netdev: network interface to be adjusted
3197 * @proto: unused protocol value
3198 * @vid: vlan id to be added
3199 **/
3200static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
3201 __always_unused __be16 proto, u16 vid)
3202{
3203 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
3204 struct i40e_vsi *vsi = np->vsi;
3205
3206 if (vid >= VLAN_N_VID)
3207 return;
3208 set_bit(nr: vid, addr: vsi->active_vlans);
3209}
3210
3211/**
3212 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
3213 * @netdev: network interface to be adjusted
3214 * @proto: unused protocol value
3215 * @vid: vlan id to be removed
3216 *
3217 * net_device_ops implementation for removing vlan ids
3218 **/
3219static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
3220 __always_unused __be16 proto, u16 vid)
3221{
3222 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
3223 struct i40e_vsi *vsi = np->vsi;
3224
3225 /* return code is ignored as there is nothing a user
3226 * can do about failure to remove and a log message was
3227 * already printed from the other function
3228 */
3229 i40e_vsi_kill_vlan(vsi, vid);
3230
3231 clear_bit(nr: vid, addr: vsi->active_vlans);
3232
3233 return 0;
3234}
3235
3236/**
3237 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
3238 * @vsi: the vsi being brought back up
3239 **/
3240static void i40e_restore_vlan(struct i40e_vsi *vsi)
3241{
3242 u16 vid;
3243
3244 if (!vsi->netdev)
3245 return;
3246
3247 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3248 i40e_vlan_stripping_enable(vsi);
3249 else
3250 i40e_vlan_stripping_disable(vsi);
3251
3252 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
3253 i40e_vlan_rx_add_vid_up(netdev: vsi->netdev, htons(ETH_P_8021Q),
3254 vid);
3255}
3256
3257/**
3258 * i40e_vsi_add_pvid - Add pvid for the VSI
3259 * @vsi: the vsi being adjusted
3260 * @vid: the vlan id to set as a PVID
3261 **/
3262int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
3263{
3264 struct i40e_vsi_context ctxt;
3265 int ret;
3266
3267 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3268 vsi->info.pvid = cpu_to_le16(vid);
3269 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
3270 I40E_AQ_VSI_PVLAN_INSERT_PVID |
3271 I40E_AQ_VSI_PVLAN_EMOD_STR;
3272
3273 ctxt.seid = vsi->seid;
3274 ctxt.info = vsi->info;
3275 ret = i40e_aq_update_vsi_params(hw: &vsi->back->hw, vsi_ctx: &ctxt, NULL);
3276 if (ret) {
3277 dev_info(&vsi->back->pdev->dev,
3278 "add pvid failed, err %pe aq_err %s\n",
3279 ERR_PTR(ret),
3280 libie_aq_str(vsi->back->hw.aq.asq_last_status));
3281 return -ENOENT;
3282 }
3283
3284 return 0;
3285}
3286
3287/**
3288 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3289 * @vsi: the vsi being adjusted
3290 *
3291 * Just use the vlan_rx_register() service to put it back to normal
3292 **/
3293void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3294{
3295 vsi->info.pvid = 0;
3296
3297 i40e_vlan_stripping_disable(vsi);
3298}
3299
3300/**
3301 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3302 * @vsi: ptr to the VSI
3303 *
3304 * If this function returns with an error, then it's possible one or
3305 * more of the rings is populated (while the rest are not). It is the
3306 * callers duty to clean those orphaned rings.
3307 *
3308 * Return 0 on success, negative on failure
3309 **/
3310static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3311{
3312 int i, err = 0;
3313
3314 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3315 err = i40e_setup_tx_descriptors(tx_ring: vsi->tx_rings[i]);
3316
3317 if (!i40e_enabled_xdp_vsi(vsi))
3318 return err;
3319
3320 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3321 err = i40e_setup_tx_descriptors(tx_ring: vsi->xdp_rings[i]);
3322
3323 return err;
3324}
3325
3326/**
3327 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3328 * @vsi: ptr to the VSI
3329 *
3330 * Free VSI's transmit software resources
3331 **/
3332static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3333{
3334 int i;
3335
3336 if (vsi->tx_rings) {
3337 for (i = 0; i < vsi->num_queue_pairs; i++)
3338 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3339 i40e_free_tx_resources(tx_ring: vsi->tx_rings[i]);
3340 }
3341
3342 if (vsi->xdp_rings) {
3343 for (i = 0; i < vsi->num_queue_pairs; i++)
3344 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3345 i40e_free_tx_resources(tx_ring: vsi->xdp_rings[i]);
3346 }
3347}
3348
3349/**
3350 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3351 * @vsi: ptr to the VSI
3352 *
3353 * If this function returns with an error, then it's possible one or
3354 * more of the rings is populated (while the rest are not). It is the
3355 * callers duty to clean those orphaned rings.
3356 *
3357 * Return 0 on success, negative on failure
3358 **/
3359static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3360{
3361 int i, err = 0;
3362
3363 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3364 err = i40e_setup_rx_descriptors(rx_ring: vsi->rx_rings[i]);
3365 return err;
3366}
3367
3368/**
3369 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3370 * @vsi: ptr to the VSI
3371 *
3372 * Free all receive software resources
3373 **/
3374static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3375{
3376 int i;
3377
3378 if (!vsi->rx_rings)
3379 return;
3380
3381 for (i = 0; i < vsi->num_queue_pairs; i++)
3382 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3383 i40e_free_rx_resources(rx_ring: vsi->rx_rings[i]);
3384}
3385
3386/**
3387 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3388 * @ring: The Tx ring to configure
3389 *
3390 * This enables/disables XPS for a given Tx descriptor ring
3391 * based on the TCs enabled for the VSI that ring belongs to.
3392 **/
3393static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3394{
3395 int cpu;
3396
3397 if (!ring->q_vector || !ring->netdev || ring->ch)
3398 return;
3399
3400 /* We only initialize XPS once, so as not to overwrite user settings */
3401 if (test_and_set_bit(nr: __I40E_TX_XPS_INIT_DONE, addr: ring->state))
3402 return;
3403
3404 cpu = cpumask_local_spread(i: ring->q_vector->v_idx, node: -1);
3405 netif_set_xps_queue(dev: ring->netdev, mask: get_cpu_mask(cpu),
3406 index: ring->queue_index);
3407}
3408
3409/**
3410 * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled
3411 * @ring: The Tx or Rx ring
3412 *
3413 * Returns the AF_XDP buffer pool or NULL.
3414 **/
3415static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring)
3416{
3417 bool xdp_on = i40e_enabled_xdp_vsi(vsi: ring->vsi);
3418 int qid = ring->queue_index;
3419
3420 if (ring_is_xdp(ring))
3421 qid -= ring->vsi->alloc_queue_pairs;
3422
3423 if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3424 return NULL;
3425
3426 return xsk_get_pool_from_qid(dev: ring->vsi->netdev, queue_id: qid);
3427}
3428
3429/**
3430 * i40e_configure_tx_ring - Configure a transmit ring context and rest
3431 * @ring: The Tx ring to configure
3432 *
3433 * Configure the Tx descriptor ring in the HMC context.
3434 **/
3435static int i40e_configure_tx_ring(struct i40e_ring *ring)
3436{
3437 struct i40e_vsi *vsi = ring->vsi;
3438 u16 pf_q = vsi->base_queue + ring->queue_index;
3439 struct i40e_hw *hw = &vsi->back->hw;
3440 struct i40e_hmc_obj_txq tx_ctx;
3441 u32 qtx_ctl = 0;
3442 int err = 0;
3443
3444 if (ring_is_xdp(ring))
3445 ring->xsk_pool = i40e_xsk_pool(ring);
3446
3447 /* some ATR related tx ring init */
3448 if (test_bit(I40E_FLAG_FD_ATR_ENA, vsi->back->flags)) {
3449 ring->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
3450 ring->atr_count = 0;
3451 } else {
3452 ring->atr_sample_rate = 0;
3453 }
3454
3455 /* configure XPS */
3456 i40e_config_xps_tx_ring(ring);
3457
3458 /* clear the context structure first */
3459 memset(&tx_ctx, 0, sizeof(tx_ctx));
3460
3461 tx_ctx.new_context = 1;
3462 tx_ctx.base = (ring->dma / 128);
3463 tx_ctx.qlen = ring->count;
3464 if (test_bit(I40E_FLAG_FD_SB_ENA, vsi->back->flags) ||
3465 test_bit(I40E_FLAG_FD_ATR_ENA, vsi->back->flags))
3466 tx_ctx.fd_ena = 1;
3467 if (test_bit(I40E_FLAG_PTP_ENA, vsi->back->flags))
3468 tx_ctx.timesync_ena = 1;
3469 /* FDIR VSI tx ring can still use RS bit and writebacks */
3470 if (vsi->type != I40E_VSI_FDIR)
3471 tx_ctx.head_wb_ena = 1;
3472 tx_ctx.head_wb_addr = ring->dma +
3473 (ring->count * sizeof(struct i40e_tx_desc));
3474
3475 /* As part of VSI creation/update, FW allocates certain
3476 * Tx arbitration queue sets for each TC enabled for
3477 * the VSI. The FW returns the handles to these queue
3478 * sets as part of the response buffer to Add VSI,
3479 * Update VSI, etc. AQ commands. It is expected that
3480 * these queue set handles be associated with the Tx
3481 * queues by the driver as part of the TX queue context
3482 * initialization. This has to be done regardless of
3483 * DCB as by default everything is mapped to TC0.
3484 */
3485
3486 if (ring->ch)
3487 tx_ctx.rdylist =
3488 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3489
3490 else
3491 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3492
3493 tx_ctx.rdylist_act = 0;
3494
3495 /* clear the context in the HMC */
3496 err = i40e_clear_lan_tx_queue_context(hw, queue: pf_q);
3497 if (err) {
3498 dev_info(&vsi->back->pdev->dev,
3499 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3500 ring->queue_index, pf_q, err);
3501 return -ENOMEM;
3502 }
3503
3504 /* set the context in the HMC */
3505 err = i40e_set_lan_tx_queue_context(hw, queue: pf_q, s: &tx_ctx);
3506 if (err) {
3507 dev_info(&vsi->back->pdev->dev,
3508 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3509 ring->queue_index, pf_q, err);
3510 return -ENOMEM;
3511 }
3512
3513 /* Now associate this queue with this PCI function */
3514 if (ring->ch) {
3515 if (ring->ch->type == I40E_VSI_VMDQ2)
3516 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3517 else
3518 return -EINVAL;
3519
3520 qtx_ctl |= FIELD_PREP(I40E_QTX_CTL_VFVM_INDX_MASK,
3521 ring->ch->vsi_number);
3522 } else {
3523 if (vsi->type == I40E_VSI_VMDQ2) {
3524 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3525 qtx_ctl |= FIELD_PREP(I40E_QTX_CTL_VFVM_INDX_MASK,
3526 vsi->id);
3527 } else {
3528 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3529 }
3530 }
3531
3532 qtx_ctl |= FIELD_PREP(I40E_QTX_CTL_PF_INDX_MASK, hw->pf_id);
3533 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3534 i40e_flush(hw);
3535
3536 /* cache tail off for easier writes later */
3537 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3538
3539 return 0;
3540}
3541
3542/**
3543 * i40e_rx_offset - Return expected offset into page to access data
3544 * @rx_ring: Ring we are requesting offset of
3545 *
3546 * Returns the offset value for ring into the data buffer.
3547 */
3548static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring)
3549{
3550 return ring_uses_build_skb(ring: rx_ring) ? I40E_SKB_PAD : 0;
3551}
3552
3553/**
3554 * i40e_configure_rx_ring - Configure a receive ring context
3555 * @ring: The Rx ring to configure
3556 *
3557 * Configure the Rx descriptor ring in the HMC context.
3558 **/
3559static int i40e_configure_rx_ring(struct i40e_ring *ring)
3560{
3561 struct i40e_vsi *vsi = ring->vsi;
3562 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3563 u16 pf_q = vsi->base_queue + ring->queue_index;
3564 struct i40e_hw *hw = &vsi->back->hw;
3565 struct i40e_hmc_obj_rxq rx_ctx;
3566 int err = 0;
3567 bool ok;
3568
3569 bitmap_zero(dst: ring->state, nbits: __I40E_RING_STATE_NBITS);
3570
3571 /* clear the context structure first */
3572 memset(&rx_ctx, 0, sizeof(rx_ctx));
3573
3574 ring->rx_buf_len = vsi->rx_buf_len;
3575
3576 /* XDP RX-queue info only needed for RX rings exposed to XDP */
3577 if (ring->vsi->type != I40E_VSI_MAIN)
3578 goto skip;
3579
3580 if (!xdp_rxq_info_is_reg(xdp_rxq: &ring->xdp_rxq)) {
3581 err = __xdp_rxq_info_reg(xdp_rxq: &ring->xdp_rxq, dev: ring->netdev,
3582 queue_index: ring->queue_index,
3583 napi_id: ring->q_vector->napi.napi_id,
3584 frag_size: ring->rx_buf_len);
3585 if (err)
3586 return err;
3587 }
3588
3589 ring->xsk_pool = i40e_xsk_pool(ring);
3590 if (ring->xsk_pool) {
3591 xdp_rxq_info_unreg(xdp_rxq: &ring->xdp_rxq);
3592 ring->rx_buf_len = xsk_pool_get_rx_frame_size(pool: ring->xsk_pool);
3593 err = __xdp_rxq_info_reg(xdp_rxq: &ring->xdp_rxq, dev: ring->netdev,
3594 queue_index: ring->queue_index,
3595 napi_id: ring->q_vector->napi.napi_id,
3596 frag_size: ring->rx_buf_len);
3597 if (err)
3598 return err;
3599 err = xdp_rxq_info_reg_mem_model(xdp_rxq: &ring->xdp_rxq,
3600 type: MEM_TYPE_XSK_BUFF_POOL,
3601 NULL);
3602 if (err)
3603 return err;
3604 dev_info(&vsi->back->pdev->dev,
3605 "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3606 ring->queue_index);
3607
3608 } else {
3609 err = xdp_rxq_info_reg_mem_model(xdp_rxq: &ring->xdp_rxq,
3610 type: MEM_TYPE_PAGE_SHARED,
3611 NULL);
3612 if (err)
3613 return err;
3614 }
3615
3616skip:
3617 xdp_init_buff(xdp: &ring->xdp, i40e_rx_pg_size(ring) / 2, rxq: &ring->xdp_rxq);
3618
3619 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3620 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3621
3622 rx_ctx.base = (ring->dma / 128);
3623 rx_ctx.qlen = ring->count;
3624
3625 /* use 16 byte descriptors */
3626 rx_ctx.dsize = 0;
3627
3628 /* descriptor type is always zero
3629 * rx_ctx.dtype = 0;
3630 */
3631 rx_ctx.hsplit_0 = 0;
3632
3633 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3634 if (hw->revision_id == 0)
3635 rx_ctx.lrxqthresh = 0;
3636 else
3637 rx_ctx.lrxqthresh = 1;
3638 rx_ctx.crcstrip = 1;
3639 rx_ctx.l2tsel = 1;
3640 /* this controls whether VLAN is stripped from inner headers */
3641 rx_ctx.showiv = 0;
3642 /* set the prefena field to 1 because the manual says to */
3643 rx_ctx.prefena = 1;
3644
3645 /* clear the context in the HMC */
3646 err = i40e_clear_lan_rx_queue_context(hw, queue: pf_q);
3647 if (err) {
3648 dev_info(&vsi->back->pdev->dev,
3649 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3650 ring->queue_index, pf_q, err);
3651 return -ENOMEM;
3652 }
3653
3654 /* set the context in the HMC */
3655 err = i40e_set_lan_rx_queue_context(hw, queue: pf_q, s: &rx_ctx);
3656 if (err) {
3657 dev_info(&vsi->back->pdev->dev,
3658 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3659 ring->queue_index, pf_q, err);
3660 return -ENOMEM;
3661 }
3662
3663 /* configure Rx buffer alignment */
3664 if (!vsi->netdev || test_bit(I40E_FLAG_LEGACY_RX_ENA, vsi->back->flags)) {
3665 if (I40E_2K_TOO_SMALL_WITH_PADDING) {
3666 dev_info(&vsi->back->pdev->dev,
3667 "2k Rx buffer is too small to fit standard MTU and skb_shared_info\n");
3668 return -EOPNOTSUPP;
3669 }
3670 clear_ring_build_skb_enabled(ring);
3671 } else {
3672 set_ring_build_skb_enabled(ring);
3673 }
3674
3675 ring->rx_offset = i40e_rx_offset(rx_ring: ring);
3676
3677 /* cache tail for quicker writes, and clear the reg before use */
3678 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3679 writel(val: 0, addr: ring->tail);
3680
3681 if (ring->xsk_pool) {
3682 xsk_pool_set_rxq_info(pool: ring->xsk_pool, rxq: &ring->xdp_rxq);
3683 ok = i40e_alloc_rx_buffers_zc(rx_ring: ring, I40E_DESC_UNUSED(ring));
3684 } else {
3685 ok = !i40e_alloc_rx_buffers(rxr: ring, I40E_DESC_UNUSED(ring));
3686 }
3687 if (!ok) {
3688 /* Log this in case the user has forgotten to give the kernel
3689 * any buffers, even later in the application.
3690 */
3691 dev_info(&vsi->back->pdev->dev,
3692 "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3693 ring->xsk_pool ? "AF_XDP ZC enabled " : "",
3694 ring->queue_index, pf_q);
3695 }
3696
3697 return 0;
3698}
3699
3700/**
3701 * i40e_vsi_configure_tx - Configure the VSI for Tx
3702 * @vsi: VSI structure describing this set of rings and resources
3703 *
3704 * Configure the Tx VSI for operation.
3705 **/
3706static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3707{
3708 int err = 0;
3709 u16 i;
3710
3711 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3712 err = i40e_configure_tx_ring(ring: vsi->tx_rings[i]);
3713
3714 if (err || !i40e_enabled_xdp_vsi(vsi))
3715 return err;
3716
3717 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3718 err = i40e_configure_tx_ring(ring: vsi->xdp_rings[i]);
3719
3720 return err;
3721}
3722
3723/**
3724 * i40e_vsi_configure_rx - Configure the VSI for Rx
3725 * @vsi: the VSI being configured
3726 *
3727 * Configure the Rx VSI for operation.
3728 **/
3729static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3730{
3731 int err = 0;
3732 u16 i;
3733
3734 vsi->max_frame = i40e_max_vsi_frame_size(vsi, xdp_prog: vsi->xdp_prog);
3735 vsi->rx_buf_len = i40e_calculate_vsi_rx_buf_len(vsi);
3736
3737#if (PAGE_SIZE < 8192)
3738 if (vsi->netdev && !I40E_2K_TOO_SMALL_WITH_PADDING &&
3739 vsi->netdev->mtu <= ETH_DATA_LEN) {
3740 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3741 vsi->max_frame = vsi->rx_buf_len;
3742 }
3743#endif
3744
3745 /* set up individual rings */
3746 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3747 err = i40e_configure_rx_ring(ring: vsi->rx_rings[i]);
3748
3749 return err;
3750}
3751
3752/**
3753 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3754 * @vsi: ptr to the VSI
3755 **/
3756static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3757{
3758 struct i40e_ring *tx_ring, *rx_ring;
3759 u16 qoffset, qcount;
3760 int i, n;
3761
3762 if (!test_bit(I40E_FLAG_DCB_ENA, vsi->back->flags)) {
3763 /* Reset the TC information */
3764 for (i = 0; i < vsi->num_queue_pairs; i++) {
3765 rx_ring = vsi->rx_rings[i];
3766 tx_ring = vsi->tx_rings[i];
3767 rx_ring->dcb_tc = 0;
3768 tx_ring->dcb_tc = 0;
3769 }
3770 return;
3771 }
3772
3773 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3774 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3775 continue;
3776
3777 qoffset = vsi->tc_config.tc_info[n].qoffset;
3778 qcount = vsi->tc_config.tc_info[n].qcount;
3779 for (i = qoffset; i < (qoffset + qcount); i++) {
3780 rx_ring = vsi->rx_rings[i];
3781 tx_ring = vsi->tx_rings[i];
3782 rx_ring->dcb_tc = n;
3783 tx_ring->dcb_tc = n;
3784 }
3785 }
3786}
3787
3788/**
3789 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3790 * @vsi: ptr to the VSI
3791 **/
3792static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3793{
3794 if (vsi->netdev)
3795 i40e_set_rx_mode(netdev: vsi->netdev);
3796}
3797
3798/**
3799 * i40e_reset_fdir_filter_cnt - Reset flow director filter counters
3800 * @pf: Pointer to the targeted PF
3801 *
3802 * Set all flow director counters to 0.
3803 */
3804static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3805{
3806 pf->fd_tcp4_filter_cnt = 0;
3807 pf->fd_udp4_filter_cnt = 0;
3808 pf->fd_sctp4_filter_cnt = 0;
3809 pf->fd_ip4_filter_cnt = 0;
3810 pf->fd_tcp6_filter_cnt = 0;
3811 pf->fd_udp6_filter_cnt = 0;
3812 pf->fd_sctp6_filter_cnt = 0;
3813 pf->fd_ip6_filter_cnt = 0;
3814}
3815
3816/**
3817 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3818 * @vsi: Pointer to the targeted VSI
3819 *
3820 * This function replays the hlist on the hw where all the SB Flow Director
3821 * filters were saved.
3822 **/
3823static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3824{
3825 struct i40e_fdir_filter *filter;
3826 struct i40e_pf *pf = vsi->back;
3827 struct hlist_node *node;
3828
3829 if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
3830 return;
3831
3832 /* Reset FDir counters as we're replaying all existing filters */
3833 i40e_reset_fdir_filter_cnt(pf);
3834
3835 hlist_for_each_entry_safe(filter, node,
3836 &pf->fdir_filter_list, fdir_node) {
3837 i40e_add_del_fdir(vsi, input: filter, add: true);
3838 }
3839}
3840
3841/**
3842 * i40e_vsi_configure - Set up the VSI for action
3843 * @vsi: the VSI being configured
3844 **/
3845static int i40e_vsi_configure(struct i40e_vsi *vsi)
3846{
3847 int err;
3848
3849 i40e_set_vsi_rx_mode(vsi);
3850 i40e_restore_vlan(vsi);
3851 i40e_vsi_config_dcb_rings(vsi);
3852 err = i40e_vsi_configure_tx(vsi);
3853 if (!err)
3854 err = i40e_vsi_configure_rx(vsi);
3855
3856 return err;
3857}
3858
3859/**
3860 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3861 * @vsi: the VSI being configured
3862 **/
3863static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3864{
3865 bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3866 struct i40e_pf *pf = vsi->back;
3867 struct i40e_hw *hw = &pf->hw;
3868 u16 vector;
3869 int i, q;
3870 u32 qp;
3871
3872 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3873 * and PFINT_LNKLSTn registers, e.g.:
3874 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3875 */
3876 qp = vsi->base_queue;
3877 vector = vsi->base_vector;
3878 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3879 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3880
3881 q_vector->rx.next_update = jiffies + 1;
3882 q_vector->rx.target_itr =
3883 ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3884 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3885 q_vector->rx.target_itr >> 1);
3886 q_vector->rx.current_itr = q_vector->rx.target_itr;
3887
3888 q_vector->tx.next_update = jiffies + 1;
3889 q_vector->tx.target_itr =
3890 ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3891 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3892 q_vector->tx.target_itr >> 1);
3893 q_vector->tx.current_itr = q_vector->tx.target_itr;
3894
3895 /* Set ITR for software interrupts triggered after exiting
3896 * busy-loop polling.
3897 */
3898 wr32(hw, I40E_PFINT_ITRN(I40E_SW_ITR, vector - 1),
3899 I40E_ITR_20K);
3900
3901 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3902 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3903
3904 /* begin of linked list for RX queue assigned to this vector */
3905 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3906 for (q = 0; q < q_vector->num_ringpairs; q++) {
3907 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3908 u32 val;
3909
3910 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3911 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3912 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3913 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3914 (I40E_QUEUE_TYPE_TX <<
3915 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3916
3917 wr32(hw, I40E_QINT_RQCTL(qp), val);
3918
3919 if (has_xdp) {
3920 /* TX queue with next queue set to TX */
3921 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3922 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3923 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3924 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3925 (I40E_QUEUE_TYPE_TX <<
3926 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3927
3928 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3929 }
3930 /* TX queue with next RX or end of linked list */
3931 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3932 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3933 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3934 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3935 (I40E_QUEUE_TYPE_RX <<
3936 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3937
3938 /* Terminate the linked list */
3939 if (q == (q_vector->num_ringpairs - 1))
3940 val |= (I40E_QUEUE_END_OF_LIST <<
3941 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3942
3943 wr32(hw, I40E_QINT_TQCTL(qp), val);
3944 qp++;
3945 }
3946 }
3947
3948 i40e_flush(hw);
3949}
3950
3951/**
3952 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3953 * @pf: pointer to private device data structure
3954 **/
3955static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3956{
3957 struct i40e_hw *hw = &pf->hw;
3958 u32 val;
3959
3960 /* clear things first */
3961 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3962 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3963
3964 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3965 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3966 I40E_PFINT_ICR0_ENA_GRST_MASK |
3967 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3968 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3969 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3970 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3971 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3972
3973 if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags))
3974 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3975
3976 if (test_bit(I40E_FLAG_PTP_ENA, pf->flags))
3977 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3978
3979 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3980
3981 /* SW_ITR_IDX = 0, but don't change INTENA */
3982 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3983 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3984
3985 /* OTHER_ITR_IDX = 0 */
3986 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3987}
3988
3989/**
3990 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3991 * @vsi: the VSI being configured
3992 **/
3993static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3994{
3995 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3996 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3997 struct i40e_pf *pf = vsi->back;
3998 struct i40e_hw *hw = &pf->hw;
3999
4000 /* set the ITR configuration */
4001 q_vector->rx.next_update = jiffies + 1;
4002 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
4003 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
4004 q_vector->rx.current_itr = q_vector->rx.target_itr;
4005 q_vector->tx.next_update = jiffies + 1;
4006 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
4007 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
4008 q_vector->tx.current_itr = q_vector->tx.target_itr;
4009
4010 i40e_enable_misc_int_causes(pf);
4011
4012 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
4013 wr32(hw, I40E_PFINT_LNKLST0, 0);
4014
4015 /* Associate the queue pair to the vector and enable the queue
4016 * interrupt RX queue in linked list with next queue set to TX
4017 */
4018 wr32(hw, I40E_QINT_RQCTL(0), I40E_QINT_RQCTL_VAL(nextqp, 0, TX));
4019
4020 if (i40e_enabled_xdp_vsi(vsi)) {
4021 /* TX queue in linked list with next queue set to TX */
4022 wr32(hw, I40E_QINT_TQCTL(nextqp),
4023 I40E_QINT_TQCTL_VAL(nextqp, 0, TX));
4024 }
4025
4026 /* last TX queue so the next RX queue doesn't matter */
4027 wr32(hw, I40E_QINT_TQCTL(0),
4028 I40E_QINT_TQCTL_VAL(I40E_QUEUE_END_OF_LIST, 0, RX));
4029 i40e_flush(hw);
4030}
4031
4032/**
4033 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
4034 * @pf: board private structure
4035 **/
4036void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
4037{
4038 struct i40e_hw *hw = &pf->hw;
4039
4040 wr32(hw, I40E_PFINT_DYN_CTL0,
4041 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
4042 i40e_flush(hw);
4043}
4044
4045/**
4046 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
4047 * @pf: board private structure
4048 **/
4049void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
4050{
4051 struct i40e_hw *hw = &pf->hw;
4052 u32 val;
4053
4054 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
4055 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
4056 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
4057
4058 wr32(hw, I40E_PFINT_DYN_CTL0, val);
4059 i40e_flush(hw);
4060}
4061
4062/**
4063 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
4064 * @irq: interrupt number
4065 * @data: pointer to a q_vector
4066 **/
4067static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
4068{
4069 struct i40e_q_vector *q_vector = data;
4070
4071 if (!q_vector->tx.ring && !q_vector->rx.ring)
4072 return IRQ_HANDLED;
4073
4074 napi_schedule_irqoff(n: &q_vector->napi);
4075
4076 return IRQ_HANDLED;
4077}
4078
4079/**
4080 * i40e_irq_affinity_notify - Callback for affinity changes
4081 * @notify: context as to what irq was changed
4082 * @mask: the new affinity mask
4083 *
4084 * This is a callback function used by the irq_set_affinity_notifier function
4085 * so that we may register to receive changes to the irq affinity masks.
4086 **/
4087static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
4088 const cpumask_t *mask)
4089{
4090 struct i40e_q_vector *q_vector =
4091 container_of(notify, struct i40e_q_vector, affinity_notify);
4092
4093 cpumask_copy(dstp: &q_vector->affinity_mask, srcp: mask);
4094}
4095
4096/**
4097 * i40e_irq_affinity_release - Callback for affinity notifier release
4098 * @ref: internal core kernel usage
4099 *
4100 * This is a callback function used by the irq_set_affinity_notifier function
4101 * to inform the current notification subscriber that they will no longer
4102 * receive notifications.
4103 **/
4104static void i40e_irq_affinity_release(struct kref *ref) {}
4105
4106/**
4107 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
4108 * @vsi: the VSI being configured
4109 * @basename: name for the vector
4110 *
4111 * Allocates MSI-X vectors and requests interrupts from the kernel.
4112 **/
4113static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
4114{
4115 int q_vectors = vsi->num_q_vectors;
4116 struct i40e_pf *pf = vsi->back;
4117 int base = vsi->base_vector;
4118 int rx_int_idx = 0;
4119 int tx_int_idx = 0;
4120 int vector, err;
4121 int irq_num;
4122 int cpu;
4123
4124 for (vector = 0; vector < q_vectors; vector++) {
4125 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
4126
4127 irq_num = pf->msix_entries[base + vector].vector;
4128
4129 if (q_vector->tx.ring && q_vector->rx.ring) {
4130 snprintf(buf: q_vector->name, size: sizeof(q_vector->name) - 1,
4131 fmt: "%s-%s-%d", basename, "TxRx", rx_int_idx++);
4132 tx_int_idx++;
4133 } else if (q_vector->rx.ring) {
4134 snprintf(buf: q_vector->name, size: sizeof(q_vector->name) - 1,
4135 fmt: "%s-%s-%d", basename, "rx", rx_int_idx++);
4136 } else if (q_vector->tx.ring) {
4137 snprintf(buf: q_vector->name, size: sizeof(q_vector->name) - 1,
4138 fmt: "%s-%s-%d", basename, "tx", tx_int_idx++);
4139 } else {
4140 /* skip this unused q_vector */
4141 continue;
4142 }
4143 err = request_irq(irq: irq_num,
4144 handler: vsi->irq_handler,
4145 flags: 0,
4146 name: q_vector->name,
4147 dev: q_vector);
4148 if (err) {
4149 dev_info(&pf->pdev->dev,
4150 "MSIX request_irq failed, error: %d\n", err);
4151 goto free_queue_irqs;
4152 }
4153
4154 /* register for affinity change notifications */
4155 q_vector->irq_num = irq_num;
4156 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
4157 q_vector->affinity_notify.release = i40e_irq_affinity_release;
4158 irq_set_affinity_notifier(irq: irq_num, notify: &q_vector->affinity_notify);
4159 /* Spread affinity hints out across online CPUs.
4160 *
4161 * get_cpu_mask returns a static constant mask with
4162 * a permanent lifetime so it's ok to pass to
4163 * irq_update_affinity_hint without making a copy.
4164 */
4165 cpu = cpumask_local_spread(i: q_vector->v_idx, node: -1);
4166 irq_update_affinity_hint(irq: irq_num, m: get_cpu_mask(cpu));
4167 }
4168
4169 vsi->irqs_ready = true;
4170 return 0;
4171
4172free_queue_irqs:
4173 while (vector) {
4174 vector--;
4175 irq_num = pf->msix_entries[base + vector].vector;
4176 irq_set_affinity_notifier(irq: irq_num, NULL);
4177 irq_update_affinity_hint(irq: irq_num, NULL);
4178 free_irq(irq_num, vsi->q_vectors[vector]);
4179 }
4180 return err;
4181}
4182
4183/**
4184 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
4185 * @vsi: the VSI being un-configured
4186 **/
4187static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
4188{
4189 struct i40e_pf *pf = vsi->back;
4190 struct i40e_hw *hw = &pf->hw;
4191 int base = vsi->base_vector;
4192 int i;
4193
4194 /* disable interrupt causation from each queue */
4195 for (i = 0; i < vsi->num_queue_pairs; i++) {
4196 u32 val;
4197
4198 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
4199 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
4200 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
4201
4202 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
4203 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
4204 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
4205
4206 if (!i40e_enabled_xdp_vsi(vsi))
4207 continue;
4208 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
4209 }
4210
4211 /* disable each interrupt */
4212 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
4213 for (i = vsi->base_vector;
4214 i < (vsi->num_q_vectors + vsi->base_vector); i++)
4215 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
4216
4217 i40e_flush(hw);
4218 for (i = 0; i < vsi->num_q_vectors; i++)
4219 synchronize_irq(irq: pf->msix_entries[i + base].vector);
4220 } else {
4221 /* Legacy and MSI mode - this stops all interrupt handling */
4222 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
4223 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
4224 i40e_flush(hw);
4225 synchronize_irq(irq: pf->pdev->irq);
4226 }
4227}
4228
4229/**
4230 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
4231 * @vsi: the VSI being configured
4232 **/
4233static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
4234{
4235 struct i40e_pf *pf = vsi->back;
4236 int i;
4237
4238 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
4239 for (i = 0; i < vsi->num_q_vectors; i++)
4240 i40e_irq_dynamic_enable(vsi, vector: i);
4241 } else {
4242 i40e_irq_dynamic_enable_icr0(pf);
4243 }
4244
4245 i40e_flush(&pf->hw);
4246 return 0;
4247}
4248
4249/**
4250 * i40e_free_misc_vector - Free the vector that handles non-queue events
4251 * @pf: board private structure
4252 **/
4253static void i40e_free_misc_vector(struct i40e_pf *pf)
4254{
4255 /* Disable ICR 0 */
4256 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
4257 i40e_flush(&pf->hw);
4258
4259 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags) && pf->msix_entries) {
4260 free_irq(pf->msix_entries[0].vector, pf);
4261 clear_bit(nr: __I40E_MISC_IRQ_REQUESTED, addr: pf->state);
4262 }
4263}
4264
4265/**
4266 * i40e_intr - MSI/Legacy and non-queue interrupt handler
4267 * @irq: interrupt number
4268 * @data: pointer to a q_vector
4269 *
4270 * This is the handler used for all MSI/Legacy interrupts, and deals
4271 * with both queue and non-queue interrupts. This is also used in
4272 * MSIX mode to handle the non-queue interrupts.
4273 **/
4274static irqreturn_t i40e_intr(int irq, void *data)
4275{
4276 struct i40e_pf *pf = (struct i40e_pf *)data;
4277 struct i40e_hw *hw = &pf->hw;
4278 irqreturn_t ret = IRQ_NONE;
4279 u32 icr0, icr0_remaining;
4280 u32 val, ena_mask;
4281
4282 icr0 = rd32(hw, I40E_PFINT_ICR0);
4283 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
4284
4285 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
4286 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
4287 goto enable_intr;
4288
4289 /* if interrupt but no bits showing, must be SWINT */
4290 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
4291 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
4292 pf->sw_int_count++;
4293
4294 if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags) &&
4295 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
4296 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4297 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4298 set_bit(nr: __I40E_CORE_RESET_REQUESTED, addr: pf->state);
4299 }
4300
4301 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
4302 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
4303 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
4304 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4305
4306 /* We do not have a way to disarm Queue causes while leaving
4307 * interrupt enabled for all other causes, ideally
4308 * interrupt should be disabled while we are in NAPI but
4309 * this is not a performance path and napi_schedule()
4310 * can deal with rescheduling.
4311 */
4312 if (!test_bit(__I40E_DOWN, pf->state))
4313 napi_schedule_irqoff(n: &q_vector->napi);
4314 }
4315
4316 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
4317 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4318 set_bit(nr: __I40E_ADMINQ_EVENT_PENDING, addr: pf->state);
4319 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4320 }
4321
4322 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
4323 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4324 set_bit(nr: __I40E_MDD_EVENT_PENDING, addr: pf->state);
4325 }
4326
4327 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4328 /* disable any further VFLR event notifications */
4329 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4330 u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4331
4332 reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
4333 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4334 } else {
4335 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4336 set_bit(nr: __I40E_VFLR_EVENT_PENDING, addr: pf->state);
4337 }
4338 }
4339
4340 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4341 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4342 set_bit(nr: __I40E_RESET_INTR_RECEIVED, addr: pf->state);
4343 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4344 val = rd32(hw, I40E_GLGEN_RSTAT);
4345 val = FIELD_GET(I40E_GLGEN_RSTAT_RESET_TYPE_MASK, val);
4346 if (val == I40E_RESET_CORER) {
4347 pf->corer_count++;
4348 } else if (val == I40E_RESET_GLOBR) {
4349 pf->globr_count++;
4350 } else if (val == I40E_RESET_EMPR) {
4351 pf->empr_count++;
4352 set_bit(nr: __I40E_EMP_RESET_INTR_RECEIVED, addr: pf->state);
4353 }
4354 }
4355
4356 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4357 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4358 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4359 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4360 rd32(hw, I40E_PFHMC_ERRORINFO),
4361 rd32(hw, I40E_PFHMC_ERRORDATA));
4362 }
4363
4364 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4365 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4366
4367 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_EVENT0_MASK)
4368 schedule_work(work: &pf->ptp_extts0_work);
4369
4370 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK)
4371 i40e_ptp_tx_hwtstamp(pf);
4372
4373 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4374 }
4375
4376 /* If a critical error is pending we have no choice but to reset the
4377 * device.
4378 * Report and mask out any remaining unexpected interrupts.
4379 */
4380 icr0_remaining = icr0 & ena_mask;
4381 if (icr0_remaining) {
4382 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4383 icr0_remaining);
4384 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4385 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4386 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4387 dev_info(&pf->pdev->dev, "device will be reset\n");
4388 set_bit(nr: __I40E_PF_RESET_REQUESTED, addr: pf->state);
4389 i40e_service_event_schedule(pf);
4390 }
4391 ena_mask &= ~icr0_remaining;
4392 }
4393 ret = IRQ_HANDLED;
4394
4395enable_intr:
4396 /* re-enable interrupt causes */
4397 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4398 if (!test_bit(__I40E_DOWN, pf->state) ||
4399 test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4400 i40e_service_event_schedule(pf);
4401 i40e_irq_dynamic_enable_icr0(pf);
4402 }
4403
4404 return ret;
4405}
4406
4407/**
4408 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4409 * @tx_ring: tx ring to clean
4410 * @budget: how many cleans we're allowed
4411 *
4412 * Returns true if there's any budget left (e.g. the clean is finished)
4413 **/
4414static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4415{
4416 struct i40e_vsi *vsi = tx_ring->vsi;
4417 u16 i = tx_ring->next_to_clean;
4418 struct i40e_tx_buffer *tx_buf;
4419 struct i40e_tx_desc *tx_desc;
4420
4421 tx_buf = &tx_ring->tx_bi[i];
4422 tx_desc = I40E_TX_DESC(tx_ring, i);
4423 i -= tx_ring->count;
4424
4425 do {
4426 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4427
4428 /* if next_to_watch is not set then there is no work pending */
4429 if (!eop_desc)
4430 break;
4431
4432 /* prevent any other reads prior to eop_desc */
4433 smp_rmb();
4434
4435 /* if the descriptor isn't done, no work yet to do */
4436 if (!(eop_desc->cmd_type_offset_bsz &
4437 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4438 break;
4439
4440 /* clear next_to_watch to prevent false hangs */
4441 tx_buf->next_to_watch = NULL;
4442
4443 tx_desc->buffer_addr = 0;
4444 tx_desc->cmd_type_offset_bsz = 0;
4445 /* move past filter desc */
4446 tx_buf++;
4447 tx_desc++;
4448 i++;
4449 if (unlikely(!i)) {
4450 i -= tx_ring->count;
4451 tx_buf = tx_ring->tx_bi;
4452 tx_desc = I40E_TX_DESC(tx_ring, 0);
4453 }
4454 /* unmap skb header data */
4455 dma_unmap_single(tx_ring->dev,
4456 dma_unmap_addr(tx_buf, dma),
4457 dma_unmap_len(tx_buf, len),
4458 DMA_TO_DEVICE);
4459 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4460 kfree(objp: tx_buf->raw_buf);
4461
4462 tx_buf->raw_buf = NULL;
4463 tx_buf->tx_flags = 0;
4464 tx_buf->next_to_watch = NULL;
4465 dma_unmap_len_set(tx_buf, len, 0);
4466 tx_desc->buffer_addr = 0;
4467 tx_desc->cmd_type_offset_bsz = 0;
4468
4469 /* move us past the eop_desc for start of next FD desc */
4470 tx_buf++;
4471 tx_desc++;
4472 i++;
4473 if (unlikely(!i)) {
4474 i -= tx_ring->count;
4475 tx_buf = tx_ring->tx_bi;
4476 tx_desc = I40E_TX_DESC(tx_ring, 0);
4477 }
4478
4479 /* update budget accounting */
4480 budget--;
4481 } while (likely(budget));
4482
4483 i += tx_ring->count;
4484 tx_ring->next_to_clean = i;
4485
4486 if (test_bit(I40E_FLAG_MSIX_ENA, vsi->back->flags))
4487 i40e_irq_dynamic_enable(vsi, vector: tx_ring->q_vector->v_idx);
4488
4489 return budget > 0;
4490}
4491
4492/**
4493 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4494 * @irq: interrupt number
4495 * @data: pointer to a q_vector
4496 **/
4497static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4498{
4499 struct i40e_q_vector *q_vector = data;
4500 struct i40e_vsi *vsi;
4501
4502 if (!q_vector->tx.ring)
4503 return IRQ_HANDLED;
4504
4505 vsi = q_vector->tx.ring->vsi;
4506 i40e_clean_fdir_tx_irq(tx_ring: q_vector->tx.ring, budget: vsi->work_limit);
4507
4508 return IRQ_HANDLED;
4509}
4510
4511/**
4512 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4513 * @vsi: the VSI being configured
4514 * @v_idx: vector index
4515 * @qp_idx: queue pair index
4516 **/
4517static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4518{
4519 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4520 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4521 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4522
4523 tx_ring->q_vector = q_vector;
4524 tx_ring->next = q_vector->tx.ring;
4525 q_vector->tx.ring = tx_ring;
4526 q_vector->tx.count++;
4527
4528 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4529 if (i40e_enabled_xdp_vsi(vsi)) {
4530 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4531
4532 xdp_ring->q_vector = q_vector;
4533 xdp_ring->next = q_vector->tx.ring;
4534 q_vector->tx.ring = xdp_ring;
4535 q_vector->tx.count++;
4536 }
4537
4538 rx_ring->q_vector = q_vector;
4539 rx_ring->next = q_vector->rx.ring;
4540 q_vector->rx.ring = rx_ring;
4541 q_vector->rx.count++;
4542}
4543
4544/**
4545 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4546 * @vsi: the VSI being configured
4547 *
4548 * This function maps descriptor rings to the queue-specific vectors
4549 * we were allotted through the MSI-X enabling code. Ideally, we'd have
4550 * one vector per queue pair, but on a constrained vector budget, we
4551 * group the queue pairs as "efficiently" as possible.
4552 **/
4553static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4554{
4555 int qp_remaining = vsi->num_queue_pairs;
4556 int q_vectors = vsi->num_q_vectors;
4557 int num_ringpairs;
4558 int v_start = 0;
4559 int qp_idx = 0;
4560
4561 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4562 * group them so there are multiple queues per vector.
4563 * It is also important to go through all the vectors available to be
4564 * sure that if we don't use all the vectors, that the remaining vectors
4565 * are cleared. This is especially important when decreasing the
4566 * number of queues in use.
4567 */
4568 for (; v_start < q_vectors; v_start++) {
4569 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4570
4571 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4572
4573 q_vector->num_ringpairs = num_ringpairs;
4574 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4575
4576 q_vector->rx.count = 0;
4577 q_vector->tx.count = 0;
4578 q_vector->rx.ring = NULL;
4579 q_vector->tx.ring = NULL;
4580
4581 while (num_ringpairs--) {
4582 i40e_map_vector_to_qp(vsi, v_idx: v_start, qp_idx);
4583 qp_idx++;
4584 qp_remaining--;
4585 }
4586 }
4587}
4588
4589/**
4590 * i40e_vsi_request_irq - Request IRQ from the OS
4591 * @vsi: the VSI being configured
4592 * @basename: name for the vector
4593 **/
4594static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4595{
4596 struct i40e_pf *pf = vsi->back;
4597 int err;
4598
4599 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
4600 err = i40e_vsi_request_irq_msix(vsi, basename);
4601 else if (test_bit(I40E_FLAG_MSI_ENA, pf->flags))
4602 err = request_irq(irq: pf->pdev->irq, handler: i40e_intr, flags: 0,
4603 name: pf->int_name, dev: pf);
4604 else
4605 err = request_irq(irq: pf->pdev->irq, handler: i40e_intr, IRQF_SHARED,
4606 name: pf->int_name, dev: pf);
4607
4608 if (err)
4609 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4610
4611 return err;
4612}
4613
4614#ifdef CONFIG_NET_POLL_CONTROLLER
4615/**
4616 * i40e_netpoll - A Polling 'interrupt' handler
4617 * @netdev: network interface device structure
4618 *
4619 * This is used by netconsole to send skbs without having to re-enable
4620 * interrupts. It's not called while the normal interrupt routine is executing.
4621 **/
4622static void i40e_netpoll(struct net_device *netdev)
4623{
4624 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
4625 struct i40e_vsi *vsi = np->vsi;
4626 struct i40e_pf *pf = vsi->back;
4627 int i;
4628
4629 /* if interface is down do nothing */
4630 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4631 return;
4632
4633 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
4634 for (i = 0; i < vsi->num_q_vectors; i++)
4635 i40e_msix_clean_rings(irq: 0, data: vsi->q_vectors[i]);
4636 } else {
4637 i40e_intr(irq: pf->pdev->irq, data: netdev);
4638 }
4639}
4640#endif
4641
4642#define I40E_QTX_ENA_WAIT_COUNT 50
4643
4644/**
4645 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4646 * @pf: the PF being configured
4647 * @pf_q: the PF queue
4648 * @enable: enable or disable state of the queue
4649 *
4650 * This routine will wait for the given Tx queue of the PF to reach the
4651 * enabled or disabled state.
4652 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4653 * multiple retries; else will return 0 in case of success.
4654 **/
4655static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4656{
4657 int i;
4658 u32 tx_reg;
4659
4660 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4661 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4662 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4663 break;
4664
4665 usleep_range(min: 10, max: 20);
4666 }
4667 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4668 return -ETIMEDOUT;
4669
4670 return 0;
4671}
4672
4673/**
4674 * i40e_control_tx_q - Start or stop a particular Tx queue
4675 * @pf: the PF structure
4676 * @pf_q: the PF queue to configure
4677 * @enable: start or stop the queue
4678 *
4679 * This function enables or disables a single queue. Note that any delay
4680 * required after the operation is expected to be handled by the caller of
4681 * this function.
4682 **/
4683static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4684{
4685 struct i40e_hw *hw = &pf->hw;
4686 u32 tx_reg;
4687 int i;
4688
4689 /* warn the TX unit of coming changes */
4690 i40e_pre_tx_queue_cfg(hw: &pf->hw, queue: pf_q, enable);
4691 if (!enable)
4692 usleep_range(min: 10, max: 20);
4693
4694 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4695 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4696 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4697 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4698 break;
4699 usleep_range(min: 1000, max: 2000);
4700 }
4701
4702 /* Skip if the queue is already in the requested state */
4703 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4704 return;
4705
4706 /* turn on/off the queue */
4707 if (enable) {
4708 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4709 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4710 } else {
4711 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4712 }
4713
4714 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4715}
4716
4717/**
4718 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4719 * @seid: VSI SEID
4720 * @pf: the PF structure
4721 * @pf_q: the PF queue to configure
4722 * @is_xdp: true if the queue is used for XDP
4723 * @enable: start or stop the queue
4724 **/
4725int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4726 bool is_xdp, bool enable)
4727{
4728 int ret;
4729
4730 i40e_control_tx_q(pf, pf_q, enable);
4731
4732 /* wait for the change to finish */
4733 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4734 if (ret) {
4735 dev_info(&pf->pdev->dev,
4736 "VSI seid %d %sTx ring %d %sable timeout\n",
4737 seid, (is_xdp ? "XDP " : ""), pf_q,
4738 (enable ? "en" : "dis"));
4739 }
4740
4741 return ret;
4742}
4743
4744/**
4745 * i40e_vsi_enable_tx - Start a VSI's rings
4746 * @vsi: the VSI being configured
4747 **/
4748static int i40e_vsi_enable_tx(struct i40e_vsi *vsi)
4749{
4750 struct i40e_pf *pf = vsi->back;
4751 int i, pf_q, ret = 0;
4752
4753 pf_q = vsi->base_queue;
4754 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4755 ret = i40e_control_wait_tx_q(seid: vsi->seid, pf,
4756 pf_q,
4757 is_xdp: false /*is xdp*/, enable: true);
4758 if (ret)
4759 break;
4760
4761 if (!i40e_enabled_xdp_vsi(vsi))
4762 continue;
4763
4764 ret = i40e_control_wait_tx_q(seid: vsi->seid, pf,
4765 pf_q: pf_q + vsi->alloc_queue_pairs,
4766 is_xdp: true /*is xdp*/, enable: true);
4767 if (ret)
4768 break;
4769 }
4770 return ret;
4771}
4772
4773/**
4774 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4775 * @pf: the PF being configured
4776 * @pf_q: the PF queue
4777 * @enable: enable or disable state of the queue
4778 *
4779 * This routine will wait for the given Rx queue of the PF to reach the
4780 * enabled or disabled state.
4781 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4782 * multiple retries; else will return 0 in case of success.
4783 **/
4784static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4785{
4786 int i;
4787 u32 rx_reg;
4788
4789 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4790 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4791 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4792 break;
4793
4794 usleep_range(min: 10, max: 20);
4795 }
4796 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4797 return -ETIMEDOUT;
4798
4799 return 0;
4800}
4801
4802/**
4803 * i40e_control_rx_q - Start or stop a particular Rx queue
4804 * @pf: the PF structure
4805 * @pf_q: the PF queue to configure
4806 * @enable: start or stop the queue
4807 *
4808 * This function enables or disables a single queue. Note that
4809 * any delay required after the operation is expected to be
4810 * handled by the caller of this function.
4811 **/
4812static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4813{
4814 struct i40e_hw *hw = &pf->hw;
4815 u32 rx_reg;
4816 int i;
4817
4818 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4819 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4820 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4821 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4822 break;
4823 usleep_range(min: 1000, max: 2000);
4824 }
4825
4826 /* Skip if the queue is already in the requested state */
4827 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4828 return;
4829
4830 /* turn on/off the queue */
4831 if (enable)
4832 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4833 else
4834 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4835
4836 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4837}
4838
4839/**
4840 * i40e_control_wait_rx_q
4841 * @pf: the PF structure
4842 * @pf_q: queue being configured
4843 * @enable: start or stop the rings
4844 *
4845 * This function enables or disables a single queue along with waiting
4846 * for the change to finish. The caller of this function should handle
4847 * the delays needed in the case of disabling queues.
4848 **/
4849int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4850{
4851 int ret = 0;
4852
4853 i40e_control_rx_q(pf, pf_q, enable);
4854
4855 /* wait for the change to finish */
4856 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4857 if (ret)
4858 return ret;
4859
4860 return ret;
4861}
4862
4863/**
4864 * i40e_vsi_enable_rx - Start a VSI's rings
4865 * @vsi: the VSI being configured
4866 **/
4867static int i40e_vsi_enable_rx(struct i40e_vsi *vsi)
4868{
4869 struct i40e_pf *pf = vsi->back;
4870 int i, pf_q, ret = 0;
4871
4872 pf_q = vsi->base_queue;
4873 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4874 ret = i40e_control_wait_rx_q(pf, pf_q, enable: true);
4875 if (ret) {
4876 dev_info(&pf->pdev->dev,
4877 "VSI seid %d Rx ring %d enable timeout\n",
4878 vsi->seid, pf_q);
4879 break;
4880 }
4881 }
4882
4883 return ret;
4884}
4885
4886/**
4887 * i40e_vsi_start_rings - Start a VSI's rings
4888 * @vsi: the VSI being configured
4889 **/
4890int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4891{
4892 int ret = 0;
4893
4894 /* do rx first for enable and last for disable */
4895 ret = i40e_vsi_enable_rx(vsi);
4896 if (ret)
4897 return ret;
4898 ret = i40e_vsi_enable_tx(vsi);
4899
4900 return ret;
4901}
4902
4903#define I40E_DISABLE_TX_GAP_MSEC 50
4904
4905/**
4906 * i40e_vsi_stop_rings - Stop a VSI's rings
4907 * @vsi: the VSI being configured
4908 **/
4909void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4910{
4911 struct i40e_pf *pf = vsi->back;
4912 u32 pf_q, tx_q_end, rx_q_end;
4913
4914 /* When port TX is suspended, don't wait */
4915 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4916 return i40e_vsi_stop_rings_no_wait(vsi);
4917
4918 tx_q_end = vsi->base_queue +
4919 vsi->alloc_queue_pairs * (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
4920 for (pf_q = vsi->base_queue; pf_q < tx_q_end; pf_q++)
4921 i40e_pre_tx_queue_cfg(hw: &pf->hw, queue: pf_q, enable: false);
4922
4923 rx_q_end = vsi->base_queue + vsi->num_queue_pairs;
4924 for (pf_q = vsi->base_queue; pf_q < rx_q_end; pf_q++)
4925 i40e_control_rx_q(pf, pf_q, enable: false);
4926
4927 msleep(I40E_DISABLE_TX_GAP_MSEC);
4928 for (pf_q = vsi->base_queue; pf_q < tx_q_end; pf_q++)
4929 wr32(&pf->hw, I40E_QTX_ENA(pf_q), 0);
4930
4931 i40e_vsi_wait_queues_disabled(vsi);
4932}
4933
4934/**
4935 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4936 * @vsi: the VSI being shutdown
4937 *
4938 * This function stops all the rings for a VSI but does not delay to verify
4939 * that rings have been disabled. It is expected that the caller is shutting
4940 * down multiple VSIs at once and will delay together for all the VSIs after
4941 * initiating the shutdown. This is particularly useful for shutting down lots
4942 * of VFs together. Otherwise, a large delay can be incurred while configuring
4943 * each VSI in serial.
4944 **/
4945void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4946{
4947 struct i40e_pf *pf = vsi->back;
4948 int i, pf_q;
4949
4950 pf_q = vsi->base_queue;
4951 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4952 i40e_control_tx_q(pf, pf_q, enable: false);
4953 i40e_control_rx_q(pf, pf_q, enable: false);
4954 }
4955}
4956
4957/**
4958 * i40e_vsi_free_irq - Free the irq association with the OS
4959 * @vsi: the VSI being configured
4960 **/
4961static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4962{
4963 struct i40e_pf *pf = vsi->back;
4964 struct i40e_hw *hw = &pf->hw;
4965 int base = vsi->base_vector;
4966 u32 val, qp;
4967 int i;
4968
4969 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
4970 if (!vsi->q_vectors)
4971 return;
4972
4973 if (!vsi->irqs_ready)
4974 return;
4975
4976 vsi->irqs_ready = false;
4977 for (i = 0; i < vsi->num_q_vectors; i++) {
4978 int irq_num;
4979 u16 vector;
4980
4981 vector = i + base;
4982 irq_num = pf->msix_entries[vector].vector;
4983
4984 /* free only the irqs that were actually requested */
4985 if (!vsi->q_vectors[i] ||
4986 !vsi->q_vectors[i]->num_ringpairs)
4987 continue;
4988
4989 /* clear the affinity notifier in the IRQ descriptor */
4990 irq_set_affinity_notifier(irq: irq_num, NULL);
4991 /* remove our suggested affinity mask for this IRQ */
4992 irq_update_affinity_hint(irq: irq_num, NULL);
4993 free_irq(irq_num, vsi->q_vectors[i]);
4994
4995 /* Tear down the interrupt queue link list
4996 *
4997 * We know that they come in pairs and always
4998 * the Rx first, then the Tx. To clear the
4999 * link list, stick the EOL value into the
5000 * next_q field of the registers.
5001 */
5002 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
5003 qp = FIELD_GET(I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK,
5004 val);
5005 val |= I40E_QUEUE_END_OF_LIST
5006 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
5007 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
5008
5009 while (qp != I40E_QUEUE_END_OF_LIST) {
5010 u32 next;
5011
5012 val = rd32(hw, I40E_QINT_RQCTL(qp));
5013
5014 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
5015 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
5016 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
5017 I40E_QINT_RQCTL_INTEVENT_MASK);
5018
5019 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
5020 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
5021
5022 wr32(hw, I40E_QINT_RQCTL(qp), val);
5023
5024 val = rd32(hw, I40E_QINT_TQCTL(qp));
5025
5026 next = FIELD_GET(I40E_QINT_TQCTL_NEXTQ_INDX_MASK,
5027 val);
5028
5029 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
5030 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
5031 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
5032 I40E_QINT_TQCTL_INTEVENT_MASK);
5033
5034 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
5035 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
5036
5037 wr32(hw, I40E_QINT_TQCTL(qp), val);
5038 qp = next;
5039 }
5040 }
5041 } else {
5042 free_irq(pf->pdev->irq, pf);
5043
5044 val = rd32(hw, I40E_PFINT_LNKLST0);
5045 qp = FIELD_GET(I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK, val);
5046 val |= I40E_QUEUE_END_OF_LIST
5047 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
5048 wr32(hw, I40E_PFINT_LNKLST0, val);
5049
5050 val = rd32(hw, I40E_QINT_RQCTL(qp));
5051 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
5052 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
5053 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
5054 I40E_QINT_RQCTL_INTEVENT_MASK);
5055
5056 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
5057 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
5058
5059 wr32(hw, I40E_QINT_RQCTL(qp), val);
5060
5061 val = rd32(hw, I40E_QINT_TQCTL(qp));
5062
5063 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
5064 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
5065 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
5066 I40E_QINT_TQCTL_INTEVENT_MASK);
5067
5068 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
5069 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
5070
5071 wr32(hw, I40E_QINT_TQCTL(qp), val);
5072 }
5073}
5074
5075/**
5076 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
5077 * @vsi: the VSI being configured
5078 * @v_idx: Index of vector to be freed
5079 *
5080 * This function frees the memory allocated to the q_vector. In addition if
5081 * NAPI is enabled it will delete any references to the NAPI struct prior
5082 * to freeing the q_vector.
5083 **/
5084static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
5085{
5086 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
5087 struct i40e_ring *ring;
5088
5089 if (!q_vector)
5090 return;
5091
5092 /* disassociate q_vector from rings */
5093 i40e_for_each_ring(ring, q_vector->tx)
5094 ring->q_vector = NULL;
5095
5096 i40e_for_each_ring(ring, q_vector->rx)
5097 ring->q_vector = NULL;
5098
5099 /* only VSI w/ an associated netdev is set up w/ NAPI */
5100 if (vsi->netdev)
5101 netif_napi_del(napi: &q_vector->napi);
5102
5103 vsi->q_vectors[v_idx] = NULL;
5104
5105 kfree_rcu(q_vector, rcu);
5106}
5107
5108/**
5109 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
5110 * @vsi: the VSI being un-configured
5111 *
5112 * This frees the memory allocated to the q_vectors and
5113 * deletes references to the NAPI struct.
5114 **/
5115static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
5116{
5117 int v_idx;
5118
5119 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
5120 i40e_free_q_vector(vsi, v_idx);
5121}
5122
5123/**
5124 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
5125 * @pf: board private structure
5126 **/
5127static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
5128{
5129 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
5130 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
5131 pci_disable_msix(dev: pf->pdev);
5132 kfree(objp: pf->msix_entries);
5133 pf->msix_entries = NULL;
5134 kfree(objp: pf->irq_pile);
5135 pf->irq_pile = NULL;
5136 } else if (test_bit(I40E_FLAG_MSI_ENA, pf->flags)) {
5137 pci_disable_msi(dev: pf->pdev);
5138 }
5139 clear_bit(nr: I40E_FLAG_MSI_ENA, addr: pf->flags);
5140 clear_bit(nr: I40E_FLAG_MSIX_ENA, addr: pf->flags);
5141}
5142
5143/**
5144 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
5145 * @pf: board private structure
5146 *
5147 * We go through and clear interrupt specific resources and reset the structure
5148 * to pre-load conditions
5149 **/
5150static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
5151{
5152 struct i40e_vsi *vsi;
5153 int i;
5154
5155 if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
5156 i40e_free_misc_vector(pf);
5157
5158 i40e_put_lump(pile: pf->irq_pile, index: pf->iwarp_base_vector,
5159 I40E_IWARP_IRQ_PILE_ID);
5160
5161 i40e_put_lump(pile: pf->irq_pile, index: 0, I40E_PILE_VALID_BIT-1);
5162
5163 i40e_pf_for_each_vsi(pf, i, vsi)
5164 i40e_vsi_free_q_vectors(vsi);
5165
5166 i40e_reset_interrupt_capability(pf);
5167}
5168
5169/**
5170 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
5171 * @vsi: the VSI being configured
5172 **/
5173static void i40e_napi_enable_all(struct i40e_vsi *vsi)
5174{
5175 int q_idx;
5176
5177 if (!vsi->netdev)
5178 return;
5179
5180 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5181 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5182
5183 if (q_vector->rx.ring || q_vector->tx.ring)
5184 napi_enable(n: &q_vector->napi);
5185 }
5186}
5187
5188/**
5189 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
5190 * @vsi: the VSI being configured
5191 **/
5192static void i40e_napi_disable_all(struct i40e_vsi *vsi)
5193{
5194 int q_idx;
5195
5196 if (!vsi->netdev)
5197 return;
5198
5199 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5200 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5201
5202 if (q_vector->rx.ring || q_vector->tx.ring)
5203 napi_disable(n: &q_vector->napi);
5204 }
5205}
5206
5207/**
5208 * i40e_vsi_close - Shut down a VSI
5209 * @vsi: the vsi to be quelled
5210 **/
5211static void i40e_vsi_close(struct i40e_vsi *vsi)
5212{
5213 struct i40e_pf *pf = vsi->back;
5214 if (!test_and_set_bit(nr: __I40E_VSI_DOWN, addr: vsi->state))
5215 i40e_down(vsi);
5216 i40e_vsi_free_irq(vsi);
5217 i40e_vsi_free_tx_resources(vsi);
5218 i40e_vsi_free_rx_resources(vsi);
5219 vsi->current_netdev_flags = 0;
5220 set_bit(nr: __I40E_CLIENT_SERVICE_REQUESTED, addr: pf->state);
5221 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
5222 set_bit(nr: __I40E_CLIENT_RESET, addr: pf->state);
5223}
5224
5225/**
5226 * i40e_quiesce_vsi - Pause a given VSI
5227 * @vsi: the VSI being paused
5228 **/
5229static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
5230{
5231 if (test_bit(__I40E_VSI_DOWN, vsi->state))
5232 return;
5233
5234 set_bit(nr: __I40E_VSI_NEEDS_RESTART, addr: vsi->state);
5235 if (vsi->netdev && netif_running(dev: vsi->netdev))
5236 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
5237 else
5238 i40e_vsi_close(vsi);
5239}
5240
5241/**
5242 * i40e_unquiesce_vsi - Resume a given VSI
5243 * @vsi: the VSI being resumed
5244 **/
5245static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
5246{
5247 if (!test_and_clear_bit(nr: __I40E_VSI_NEEDS_RESTART, addr: vsi->state))
5248 return;
5249
5250 if (vsi->netdev && netif_running(dev: vsi->netdev))
5251 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
5252 else
5253 i40e_vsi_open(vsi); /* this clears the DOWN bit */
5254}
5255
5256/**
5257 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
5258 * @pf: the PF
5259 **/
5260static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
5261{
5262 struct i40e_vsi *vsi;
5263 int v;
5264
5265 i40e_pf_for_each_vsi(pf, v, vsi)
5266 i40e_quiesce_vsi(vsi);
5267}
5268
5269/**
5270 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
5271 * @pf: the PF
5272 **/
5273static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
5274{
5275 struct i40e_vsi *vsi;
5276 int v;
5277
5278 i40e_pf_for_each_vsi(pf, v, vsi)
5279 i40e_unquiesce_vsi(vsi);
5280}
5281
5282/**
5283 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
5284 * @vsi: the VSI being configured
5285 *
5286 * Wait until all queues on a given VSI have been disabled.
5287 **/
5288int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
5289{
5290 struct i40e_pf *pf = vsi->back;
5291 int i, pf_q, ret;
5292
5293 pf_q = vsi->base_queue;
5294 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
5295 /* Check and wait for the Tx queue */
5296 ret = i40e_pf_txq_wait(pf, pf_q, enable: false);
5297 if (ret) {
5298 dev_info(&pf->pdev->dev,
5299 "VSI seid %d Tx ring %d disable timeout\n",
5300 vsi->seid, pf_q);
5301 return ret;
5302 }
5303
5304 if (!i40e_enabled_xdp_vsi(vsi))
5305 goto wait_rx;
5306
5307 /* Check and wait for the XDP Tx queue */
5308 ret = i40e_pf_txq_wait(pf, pf_q: pf_q + vsi->alloc_queue_pairs,
5309 enable: false);
5310 if (ret) {
5311 dev_info(&pf->pdev->dev,
5312 "VSI seid %d XDP Tx ring %d disable timeout\n",
5313 vsi->seid, pf_q);
5314 return ret;
5315 }
5316wait_rx:
5317 /* Check and wait for the Rx queue */
5318 ret = i40e_pf_rxq_wait(pf, pf_q, enable: false);
5319 if (ret) {
5320 dev_info(&pf->pdev->dev,
5321 "VSI seid %d Rx ring %d disable timeout\n",
5322 vsi->seid, pf_q);
5323 return ret;
5324 }
5325 }
5326
5327 return 0;
5328}
5329
5330#ifdef CONFIG_I40E_DCB
5331/**
5332 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
5333 * @pf: the PF
5334 *
5335 * This function waits for the queues to be in disabled state for all the
5336 * VSIs that are managed by this PF.
5337 **/
5338static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5339{
5340 struct i40e_vsi *vsi;
5341 int v, ret = 0;
5342
5343 i40e_pf_for_each_vsi(pf, v, vsi) {
5344 ret = i40e_vsi_wait_queues_disabled(vsi);
5345 if (ret)
5346 break;
5347 }
5348
5349 return ret;
5350}
5351
5352#endif
5353
5354/**
5355 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5356 * @pf: pointer to PF
5357 *
5358 * Get TC map for ISCSI PF type that will include iSCSI TC
5359 * and LAN TC.
5360 **/
5361static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5362{
5363 struct i40e_dcb_app_priority_table app;
5364 struct i40e_hw *hw = &pf->hw;
5365 u8 enabled_tc = 1; /* TC0 is always enabled */
5366 u8 tc, i;
5367 /* Get the iSCSI APP TLV */
5368 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5369
5370 for (i = 0; i < dcbcfg->numapps; i++) {
5371 app = dcbcfg->app[i];
5372 if (app.selector == I40E_APP_SEL_TCPIP &&
5373 app.protocolid == I40E_APP_PROTOID_ISCSI) {
5374 tc = dcbcfg->etscfg.prioritytable[app.priority];
5375 enabled_tc |= BIT(tc);
5376 break;
5377 }
5378 }
5379
5380 return enabled_tc;
5381}
5382
5383/**
5384 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
5385 * @dcbcfg: the corresponding DCBx configuration structure
5386 *
5387 * Return the number of TCs from given DCBx configuration
5388 **/
5389static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5390{
5391 int i, tc_unused = 0;
5392 u8 num_tc = 0;
5393 u8 ret = 0;
5394
5395 /* Scan the ETS Config Priority Table to find
5396 * traffic class enabled for a given priority
5397 * and create a bitmask of enabled TCs
5398 */
5399 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5400 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5401
5402 /* Now scan the bitmask to check for
5403 * contiguous TCs starting with TC0
5404 */
5405 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5406 if (num_tc & BIT(i)) {
5407 if (!tc_unused) {
5408 ret++;
5409 } else {
5410 pr_err("Non-contiguous TC - Disabling DCB\n");
5411 return 1;
5412 }
5413 } else {
5414 tc_unused = 1;
5415 }
5416 }
5417
5418 /* There is always at least TC0 */
5419 if (!ret)
5420 ret = 1;
5421
5422 return ret;
5423}
5424
5425/**
5426 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5427 * @dcbcfg: the corresponding DCBx configuration structure
5428 *
5429 * Query the current DCB configuration and return the number of
5430 * traffic classes enabled from the given DCBX config
5431 **/
5432static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5433{
5434 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5435 u8 enabled_tc = 1;
5436 u8 i;
5437
5438 for (i = 0; i < num_tc; i++)
5439 enabled_tc |= BIT(i);
5440
5441 return enabled_tc;
5442}
5443
5444/**
5445 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5446 * @pf: PF being queried
5447 *
5448 * Query the current MQPRIO configuration and return the number of
5449 * traffic classes enabled.
5450 **/
5451static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5452{
5453 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
5454 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5455 u8 enabled_tc = 1, i;
5456
5457 for (i = 1; i < num_tc; i++)
5458 enabled_tc |= BIT(i);
5459 return enabled_tc;
5460}
5461
5462/**
5463 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5464 * @pf: PF being queried
5465 *
5466 * Return number of traffic classes enabled for the given PF
5467 **/
5468static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5469{
5470 u8 i, enabled_tc = 1;
5471 u8 num_tc = 0;
5472
5473 if (i40e_is_tc_mqprio_enabled(pf)) {
5474 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
5475
5476 return vsi->mqprio_qopt.qopt.num_tc;
5477 }
5478
5479 /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5480 if (!test_bit(I40E_FLAG_DCB_ENA, pf->flags))
5481 return 1;
5482
5483 /* SFP mode will be enabled for all TCs on port */
5484 if (!test_bit(I40E_FLAG_MFP_ENA, pf->flags))
5485 return i40e_dcb_get_num_tc(dcbcfg: &pf->hw.local_dcbx_config);
5486
5487 /* MFP mode return count of enabled TCs for this PF */
5488 if (pf->hw.func_caps.iscsi)
5489 enabled_tc = i40e_get_iscsi_tc_map(pf);
5490 else
5491 return 1; /* Only TC0 */
5492
5493 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5494 if (enabled_tc & BIT(i))
5495 num_tc++;
5496 }
5497 return num_tc;
5498}
5499
5500/**
5501 * i40e_pf_get_tc_map - Get bitmap for enabled traffic classes
5502 * @pf: PF being queried
5503 *
5504 * Return a bitmap for enabled traffic classes for this PF.
5505 **/
5506static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5507{
5508 if (i40e_is_tc_mqprio_enabled(pf))
5509 return i40e_mqprio_get_enabled_tc(pf);
5510
5511 /* If neither MQPRIO nor DCB is enabled for this PF then just return
5512 * default TC
5513 */
5514 if (!test_bit(I40E_FLAG_DCB_ENA, pf->flags))
5515 return I40E_DEFAULT_TRAFFIC_CLASS;
5516
5517 /* SFP mode we want PF to be enabled for all TCs */
5518 if (!test_bit(I40E_FLAG_MFP_ENA, pf->flags))
5519 return i40e_dcb_get_enabled_tc(dcbcfg: &pf->hw.local_dcbx_config);
5520
5521 /* MFP enabled and iSCSI PF type */
5522 if (pf->hw.func_caps.iscsi)
5523 return i40e_get_iscsi_tc_map(pf);
5524 else
5525 return I40E_DEFAULT_TRAFFIC_CLASS;
5526}
5527
5528/**
5529 * i40e_vsi_get_bw_info - Query VSI BW Information
5530 * @vsi: the VSI being queried
5531 *
5532 * Returns 0 on success, negative value on failure
5533 **/
5534static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5535{
5536 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5537 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5538 struct i40e_pf *pf = vsi->back;
5539 struct i40e_hw *hw = &pf->hw;
5540 u32 tc_bw_max;
5541 int ret;
5542 int i;
5543
5544 /* Get the VSI level BW configuration */
5545 ret = i40e_aq_query_vsi_bw_config(hw, seid: vsi->seid, bw_data: &bw_config, NULL);
5546 if (ret) {
5547 dev_info(&pf->pdev->dev,
5548 "couldn't get PF vsi bw config, err %pe aq_err %s\n",
5549 ERR_PTR(ret),
5550 libie_aq_str(pf->hw.aq.asq_last_status));
5551 return -EINVAL;
5552 }
5553
5554 /* Get the VSI level BW configuration per TC */
5555 ret = i40e_aq_query_vsi_ets_sla_config(hw, seid: vsi->seid, bw_data: &bw_ets_config,
5556 NULL);
5557 if (ret) {
5558 dev_info(&pf->pdev->dev,
5559 "couldn't get PF vsi ets bw config, err %pe aq_err %s\n",
5560 ERR_PTR(ret),
5561 libie_aq_str(pf->hw.aq.asq_last_status));
5562 return -EINVAL;
5563 }
5564
5565 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5566 dev_info(&pf->pdev->dev,
5567 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5568 bw_config.tc_valid_bits,
5569 bw_ets_config.tc_valid_bits);
5570 /* Still continuing */
5571 }
5572
5573 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5574 vsi->bw_max_quanta = bw_config.max_bw;
5575 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5576 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5577 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5578 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5579 vsi->bw_ets_limit_credits[i] =
5580 le16_to_cpu(bw_ets_config.credits[i]);
5581 /* 3 bits out of 4 for each TC */
5582 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5583 }
5584
5585 return 0;
5586}
5587
5588/**
5589 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5590 * @vsi: the VSI being configured
5591 * @enabled_tc: TC bitmap
5592 * @bw_share: BW shared credits per TC
5593 *
5594 * Returns 0 on success, negative value on failure
5595 **/
5596static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5597 u8 *bw_share)
5598{
5599 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5600 struct i40e_pf *pf = vsi->back;
5601 int ret;
5602 int i;
5603
5604 /* There is no need to reset BW when mqprio mode is on. */
5605 if (i40e_is_tc_mqprio_enabled(pf))
5606 return 0;
5607 if (!vsi->mqprio_qopt.qopt.hw && !test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
5608 ret = i40e_set_bw_limit(vsi, seid: vsi->seid, max_tx_rate: 0);
5609 if (ret)
5610 dev_info(&pf->pdev->dev,
5611 "Failed to reset tx rate for vsi->seid %u\n",
5612 vsi->seid);
5613 return ret;
5614 }
5615 memset(&bw_data, 0, sizeof(bw_data));
5616 bw_data.tc_valid_bits = enabled_tc;
5617 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5618 bw_data.tc_bw_credits[i] = bw_share[i];
5619
5620 ret = i40e_aq_config_vsi_tc_bw(hw: &pf->hw, seid: vsi->seid, bw_data: &bw_data, NULL);
5621 if (ret) {
5622 dev_info(&pf->pdev->dev,
5623 "AQ command Config VSI BW allocation per TC failed = %d\n",
5624 pf->hw.aq.asq_last_status);
5625 return -EINVAL;
5626 }
5627
5628 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5629 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5630
5631 return 0;
5632}
5633
5634/**
5635 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5636 * @vsi: the VSI being configured
5637 * @enabled_tc: TC map to be enabled
5638 *
5639 **/
5640static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5641{
5642 struct net_device *netdev = vsi->netdev;
5643 struct i40e_pf *pf = vsi->back;
5644 struct i40e_hw *hw = &pf->hw;
5645 u8 netdev_tc = 0;
5646 int i;
5647 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5648
5649 if (!netdev)
5650 return;
5651
5652 if (!enabled_tc) {
5653 netdev_reset_tc(dev: netdev);
5654 return;
5655 }
5656
5657 /* Set up actual enabled TCs on the VSI */
5658 if (netdev_set_num_tc(dev: netdev, num_tc: vsi->tc_config.numtc))
5659 return;
5660
5661 /* set per TC queues for the VSI */
5662 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5663 /* Only set TC queues for enabled tcs
5664 *
5665 * e.g. For a VSI that has TC0 and TC3 enabled the
5666 * enabled_tc bitmap would be 0x00001001; the driver
5667 * will set the numtc for netdev as 2 that will be
5668 * referenced by the netdev layer as TC 0 and 1.
5669 */
5670 if (vsi->tc_config.enabled_tc & BIT(i))
5671 netdev_set_tc_queue(dev: netdev,
5672 tc: vsi->tc_config.tc_info[i].netdev_tc,
5673 count: vsi->tc_config.tc_info[i].qcount,
5674 offset: vsi->tc_config.tc_info[i].qoffset);
5675 }
5676
5677 if (i40e_is_tc_mqprio_enabled(pf))
5678 return;
5679
5680 /* Assign UP2TC map for the VSI */
5681 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5682 /* Get the actual TC# for the UP */
5683 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5684 /* Get the mapped netdev TC# for the UP */
5685 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5686 netdev_set_prio_tc_map(dev: netdev, prio: i, tc: netdev_tc);
5687 }
5688}
5689
5690/**
5691 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5692 * @vsi: the VSI being configured
5693 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5694 **/
5695static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5696 struct i40e_vsi_context *ctxt)
5697{
5698 /* copy just the sections touched not the entire info
5699 * since not all sections are valid as returned by
5700 * update vsi params
5701 */
5702 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5703 memcpy(&vsi->info.queue_mapping,
5704 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5705 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5706 sizeof(vsi->info.tc_mapping));
5707}
5708
5709/**
5710 * i40e_update_adq_vsi_queues - update queue mapping for ADq VSI
5711 * @vsi: the VSI being reconfigured
5712 * @vsi_offset: offset from main VF VSI
5713 */
5714int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset)
5715{
5716 struct i40e_vsi_context ctxt = {};
5717 struct i40e_pf *pf;
5718 struct i40e_hw *hw;
5719 int ret;
5720
5721 if (!vsi)
5722 return -EINVAL;
5723 pf = vsi->back;
5724 hw = &pf->hw;
5725
5726 ctxt.seid = vsi->seid;
5727 ctxt.pf_num = hw->pf_id;
5728 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id + vsi_offset;
5729 ctxt.uplink_seid = vsi->uplink_seid;
5730 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5731 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
5732 ctxt.info = vsi->info;
5733
5734 i40e_vsi_setup_queue_map(vsi, ctxt: &ctxt, enabled_tc: vsi->tc_config.enabled_tc,
5735 is_add: false);
5736 if (vsi->reconfig_rss) {
5737 vsi->rss_size = min_t(int, pf->alloc_rss_size,
5738 vsi->num_queue_pairs);
5739 ret = i40e_vsi_config_rss(vsi);
5740 if (ret) {
5741 dev_info(&pf->pdev->dev, "Failed to reconfig rss for num_queues\n");
5742 return ret;
5743 }
5744 vsi->reconfig_rss = false;
5745 }
5746
5747 ret = i40e_aq_update_vsi_params(hw, vsi_ctx: &ctxt, NULL);
5748 if (ret) {
5749 dev_info(&pf->pdev->dev, "Update vsi config failed, err %pe aq_err %s\n",
5750 ERR_PTR(ret),
5751 libie_aq_str(hw->aq.asq_last_status));
5752 return ret;
5753 }
5754 /* update the local VSI info with updated queue map */
5755 i40e_vsi_update_queue_map(vsi, ctxt: &ctxt);
5756 vsi->info.valid_sections = 0;
5757
5758 return ret;
5759}
5760
5761/**
5762 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5763 * @vsi: VSI to be configured
5764 * @enabled_tc: TC bitmap
5765 *
5766 * This configures a particular VSI for TCs that are mapped to the
5767 * given TC bitmap. It uses default bandwidth share for TCs across
5768 * VSIs to configure TC for a particular VSI.
5769 *
5770 * NOTE:
5771 * It is expected that the VSI queues have been quisced before calling
5772 * this function.
5773 **/
5774static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5775{
5776 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5777 struct i40e_pf *pf = vsi->back;
5778 struct i40e_hw *hw = &pf->hw;
5779 struct i40e_vsi_context ctxt;
5780 int ret = 0;
5781 int i;
5782
5783 /* Check if enabled_tc is same as existing or new TCs */
5784 if (vsi->tc_config.enabled_tc == enabled_tc &&
5785 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5786 return ret;
5787
5788 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5789 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5790 if (enabled_tc & BIT(i))
5791 bw_share[i] = 1;
5792 }
5793
5794 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5795 if (ret) {
5796 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5797
5798 dev_info(&pf->pdev->dev,
5799 "Failed configuring TC map %d for VSI %d\n",
5800 enabled_tc, vsi->seid);
5801 ret = i40e_aq_query_vsi_bw_config(hw, seid: vsi->seid,
5802 bw_data: &bw_config, NULL);
5803 if (ret) {
5804 dev_info(&pf->pdev->dev,
5805 "Failed querying vsi bw info, err %pe aq_err %s\n",
5806 ERR_PTR(ret),
5807 libie_aq_str(hw->aq.asq_last_status));
5808 goto out;
5809 }
5810 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5811 u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5812
5813 if (!valid_tc)
5814 valid_tc = bw_config.tc_valid_bits;
5815 /* Always enable TC0, no matter what */
5816 valid_tc |= 1;
5817 dev_info(&pf->pdev->dev,
5818 "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5819 enabled_tc, bw_config.tc_valid_bits, valid_tc);
5820 enabled_tc = valid_tc;
5821 }
5822
5823 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5824 if (ret) {
5825 dev_err(&pf->pdev->dev,
5826 "Unable to configure TC map %d for VSI %d\n",
5827 enabled_tc, vsi->seid);
5828 goto out;
5829 }
5830 }
5831
5832 /* Update Queue Pairs Mapping for currently enabled UPs */
5833 ctxt.seid = vsi->seid;
5834 ctxt.pf_num = vsi->back->hw.pf_id;
5835 ctxt.vf_num = 0;
5836 ctxt.uplink_seid = vsi->uplink_seid;
5837 ctxt.info = vsi->info;
5838 if (i40e_is_tc_mqprio_enabled(pf)) {
5839 ret = i40e_vsi_setup_queue_map_mqprio(vsi, ctxt: &ctxt, enabled_tc);
5840 if (ret)
5841 goto out;
5842 } else {
5843 i40e_vsi_setup_queue_map(vsi, ctxt: &ctxt, enabled_tc, is_add: false);
5844 }
5845
5846 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5847 * queues changed.
5848 */
5849 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5850 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5851 vsi->num_queue_pairs);
5852 ret = i40e_vsi_config_rss(vsi);
5853 if (ret) {
5854 dev_info(&vsi->back->pdev->dev,
5855 "Failed to reconfig rss for num_queues\n");
5856 return ret;
5857 }
5858 vsi->reconfig_rss = false;
5859 }
5860 if (test_bit(I40E_FLAG_IWARP_ENA, vsi->back->flags)) {
5861 ctxt.info.valid_sections |=
5862 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5863 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5864 }
5865
5866 /* Update the VSI after updating the VSI queue-mapping
5867 * information
5868 */
5869 ret = i40e_aq_update_vsi_params(hw, vsi_ctx: &ctxt, NULL);
5870 if (ret) {
5871 dev_info(&pf->pdev->dev,
5872 "Update vsi tc config failed, err %pe aq_err %s\n",
5873 ERR_PTR(ret),
5874 libie_aq_str(hw->aq.asq_last_status));
5875 goto out;
5876 }
5877 /* update the local VSI info with updated queue map */
5878 i40e_vsi_update_queue_map(vsi, ctxt: &ctxt);
5879 vsi->info.valid_sections = 0;
5880
5881 /* Update current VSI BW information */
5882 ret = i40e_vsi_get_bw_info(vsi);
5883 if (ret) {
5884 dev_info(&pf->pdev->dev,
5885 "Failed updating vsi bw info, err %pe aq_err %s\n",
5886 ERR_PTR(ret),
5887 libie_aq_str(hw->aq.asq_last_status));
5888 goto out;
5889 }
5890
5891 /* Update the netdev TC setup */
5892 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5893out:
5894 return ret;
5895}
5896
5897/**
5898 * i40e_vsi_reconfig_tc - Reconfigure VSI Tx Scheduler for stored TC map
5899 * @vsi: VSI to be reconfigured
5900 *
5901 * This reconfigures a particular VSI for TCs that are mapped to the
5902 * TC bitmap stored previously for the VSI.
5903 *
5904 * Context: It is expected that the VSI queues have been quisced before
5905 * calling this function.
5906 *
5907 * Return: 0 on success, negative value on failure
5908 **/
5909static int i40e_vsi_reconfig_tc(struct i40e_vsi *vsi)
5910{
5911 u8 enabled_tc;
5912
5913 enabled_tc = vsi->tc_config.enabled_tc;
5914 vsi->tc_config.enabled_tc = 0;
5915
5916 return i40e_vsi_config_tc(vsi, enabled_tc);
5917}
5918
5919/**
5920 * i40e_get_link_speed - Returns link speed for the interface
5921 * @vsi: VSI to be configured
5922 *
5923 **/
5924static int i40e_get_link_speed(struct i40e_vsi *vsi)
5925{
5926 struct i40e_pf *pf = vsi->back;
5927
5928 switch (pf->hw.phy.link_info.link_speed) {
5929 case I40E_LINK_SPEED_40GB:
5930 return 40000;
5931 case I40E_LINK_SPEED_25GB:
5932 return 25000;
5933 case I40E_LINK_SPEED_20GB:
5934 return 20000;
5935 case I40E_LINK_SPEED_10GB:
5936 return 10000;
5937 case I40E_LINK_SPEED_1GB:
5938 return 1000;
5939 default:
5940 return -EINVAL;
5941 }
5942}
5943
5944/**
5945 * i40e_bw_bytes_to_mbits - Convert max_tx_rate from bytes to mbits
5946 * @vsi: Pointer to vsi structure
5947 * @max_tx_rate: max TX rate in bytes to be converted into Mbits
5948 *
5949 * Helper function to convert units before send to set BW limit
5950 **/
5951static u64 i40e_bw_bytes_to_mbits(struct i40e_vsi *vsi, u64 max_tx_rate)
5952{
5953 if (max_tx_rate < I40E_BW_MBPS_DIVISOR) {
5954 dev_warn(&vsi->back->pdev->dev,
5955 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5956 max_tx_rate = I40E_BW_CREDIT_DIVISOR;
5957 } else {
5958 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
5959 }
5960
5961 return max_tx_rate;
5962}
5963
5964/**
5965 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5966 * @vsi: VSI to be configured
5967 * @seid: seid of the channel/VSI
5968 * @max_tx_rate: max TX rate to be configured as BW limit
5969 *
5970 * Helper function to set BW limit for a given VSI
5971 **/
5972int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5973{
5974 struct i40e_pf *pf = vsi->back;
5975 u64 credits = 0;
5976 int speed = 0;
5977 int ret = 0;
5978
5979 speed = i40e_get_link_speed(vsi);
5980 if (max_tx_rate > speed) {
5981 dev_err(&pf->pdev->dev,
5982 "Invalid max tx rate %llu specified for VSI seid %d.",
5983 max_tx_rate, seid);
5984 return -EINVAL;
5985 }
5986 if (max_tx_rate && max_tx_rate < I40E_BW_CREDIT_DIVISOR) {
5987 dev_warn(&pf->pdev->dev,
5988 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5989 max_tx_rate = I40E_BW_CREDIT_DIVISOR;
5990 }
5991
5992 /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5993 credits = max_tx_rate;
5994 do_div(credits, I40E_BW_CREDIT_DIVISOR);
5995 ret = i40e_aq_config_vsi_bw_limit(hw: &pf->hw, seid, credit: credits,
5996 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5997 if (ret)
5998 dev_err(&pf->pdev->dev,
5999 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %pe aq_err %s\n",
6000 max_tx_rate, seid, ERR_PTR(ret),
6001 libie_aq_str(pf->hw.aq.asq_last_status));
6002 return ret;
6003}
6004
6005/**
6006 * i40e_remove_queue_channels - Remove queue channels for the TCs
6007 * @vsi: VSI to be configured
6008 *
6009 * Remove queue channels for the TCs
6010 **/
6011static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
6012{
6013 struct i40e_cloud_filter *cfilter;
6014 enum libie_aq_err last_aq_status;
6015 struct i40e_channel *ch, *ch_tmp;
6016 struct i40e_pf *pf = vsi->back;
6017 struct hlist_node *node;
6018 int ret, i;
6019
6020 /* Reset rss size that was stored when reconfiguring rss for
6021 * channel VSIs with non-power-of-2 queue count.
6022 */
6023 vsi->current_rss_size = 0;
6024
6025 /* perform cleanup for channels if they exist */
6026 if (list_empty(head: &vsi->ch_list))
6027 return;
6028
6029 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
6030 struct i40e_vsi *p_vsi;
6031
6032 list_del(entry: &ch->list);
6033 p_vsi = ch->parent_vsi;
6034 if (!p_vsi || !ch->initialized) {
6035 kfree(objp: ch);
6036 continue;
6037 }
6038 /* Reset queue contexts */
6039 for (i = 0; i < ch->num_queue_pairs; i++) {
6040 struct i40e_ring *tx_ring, *rx_ring;
6041 u16 pf_q;
6042
6043 pf_q = ch->base_queue + i;
6044 tx_ring = vsi->tx_rings[pf_q];
6045 tx_ring->ch = NULL;
6046
6047 rx_ring = vsi->rx_rings[pf_q];
6048 rx_ring->ch = NULL;
6049 }
6050
6051 /* Reset BW configured for this VSI via mqprio */
6052 ret = i40e_set_bw_limit(vsi, seid: ch->seid, max_tx_rate: 0);
6053 if (ret)
6054 dev_info(&vsi->back->pdev->dev,
6055 "Failed to reset tx rate for ch->seid %u\n",
6056 ch->seid);
6057
6058 /* delete cloud filters associated with this channel */
6059 hlist_for_each_entry_safe(cfilter, node,
6060 &pf->cloud_filter_list, cloud_node) {
6061 if (cfilter->seid != ch->seid)
6062 continue;
6063
6064 hash_del(node: &cfilter->cloud_node);
6065 if (cfilter->dst_port)
6066 ret = i40e_add_del_cloud_filter_big_buf(vsi,
6067 filter: cfilter,
6068 add: false);
6069 else
6070 ret = i40e_add_del_cloud_filter(vsi, filter: cfilter,
6071 add: false);
6072 last_aq_status = pf->hw.aq.asq_last_status;
6073 if (ret)
6074 dev_info(&pf->pdev->dev,
6075 "Failed to delete cloud filter, err %pe aq_err %s\n",
6076 ERR_PTR(ret),
6077 libie_aq_str(last_aq_status));
6078 kfree(objp: cfilter);
6079 }
6080
6081 /* delete VSI from FW */
6082 ret = i40e_aq_delete_element(hw: &vsi->back->hw, seid: ch->seid,
6083 NULL);
6084 if (ret)
6085 dev_err(&vsi->back->pdev->dev,
6086 "unable to remove channel (%d) for parent VSI(%d)\n",
6087 ch->seid, p_vsi->seid);
6088 kfree(objp: ch);
6089 }
6090 INIT_LIST_HEAD(list: &vsi->ch_list);
6091}
6092
6093/**
6094 * i40e_get_max_queues_for_channel
6095 * @vsi: ptr to VSI to which channels are associated with
6096 *
6097 * Helper function which returns max value among the queue counts set on the
6098 * channels/TCs created.
6099 **/
6100static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
6101{
6102 struct i40e_channel *ch, *ch_tmp;
6103 int max = 0;
6104
6105 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
6106 if (!ch->initialized)
6107 continue;
6108 if (ch->num_queue_pairs > max)
6109 max = ch->num_queue_pairs;
6110 }
6111
6112 return max;
6113}
6114
6115/**
6116 * i40e_validate_num_queues - validate num_queues w.r.t channel
6117 * @pf: ptr to PF device
6118 * @num_queues: number of queues
6119 * @vsi: the parent VSI
6120 * @reconfig_rss: indicates should the RSS be reconfigured or not
6121 *
6122 * This function validates number of queues in the context of new channel
6123 * which is being established and determines if RSS should be reconfigured
6124 * or not for parent VSI.
6125 **/
6126static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
6127 struct i40e_vsi *vsi, bool *reconfig_rss)
6128{
6129 int max_ch_queues;
6130
6131 if (!reconfig_rss)
6132 return -EINVAL;
6133
6134 *reconfig_rss = false;
6135 if (vsi->current_rss_size) {
6136 if (num_queues > vsi->current_rss_size) {
6137 dev_dbg(&pf->pdev->dev,
6138 "Error: num_queues (%d) > vsi's current_size(%d)\n",
6139 num_queues, vsi->current_rss_size);
6140 return -EINVAL;
6141 } else if ((num_queues < vsi->current_rss_size) &&
6142 (!is_power_of_2(n: num_queues))) {
6143 dev_dbg(&pf->pdev->dev,
6144 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
6145 num_queues, vsi->current_rss_size);
6146 return -EINVAL;
6147 }
6148 }
6149
6150 if (!is_power_of_2(n: num_queues)) {
6151 /* Find the max num_queues configured for channel if channel
6152 * exist.
6153 * if channel exist, then enforce 'num_queues' to be more than
6154 * max ever queues configured for channel.
6155 */
6156 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
6157 if (num_queues < max_ch_queues) {
6158 dev_dbg(&pf->pdev->dev,
6159 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
6160 num_queues, max_ch_queues);
6161 return -EINVAL;
6162 }
6163 *reconfig_rss = true;
6164 }
6165
6166 return 0;
6167}
6168
6169/**
6170 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
6171 * @vsi: the VSI being setup
6172 * @rss_size: size of RSS, accordingly LUT gets reprogrammed
6173 *
6174 * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
6175 **/
6176static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
6177{
6178 struct i40e_pf *pf = vsi->back;
6179 u8 seed[I40E_HKEY_ARRAY_SIZE];
6180 struct i40e_hw *hw = &pf->hw;
6181 int local_rss_size;
6182 u8 *lut;
6183 int ret;
6184
6185 if (!vsi->rss_size)
6186 return -EINVAL;
6187
6188 if (rss_size > vsi->rss_size)
6189 return -EINVAL;
6190
6191 local_rss_size = min_t(int, vsi->rss_size, rss_size);
6192 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
6193 if (!lut)
6194 return -ENOMEM;
6195
6196 /* Ignoring user configured lut if there is one */
6197 i40e_fill_rss_lut(pf, lut, rss_table_size: vsi->rss_table_size, rss_size: local_rss_size);
6198
6199 /* Use user configured hash key if there is one, otherwise
6200 * use default.
6201 */
6202 if (vsi->rss_hkey_user)
6203 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
6204 else
6205 netdev_rss_key_fill(buffer: (void *)seed, I40E_HKEY_ARRAY_SIZE);
6206
6207 ret = i40e_config_rss(vsi, seed, lut, lut_size: vsi->rss_table_size);
6208 if (ret) {
6209 dev_info(&pf->pdev->dev,
6210 "Cannot set RSS lut, err %pe aq_err %s\n",
6211 ERR_PTR(ret),
6212 libie_aq_str(hw->aq.asq_last_status));
6213 kfree(objp: lut);
6214 return ret;
6215 }
6216 kfree(objp: lut);
6217
6218 /* Do the update w.r.t. storing rss_size */
6219 if (!vsi->orig_rss_size)
6220 vsi->orig_rss_size = vsi->rss_size;
6221 vsi->current_rss_size = local_rss_size;
6222
6223 return ret;
6224}
6225
6226/**
6227 * i40e_channel_setup_queue_map - Setup a channel queue map
6228 * @pf: ptr to PF device
6229 * @ctxt: VSI context structure
6230 * @ch: ptr to channel structure
6231 *
6232 * Setup queue map for a specific channel
6233 **/
6234static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
6235 struct i40e_vsi_context *ctxt,
6236 struct i40e_channel *ch)
6237{
6238 u16 qcount, qmap, sections = 0;
6239 u8 offset = 0;
6240 int pow;
6241
6242 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
6243 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
6244
6245 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
6246 ch->num_queue_pairs = qcount;
6247
6248 /* find the next higher power-of-2 of num queue pairs */
6249 pow = ilog2(qcount);
6250 if (!is_power_of_2(n: qcount))
6251 pow++;
6252
6253 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
6254 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
6255
6256 /* Setup queue TC[0].qmap for given VSI context */
6257 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
6258
6259 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
6260 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
6261 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
6262 ctxt->info.valid_sections |= cpu_to_le16(sections);
6263}
6264
6265/**
6266 * i40e_add_channel - add a channel by adding VSI
6267 * @pf: ptr to PF device
6268 * @uplink_seid: underlying HW switching element (VEB) ID
6269 * @ch: ptr to channel structure
6270 *
6271 * Add a channel (VSI) using add_vsi and queue_map
6272 **/
6273static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
6274 struct i40e_channel *ch)
6275{
6276 struct i40e_hw *hw = &pf->hw;
6277 struct i40e_vsi_context ctxt;
6278 u8 enabled_tc = 0x1; /* TC0 enabled */
6279 int ret;
6280
6281 if (ch->type != I40E_VSI_VMDQ2) {
6282 dev_info(&pf->pdev->dev,
6283 "add new vsi failed, ch->type %d\n", ch->type);
6284 return -EINVAL;
6285 }
6286
6287 memset(&ctxt, 0, sizeof(ctxt));
6288 ctxt.pf_num = hw->pf_id;
6289 ctxt.vf_num = 0;
6290 ctxt.uplink_seid = uplink_seid;
6291 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
6292 if (ch->type == I40E_VSI_VMDQ2)
6293 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6294
6295 if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
6296 ctxt.info.valid_sections |=
6297 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6298 ctxt.info.switch_id =
6299 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6300 }
6301
6302 /* Set queue map for a given VSI context */
6303 i40e_channel_setup_queue_map(pf, ctxt: &ctxt, ch);
6304
6305 /* Now time to create VSI */
6306 ret = i40e_aq_add_vsi(hw, vsi_ctx: &ctxt, NULL);
6307 if (ret) {
6308 dev_info(&pf->pdev->dev,
6309 "add new vsi failed, err %pe aq_err %s\n",
6310 ERR_PTR(ret),
6311 libie_aq_str(pf->hw.aq.asq_last_status));
6312 return -ENOENT;
6313 }
6314
6315 /* Success, update channel, set enabled_tc only if the channel
6316 * is not a macvlan
6317 */
6318 ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
6319 ch->seid = ctxt.seid;
6320 ch->vsi_number = ctxt.vsi_number;
6321 ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
6322
6323 /* copy just the sections touched not the entire info
6324 * since not all sections are valid as returned by
6325 * update vsi params
6326 */
6327 ch->info.mapping_flags = ctxt.info.mapping_flags;
6328 memcpy(&ch->info.queue_mapping,
6329 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
6330 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
6331 sizeof(ctxt.info.tc_mapping));
6332
6333 return 0;
6334}
6335
6336static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
6337 u8 *bw_share)
6338{
6339 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
6340 int ret;
6341 int i;
6342
6343 memset(&bw_data, 0, sizeof(bw_data));
6344 bw_data.tc_valid_bits = ch->enabled_tc;
6345 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6346 bw_data.tc_bw_credits[i] = bw_share[i];
6347
6348 ret = i40e_aq_config_vsi_tc_bw(hw: &vsi->back->hw, seid: ch->seid,
6349 bw_data: &bw_data, NULL);
6350 if (ret) {
6351 dev_info(&vsi->back->pdev->dev,
6352 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
6353 vsi->back->hw.aq.asq_last_status, ch->seid);
6354 return -EINVAL;
6355 }
6356
6357 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6358 ch->info.qs_handle[i] = bw_data.qs_handles[i];
6359
6360 return 0;
6361}
6362
6363/**
6364 * i40e_channel_config_tx_ring - config TX ring associated with new channel
6365 * @pf: ptr to PF device
6366 * @vsi: the VSI being setup
6367 * @ch: ptr to channel structure
6368 *
6369 * Configure TX rings associated with channel (VSI) since queues are being
6370 * from parent VSI.
6371 **/
6372static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6373 struct i40e_vsi *vsi,
6374 struct i40e_channel *ch)
6375{
6376 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
6377 int ret;
6378 int i;
6379
6380 /* Enable ETS TCs with equal BW Share for now across all VSIs */
6381 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6382 if (ch->enabled_tc & BIT(i))
6383 bw_share[i] = 1;
6384 }
6385
6386 /* configure BW for new VSI */
6387 ret = i40e_channel_config_bw(vsi, ch, bw_share);
6388 if (ret) {
6389 dev_info(&vsi->back->pdev->dev,
6390 "Failed configuring TC map %d for channel (seid %u)\n",
6391 ch->enabled_tc, ch->seid);
6392 return ret;
6393 }
6394
6395 for (i = 0; i < ch->num_queue_pairs; i++) {
6396 struct i40e_ring *tx_ring, *rx_ring;
6397 u16 pf_q;
6398
6399 pf_q = ch->base_queue + i;
6400
6401 /* Get to TX ring ptr of main VSI, for re-setup TX queue
6402 * context
6403 */
6404 tx_ring = vsi->tx_rings[pf_q];
6405 tx_ring->ch = ch;
6406
6407 /* Get the RX ring ptr */
6408 rx_ring = vsi->rx_rings[pf_q];
6409 rx_ring->ch = ch;
6410 }
6411
6412 return 0;
6413}
6414
6415/**
6416 * i40e_setup_hw_channel - setup new channel
6417 * @pf: ptr to PF device
6418 * @vsi: the VSI being setup
6419 * @ch: ptr to channel structure
6420 * @uplink_seid: underlying HW switching element (VEB) ID
6421 * @type: type of channel to be created (VMDq2/VF)
6422 *
6423 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6424 * and configures TX rings accordingly
6425 **/
6426static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6427 struct i40e_vsi *vsi,
6428 struct i40e_channel *ch,
6429 u16 uplink_seid, u8 type)
6430{
6431 int ret;
6432
6433 ch->initialized = false;
6434 ch->base_queue = vsi->next_base_queue;
6435 ch->type = type;
6436
6437 /* Proceed with creation of channel (VMDq2) VSI */
6438 ret = i40e_add_channel(pf, uplink_seid, ch);
6439 if (ret) {
6440 dev_info(&pf->pdev->dev,
6441 "failed to add_channel using uplink_seid %u\n",
6442 uplink_seid);
6443 return ret;
6444 }
6445
6446 /* Mark the successful creation of channel */
6447 ch->initialized = true;
6448
6449 /* Reconfigure TX queues using QTX_CTL register */
6450 ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6451 if (ret) {
6452 dev_info(&pf->pdev->dev,
6453 "failed to configure TX rings for channel %u\n",
6454 ch->seid);
6455 return ret;
6456 }
6457
6458 /* update 'next_base_queue' */
6459 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6460 dev_dbg(&pf->pdev->dev,
6461 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6462 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6463 ch->num_queue_pairs,
6464 vsi->next_base_queue);
6465 return ret;
6466}
6467
6468/**
6469 * i40e_setup_channel - setup new channel using uplink element
6470 * @pf: ptr to PF device
6471 * @vsi: pointer to the VSI to set up the channel within
6472 * @ch: ptr to channel structure
6473 *
6474 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6475 * and uplink switching element (uplink_seid)
6476 **/
6477static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6478 struct i40e_channel *ch)
6479{
6480 struct i40e_vsi *main_vsi;
6481 u8 vsi_type;
6482 u16 seid;
6483 int ret;
6484
6485 if (vsi->type == I40E_VSI_MAIN) {
6486 vsi_type = I40E_VSI_VMDQ2;
6487 } else {
6488 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6489 vsi->type);
6490 return false;
6491 }
6492
6493 /* underlying switching element */
6494 main_vsi = i40e_pf_get_main_vsi(pf);
6495 seid = main_vsi->uplink_seid;
6496
6497 /* create channel (VSI), configure TX rings */
6498 ret = i40e_setup_hw_channel(pf, vsi, ch, uplink_seid: seid, type: vsi_type);
6499 if (ret) {
6500 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6501 return false;
6502 }
6503
6504 return ch->initialized ? true : false;
6505}
6506
6507/**
6508 * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6509 * @vsi: ptr to VSI which has PF backing
6510 *
6511 * Sets up switch mode correctly if it needs to be changed and perform
6512 * what are allowed modes.
6513 **/
6514static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6515{
6516 u8 mode;
6517 struct i40e_pf *pf = vsi->back;
6518 struct i40e_hw *hw = &pf->hw;
6519 int ret;
6520
6521 ret = i40e_get_capabilities(pf, list_type: i40e_aqc_opc_list_dev_capabilities);
6522 if (ret)
6523 return -EINVAL;
6524
6525 if (hw->dev_caps.switch_mode) {
6526 /* if switch mode is set, support mode2 (non-tunneled for
6527 * cloud filter) for now
6528 */
6529 u32 switch_mode = hw->dev_caps.switch_mode &
6530 I40E_SWITCH_MODE_MASK;
6531 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6532 if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6533 return 0;
6534 dev_err(&pf->pdev->dev,
6535 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6536 hw->dev_caps.switch_mode);
6537 return -EINVAL;
6538 }
6539 }
6540
6541 /* Set Bit 7 to be valid */
6542 mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6543
6544 /* Set L4type for TCP support */
6545 mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6546
6547 /* Set cloud filter mode */
6548 mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6549
6550 /* Prep mode field for set_switch_config */
6551 ret = i40e_aq_set_switch_config(hw, flags: pf->last_sw_conf_flags,
6552 valid_flags: pf->last_sw_conf_valid_flags,
6553 mode, NULL);
6554 if (ret && hw->aq.asq_last_status != LIBIE_AQ_RC_ESRCH)
6555 dev_err(&pf->pdev->dev,
6556 "couldn't set switch config bits, err %pe aq_err %s\n",
6557 ERR_PTR(ret), libie_aq_str(hw->aq.asq_last_status));
6558
6559 return ret;
6560}
6561
6562/**
6563 * i40e_create_queue_channel - function to create channel
6564 * @vsi: VSI to be configured
6565 * @ch: ptr to channel (it contains channel specific params)
6566 *
6567 * This function creates channel (VSI) using num_queues specified by user,
6568 * reconfigs RSS if needed.
6569 **/
6570int i40e_create_queue_channel(struct i40e_vsi *vsi,
6571 struct i40e_channel *ch)
6572{
6573 struct i40e_pf *pf = vsi->back;
6574 bool reconfig_rss;
6575 int err;
6576
6577 if (!ch)
6578 return -EINVAL;
6579
6580 if (!ch->num_queue_pairs) {
6581 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6582 ch->num_queue_pairs);
6583 return -EINVAL;
6584 }
6585
6586 /* validate user requested num_queues for channel */
6587 err = i40e_validate_num_queues(pf, num_queues: ch->num_queue_pairs, vsi,
6588 reconfig_rss: &reconfig_rss);
6589 if (err) {
6590 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6591 ch->num_queue_pairs);
6592 return -EINVAL;
6593 }
6594
6595 /* By default we are in VEPA mode, if this is the first VF/VMDq
6596 * VSI to be added switch to VEB mode.
6597 */
6598
6599 if (!test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
6600 set_bit(nr: I40E_FLAG_VEB_MODE_ENA, addr: pf->flags);
6601
6602 if (vsi->type == I40E_VSI_MAIN) {
6603 if (i40e_is_tc_mqprio_enabled(pf))
6604 i40e_do_reset(pf, I40E_PF_RESET_FLAG, lock_acquired: true);
6605 else
6606 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
6607 }
6608 /* now onwards for main VSI, number of queues will be value
6609 * of TC0's queue count
6610 */
6611 }
6612
6613 /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6614 * it should be more than num_queues
6615 */
6616 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6617 dev_dbg(&pf->pdev->dev,
6618 "Error: cnt_q_avail (%u) less than num_queues %d\n",
6619 vsi->cnt_q_avail, ch->num_queue_pairs);
6620 return -EINVAL;
6621 }
6622
6623 /* reconfig_rss only if vsi type is MAIN_VSI */
6624 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6625 err = i40e_vsi_reconfig_rss(vsi, rss_size: ch->num_queue_pairs);
6626 if (err) {
6627 dev_info(&pf->pdev->dev,
6628 "Error: unable to reconfig rss for num_queues (%u)\n",
6629 ch->num_queue_pairs);
6630 return -EINVAL;
6631 }
6632 }
6633
6634 if (!i40e_setup_channel(pf, vsi, ch)) {
6635 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6636 return -EINVAL;
6637 }
6638
6639 dev_info(&pf->pdev->dev,
6640 "Setup channel (id:%u) utilizing num_queues %d\n",
6641 ch->seid, ch->num_queue_pairs);
6642
6643 /* configure VSI for BW limit */
6644 if (ch->max_tx_rate) {
6645 u64 credits = ch->max_tx_rate;
6646
6647 if (i40e_set_bw_limit(vsi, seid: ch->seid, max_tx_rate: ch->max_tx_rate))
6648 return -EINVAL;
6649
6650 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6651 dev_dbg(&pf->pdev->dev,
6652 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6653 ch->max_tx_rate,
6654 credits,
6655 ch->seid);
6656 }
6657
6658 /* in case of VF, this will be main SRIOV VSI */
6659 ch->parent_vsi = vsi;
6660
6661 /* and update main_vsi's count for queue_available to use */
6662 vsi->cnt_q_avail -= ch->num_queue_pairs;
6663
6664 return 0;
6665}
6666
6667/**
6668 * i40e_configure_queue_channels - Add queue channel for the given TCs
6669 * @vsi: VSI to be configured
6670 *
6671 * Configures queue channel mapping to the given TCs
6672 **/
6673static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6674{
6675 struct i40e_channel *ch;
6676 u64 max_rate = 0;
6677 int ret = 0, i;
6678
6679 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6680 vsi->tc_seid_map[0] = vsi->seid;
6681 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6682 if (vsi->tc_config.enabled_tc & BIT(i)) {
6683 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6684 if (!ch) {
6685 ret = -ENOMEM;
6686 goto err_free;
6687 }
6688
6689 INIT_LIST_HEAD(list: &ch->list);
6690 ch->num_queue_pairs =
6691 vsi->tc_config.tc_info[i].qcount;
6692 ch->base_queue =
6693 vsi->tc_config.tc_info[i].qoffset;
6694
6695 /* Bandwidth limit through tc interface is in bytes/s,
6696 * change to Mbit/s
6697 */
6698 max_rate = vsi->mqprio_qopt.max_rate[i];
6699 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6700 ch->max_tx_rate = max_rate;
6701
6702 list_add_tail(new: &ch->list, head: &vsi->ch_list);
6703
6704 ret = i40e_create_queue_channel(vsi, ch);
6705 if (ret) {
6706 dev_err(&vsi->back->pdev->dev,
6707 "Failed creating queue channel with TC%d: queues %d\n",
6708 i, ch->num_queue_pairs);
6709 goto err_free;
6710 }
6711 vsi->tc_seid_map[i] = ch->seid;
6712 }
6713 }
6714
6715 /* reset to reconfigure TX queue contexts */
6716 i40e_do_reset(pf: vsi->back, I40E_PF_RESET_FLAG, lock_acquired: true);
6717 return ret;
6718
6719err_free:
6720 i40e_remove_queue_channels(vsi);
6721 return ret;
6722}
6723
6724/**
6725 * i40e_veb_config_tc - Configure TCs for given VEB
6726 * @veb: given VEB
6727 * @enabled_tc: TC bitmap
6728 *
6729 * Configures given TC bitmap for VEB (switching) element
6730 **/
6731int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6732{
6733 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6734 struct i40e_pf *pf = veb->pf;
6735 int ret = 0;
6736 int i;
6737
6738 /* No TCs or already enabled TCs just return */
6739 if (!enabled_tc || veb->enabled_tc == enabled_tc)
6740 return ret;
6741
6742 bw_data.tc_valid_bits = enabled_tc;
6743 /* bw_data.absolute_credits is not set (relative) */
6744
6745 /* Enable ETS TCs with equal BW Share for now */
6746 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6747 if (enabled_tc & BIT(i))
6748 bw_data.tc_bw_share_credits[i] = 1;
6749 }
6750
6751 ret = i40e_aq_config_switch_comp_bw_config(hw: &pf->hw, seid: veb->seid,
6752 bw_data: &bw_data, NULL);
6753 if (ret) {
6754 dev_info(&pf->pdev->dev,
6755 "VEB bw config failed, err %pe aq_err %s\n",
6756 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
6757 goto out;
6758 }
6759
6760 /* Update the BW information */
6761 ret = i40e_veb_get_bw_info(veb);
6762 if (ret) {
6763 dev_info(&pf->pdev->dev,
6764 "Failed getting veb bw config, err %pe aq_err %s\n",
6765 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
6766 }
6767
6768out:
6769 return ret;
6770}
6771
6772#ifdef CONFIG_I40E_DCB
6773/**
6774 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6775 * @pf: PF struct
6776 *
6777 * Reconfigure VEB/VSIs on a given PF; it is assumed that
6778 * the caller would've quiesce all the VSIs before calling
6779 * this function
6780 **/
6781static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6782{
6783 struct i40e_vsi *vsi;
6784 struct i40e_veb *veb;
6785 u8 tc_map = 0;
6786 int ret;
6787 int v;
6788
6789 /* Enable the TCs available on PF to all VEBs */
6790 tc_map = i40e_pf_get_tc_map(pf);
6791 if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS)
6792 return;
6793
6794 i40e_pf_for_each_veb(pf, v, veb) {
6795 ret = i40e_veb_config_tc(veb, enabled_tc: tc_map);
6796 if (ret) {
6797 dev_info(&pf->pdev->dev,
6798 "Failed configuring TC for VEB seid=%d\n",
6799 veb->seid);
6800 /* Will try to configure as many components */
6801 }
6802 }
6803
6804 /* Update each VSI */
6805 i40e_pf_for_each_vsi(pf, v, vsi) {
6806 /* - Enable all TCs for the LAN VSI
6807 * - For all others keep them at TC0 for now
6808 */
6809 if (vsi->type == I40E_VSI_MAIN)
6810 tc_map = i40e_pf_get_tc_map(pf);
6811 else
6812 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6813
6814 ret = i40e_vsi_config_tc(vsi, enabled_tc: tc_map);
6815 if (ret) {
6816 dev_info(&pf->pdev->dev,
6817 "Failed configuring TC for VSI seid=%d\n",
6818 vsi->seid);
6819 /* Will try to configure as many components */
6820 } else {
6821 /* Re-configure VSI vectors based on updated TC map */
6822 i40e_vsi_map_rings_to_vectors(vsi);
6823 if (vsi->netdev)
6824 i40e_dcbnl_set_all(vsi);
6825 }
6826 }
6827}
6828
6829/**
6830 * i40e_resume_port_tx - Resume port Tx
6831 * @pf: PF struct
6832 *
6833 * Resume a port's Tx and issue a PF reset in case of failure to
6834 * resume.
6835 **/
6836static int i40e_resume_port_tx(struct i40e_pf *pf)
6837{
6838 struct i40e_hw *hw = &pf->hw;
6839 int ret;
6840
6841 ret = i40e_aq_resume_port_tx(hw, NULL);
6842 if (ret) {
6843 dev_info(&pf->pdev->dev,
6844 "Resume Port Tx failed, err %pe aq_err %s\n",
6845 ERR_PTR(ret),
6846 libie_aq_str(pf->hw.aq.asq_last_status));
6847 /* Schedule PF reset to recover */
6848 set_bit(nr: __I40E_PF_RESET_REQUESTED, addr: pf->state);
6849 i40e_service_event_schedule(pf);
6850 }
6851
6852 return ret;
6853}
6854
6855/**
6856 * i40e_suspend_port_tx - Suspend port Tx
6857 * @pf: PF struct
6858 *
6859 * Suspend a port's Tx and issue a PF reset in case of failure.
6860 **/
6861static int i40e_suspend_port_tx(struct i40e_pf *pf)
6862{
6863 struct i40e_hw *hw = &pf->hw;
6864 int ret;
6865
6866 ret = i40e_aq_suspend_port_tx(hw, seid: pf->mac_seid, NULL);
6867 if (ret) {
6868 dev_info(&pf->pdev->dev,
6869 "Suspend Port Tx failed, err %pe aq_err %s\n",
6870 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
6871 /* Schedule PF reset to recover */
6872 set_bit(nr: __I40E_PF_RESET_REQUESTED, addr: pf->state);
6873 i40e_service_event_schedule(pf);
6874 }
6875
6876 return ret;
6877}
6878
6879/**
6880 * i40e_hw_set_dcb_config - Program new DCBX settings into HW
6881 * @pf: PF being configured
6882 * @new_cfg: New DCBX configuration
6883 *
6884 * Program DCB settings into HW and reconfigure VEB/VSIs on
6885 * given PF. Uses "Set LLDP MIB" AQC to program the hardware.
6886 **/
6887static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6888 struct i40e_dcbx_config *new_cfg)
6889{
6890 struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6891 int ret;
6892
6893 /* Check if need reconfiguration */
6894 if (!memcmp(p: &new_cfg, q: &old_cfg, size: sizeof(new_cfg))) {
6895 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6896 return 0;
6897 }
6898
6899 /* Config change disable all VSIs */
6900 i40e_pf_quiesce_all_vsi(pf);
6901
6902 /* Copy the new config to the current config */
6903 *old_cfg = *new_cfg;
6904 old_cfg->etsrec = old_cfg->etscfg;
6905 ret = i40e_set_dcb_config(hw: &pf->hw);
6906 if (ret) {
6907 dev_info(&pf->pdev->dev,
6908 "Set DCB Config failed, err %pe aq_err %s\n",
6909 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
6910 goto out;
6911 }
6912
6913 /* Changes in configuration update VEB/VSI */
6914 i40e_dcb_reconfigure(pf);
6915out:
6916 /* In case of reset do not try to resume anything */
6917 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6918 /* Re-start the VSIs if disabled */
6919 ret = i40e_resume_port_tx(pf);
6920 /* In case of error no point in resuming VSIs */
6921 if (ret)
6922 goto err;
6923 i40e_pf_unquiesce_all_vsi(pf);
6924 }
6925err:
6926 return ret;
6927}
6928
6929/**
6930 * i40e_hw_dcb_config - Program new DCBX settings into HW
6931 * @pf: PF being configured
6932 * @new_cfg: New DCBX configuration
6933 *
6934 * Program DCB settings into HW and reconfigure VEB/VSIs on
6935 * given PF
6936 **/
6937int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6938{
6939 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6940 u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
6941 u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
6942 struct i40e_dcbx_config *old_cfg;
6943 u8 mode[I40E_MAX_TRAFFIC_CLASS];
6944 struct i40e_rx_pb_config pb_cfg;
6945 struct i40e_hw *hw = &pf->hw;
6946 u8 num_ports = hw->num_ports;
6947 bool need_reconfig;
6948 int ret = -EINVAL;
6949 u8 lltc_map = 0;
6950 u8 tc_map = 0;
6951 u8 new_numtc;
6952 u8 i;
6953
6954 dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
6955 /* Un-pack information to Program ETS HW via shared API
6956 * numtc, tcmap
6957 * LLTC map
6958 * ETS/NON-ETS arbiter mode
6959 * max exponent (credit refills)
6960 * Total number of ports
6961 * PFC priority bit-map
6962 * Priority Table
6963 * BW % per TC
6964 * Arbiter mode between UPs sharing same TC
6965 * TSA table (ETS or non-ETS)
6966 * EEE enabled or not
6967 * MFS TC table
6968 */
6969
6970 new_numtc = i40e_dcb_get_num_tc(dcbcfg: new_cfg);
6971
6972 memset(&ets_data, 0, sizeof(ets_data));
6973 for (i = 0; i < new_numtc; i++) {
6974 tc_map |= BIT(i);
6975 switch (new_cfg->etscfg.tsatable[i]) {
6976 case I40E_IEEE_TSA_ETS:
6977 prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
6978 ets_data.tc_bw_share_credits[i] =
6979 new_cfg->etscfg.tcbwtable[i];
6980 break;
6981 case I40E_IEEE_TSA_STRICT:
6982 prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
6983 lltc_map |= BIT(i);
6984 ets_data.tc_bw_share_credits[i] =
6985 I40E_DCB_STRICT_PRIO_CREDITS;
6986 break;
6987 default:
6988 /* Invalid TSA type */
6989 need_reconfig = false;
6990 goto out;
6991 }
6992 }
6993
6994 old_cfg = &hw->local_dcbx_config;
6995 /* Check if need reconfiguration */
6996 need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
6997
6998 /* If needed, enable/disable frame tagging, disable all VSIs
6999 * and suspend port tx
7000 */
7001 if (need_reconfig) {
7002 /* Enable DCB tagging only when more than one TC */
7003 if (new_numtc > 1)
7004 set_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
7005 else
7006 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
7007
7008 set_bit(nr: __I40E_PORT_SUSPENDED, addr: pf->state);
7009 /* Reconfiguration needed quiesce all VSIs */
7010 i40e_pf_quiesce_all_vsi(pf);
7011 ret = i40e_suspend_port_tx(pf);
7012 if (ret)
7013 goto err;
7014 }
7015
7016 /* Configure Port ETS Tx Scheduler */
7017 ets_data.tc_valid_bits = tc_map;
7018 ets_data.tc_strict_priority_flags = lltc_map;
7019 ret = i40e_aq_config_switch_comp_ets
7020 (hw, seid: pf->mac_seid, ets_data: &ets_data,
7021 opcode: i40e_aqc_opc_modify_switching_comp_ets, NULL);
7022 if (ret) {
7023 dev_info(&pf->pdev->dev,
7024 "Modify Port ETS failed, err %pe aq_err %s\n",
7025 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
7026 goto out;
7027 }
7028
7029 /* Configure Rx ETS HW */
7030 memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
7031 i40e_dcb_hw_set_num_tc(hw, num_tc: new_numtc);
7032 i40e_dcb_hw_rx_fifo_config(hw, ets_mode: I40E_DCB_ARB_MODE_ROUND_ROBIN,
7033 non_ets_mode: I40E_DCB_ARB_MODE_STRICT_PRIORITY,
7034 I40E_DCB_DEFAULT_MAX_EXPONENT,
7035 lltc_map);
7036 i40e_dcb_hw_rx_cmd_monitor_config(hw, num_tc: new_numtc, num_ports);
7037 i40e_dcb_hw_rx_ets_bw_config(hw, bw_share: new_cfg->etscfg.tcbwtable, mode,
7038 prio_type);
7039 i40e_dcb_hw_pfc_config(hw, pfc_en: new_cfg->pfc.pfcenable,
7040 prio_tc: new_cfg->etscfg.prioritytable);
7041 i40e_dcb_hw_rx_up2tc_config(hw, prio_tc: new_cfg->etscfg.prioritytable);
7042
7043 /* Configure Rx Packet Buffers in HW */
7044 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7045 struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf);
7046
7047 mfs_tc[i] = main_vsi->netdev->mtu;
7048 mfs_tc[i] += I40E_PACKET_HDR_PAD;
7049 }
7050
7051 i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
7052 eee_enabled: false, pfc_en: new_cfg->pfc.pfcenable,
7053 mfs_tc, pb_cfg: &pb_cfg);
7054 i40e_dcb_hw_rx_pb_config(hw, old_pb_cfg: &pf->pb_cfg, new_pb_cfg: &pb_cfg);
7055
7056 /* Update the local Rx Packet buffer config */
7057 pf->pb_cfg = pb_cfg;
7058
7059 /* Inform the FW about changes to DCB configuration */
7060 ret = i40e_aq_dcb_updated(hw: &pf->hw, NULL);
7061 if (ret) {
7062 dev_info(&pf->pdev->dev,
7063 "DCB Updated failed, err %pe aq_err %s\n",
7064 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
7065 goto out;
7066 }
7067
7068 /* Update the port DCBx configuration */
7069 *old_cfg = *new_cfg;
7070
7071 /* Changes in configuration update VEB/VSI */
7072 i40e_dcb_reconfigure(pf);
7073out:
7074 /* Re-start the VSIs if disabled */
7075 if (need_reconfig) {
7076 ret = i40e_resume_port_tx(pf);
7077
7078 clear_bit(nr: __I40E_PORT_SUSPENDED, addr: pf->state);
7079 /* In case of error no point in resuming VSIs */
7080 if (ret)
7081 goto err;
7082
7083 /* Wait for the PF's queues to be disabled */
7084 ret = i40e_pf_wait_queues_disabled(pf);
7085 if (ret) {
7086 /* Schedule PF reset to recover */
7087 set_bit(nr: __I40E_PF_RESET_REQUESTED, addr: pf->state);
7088 i40e_service_event_schedule(pf);
7089 goto err;
7090 } else {
7091 i40e_pf_unquiesce_all_vsi(pf);
7092 set_bit(nr: __I40E_CLIENT_SERVICE_REQUESTED, addr: pf->state);
7093 set_bit(nr: __I40E_CLIENT_L2_CHANGE, addr: pf->state);
7094 }
7095 /* registers are set, lets apply */
7096 if (test_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, pf->hw.caps))
7097 ret = i40e_hw_set_dcb_config(pf, new_cfg);
7098 }
7099
7100err:
7101 return ret;
7102}
7103
7104/**
7105 * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW
7106 * @pf: PF being queried
7107 *
7108 * Set default DCB configuration in case DCB is to be done in SW.
7109 **/
7110int i40e_dcb_sw_default_config(struct i40e_pf *pf)
7111{
7112 struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
7113 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
7114 struct i40e_hw *hw = &pf->hw;
7115 int err;
7116
7117 if (test_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, pf->hw.caps)) {
7118 /* Update the local cached instance with TC0 ETS */
7119 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
7120 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
7121 pf->tmp_cfg.etscfg.maxtcs = 0;
7122 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
7123 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
7124 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
7125 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
7126 /* FW needs one App to configure HW */
7127 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
7128 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
7129 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
7130 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
7131
7132 return i40e_hw_set_dcb_config(pf, new_cfg: &pf->tmp_cfg);
7133 }
7134
7135 memset(&ets_data, 0, sizeof(ets_data));
7136 ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */
7137 ets_data.tc_strict_priority_flags = 0; /* ETS */
7138 ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */
7139
7140 /* Enable ETS on the Physical port */
7141 err = i40e_aq_config_switch_comp_ets
7142 (hw, seid: pf->mac_seid, ets_data: &ets_data,
7143 opcode: i40e_aqc_opc_enable_switching_comp_ets, NULL);
7144 if (err) {
7145 dev_info(&pf->pdev->dev,
7146 "Enable Port ETS failed, err %pe aq_err %s\n",
7147 ERR_PTR(err), libie_aq_str(pf->hw.aq.asq_last_status));
7148 err = -ENOENT;
7149 goto out;
7150 }
7151
7152 /* Update the local cached instance with TC0 ETS */
7153 dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
7154 dcb_cfg->etscfg.cbs = 0;
7155 dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS;
7156 dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
7157
7158out:
7159 return err;
7160}
7161
7162/**
7163 * i40e_init_pf_dcb - Initialize DCB configuration
7164 * @pf: PF being configured
7165 *
7166 * Query the current DCB configuration and cache it
7167 * in the hardware structure
7168 **/
7169static int i40e_init_pf_dcb(struct i40e_pf *pf)
7170{
7171 struct i40e_hw *hw = &pf->hw;
7172 int err;
7173
7174 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
7175 * Also do not enable DCBx if FW LLDP agent is disabled
7176 */
7177 if (test_bit(I40E_HW_CAP_NO_DCB_SUPPORT, pf->hw.caps)) {
7178 dev_info(&pf->pdev->dev, "DCB is not supported.\n");
7179 err = -EOPNOTSUPP;
7180 goto out;
7181 }
7182 if (test_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags)) {
7183 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
7184 err = i40e_dcb_sw_default_config(pf);
7185 if (err) {
7186 dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
7187 goto out;
7188 }
7189 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
7190 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
7191 DCB_CAP_DCBX_VER_IEEE;
7192 /* at init capable but disabled */
7193 set_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
7194 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
7195 goto out;
7196 }
7197 err = i40e_init_dcb(hw, enable_mib_change: true);
7198 if (!err) {
7199 /* Device/Function is not DCBX capable */
7200 if ((!hw->func_caps.dcb) ||
7201 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
7202 dev_info(&pf->pdev->dev,
7203 "DCBX offload is not supported or is disabled for this PF.\n");
7204 } else {
7205 /* When status is not DISABLED then DCBX in FW */
7206 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
7207 DCB_CAP_DCBX_VER_IEEE;
7208
7209 set_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
7210 /* Enable DCB tagging only when more than one TC
7211 * or explicitly disable if only one TC
7212 */
7213 if (i40e_dcb_get_num_tc(dcbcfg: &hw->local_dcbx_config) > 1)
7214 set_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
7215 else
7216 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
7217 dev_dbg(&pf->pdev->dev,
7218 "DCBX offload is supported for this PF.\n");
7219 }
7220 } else if (pf->hw.aq.asq_last_status == LIBIE_AQ_RC_EPERM) {
7221 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
7222 set_bit(nr: I40E_FLAG_FW_LLDP_DIS, addr: pf->flags);
7223 } else {
7224 dev_info(&pf->pdev->dev,
7225 "Query for DCB configuration failed, err %pe aq_err %s\n",
7226 ERR_PTR(err), libie_aq_str(pf->hw.aq.asq_last_status));
7227 }
7228
7229out:
7230 return err;
7231}
7232#endif /* CONFIG_I40E_DCB */
7233
7234static void i40e_print_link_message_eee(struct i40e_vsi *vsi,
7235 const char *speed, const char *fc)
7236{
7237 struct ethtool_keee kedata;
7238
7239 memzero_explicit(s: &kedata, count: sizeof(kedata));
7240 if (vsi->netdev->ethtool_ops->get_eee)
7241 vsi->netdev->ethtool_ops->get_eee(vsi->netdev, &kedata);
7242
7243 if (!linkmode_empty(src: kedata.supported))
7244 netdev_info(dev: vsi->netdev,
7245 format: "NIC Link is Up, %sbps Full Duplex, Flow Control: %s, EEE: %s\n",
7246 speed, fc,
7247 kedata.eee_enabled ? "Enabled" : "Disabled");
7248 else
7249 netdev_info(dev: vsi->netdev,
7250 format: "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
7251 speed, fc);
7252}
7253
7254/**
7255 * i40e_print_link_message - print link up or down
7256 * @vsi: the VSI for which link needs a message
7257 * @isup: true of link is up, false otherwise
7258 */
7259void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
7260{
7261 enum i40e_aq_link_speed new_speed;
7262 struct i40e_pf *pf = vsi->back;
7263 char *speed = "Unknown";
7264 char *fc = "Unknown";
7265 char *fec = "";
7266 char *req_fec = "";
7267 char *an = "";
7268
7269 if (isup)
7270 new_speed = pf->hw.phy.link_info.link_speed;
7271 else
7272 new_speed = I40E_LINK_SPEED_UNKNOWN;
7273
7274 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
7275 return;
7276 vsi->current_isup = isup;
7277 vsi->current_speed = new_speed;
7278 if (!isup) {
7279 netdev_info(dev: vsi->netdev, format: "NIC Link is Down\n");
7280 return;
7281 }
7282
7283 /* Warn user if link speed on NPAR enabled partition is not at
7284 * least 10GB
7285 */
7286 if (pf->hw.func_caps.npar_enable &&
7287 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
7288 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
7289 netdev_warn(dev: vsi->netdev,
7290 format: "The partition detected link speed that is less than 10Gbps\n");
7291
7292 switch (pf->hw.phy.link_info.link_speed) {
7293 case I40E_LINK_SPEED_40GB:
7294 speed = "40 G";
7295 break;
7296 case I40E_LINK_SPEED_20GB:
7297 speed = "20 G";
7298 break;
7299 case I40E_LINK_SPEED_25GB:
7300 speed = "25 G";
7301 break;
7302 case I40E_LINK_SPEED_10GB:
7303 speed = "10 G";
7304 break;
7305 case I40E_LINK_SPEED_5GB:
7306 speed = "5 G";
7307 break;
7308 case I40E_LINK_SPEED_2_5GB:
7309 speed = "2.5 G";
7310 break;
7311 case I40E_LINK_SPEED_1GB:
7312 speed = "1000 M";
7313 break;
7314 case I40E_LINK_SPEED_100MB:
7315 speed = "100 M";
7316 break;
7317 default:
7318 break;
7319 }
7320
7321 switch (pf->hw.fc.current_mode) {
7322 case I40E_FC_FULL:
7323 fc = "RX/TX";
7324 break;
7325 case I40E_FC_TX_PAUSE:
7326 fc = "TX";
7327 break;
7328 case I40E_FC_RX_PAUSE:
7329 fc = "RX";
7330 break;
7331 default:
7332 fc = "None";
7333 break;
7334 }
7335
7336 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
7337 req_fec = "None";
7338 fec = "None";
7339 an = "False";
7340
7341 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7342 an = "True";
7343
7344 if (pf->hw.phy.link_info.fec_info &
7345 I40E_AQ_CONFIG_FEC_KR_ENA)
7346 fec = "CL74 FC-FEC/BASE-R";
7347 else if (pf->hw.phy.link_info.fec_info &
7348 I40E_AQ_CONFIG_FEC_RS_ENA)
7349 fec = "CL108 RS-FEC";
7350
7351 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
7352 * both RS and FC are requested
7353 */
7354 if (vsi->back->hw.phy.link_info.req_fec_info &
7355 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
7356 if (vsi->back->hw.phy.link_info.req_fec_info &
7357 I40E_AQ_REQUEST_FEC_RS)
7358 req_fec = "CL108 RS-FEC";
7359 else
7360 req_fec = "CL74 FC-FEC/BASE-R";
7361 }
7362 netdev_info(dev: vsi->netdev,
7363 format: "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7364 speed, req_fec, fec, an, fc);
7365 } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7366 req_fec = "None";
7367 fec = "None";
7368 an = "False";
7369
7370 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7371 an = "True";
7372
7373 if (pf->hw.phy.link_info.fec_info &
7374 I40E_AQ_CONFIG_FEC_KR_ENA)
7375 fec = "CL74 FC-FEC/BASE-R";
7376
7377 if (pf->hw.phy.link_info.req_fec_info &
7378 I40E_AQ_REQUEST_FEC_KR)
7379 req_fec = "CL74 FC-FEC/BASE-R";
7380
7381 netdev_info(dev: vsi->netdev,
7382 format: "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7383 speed, req_fec, fec, an, fc);
7384 } else {
7385 i40e_print_link_message_eee(vsi, speed, fc);
7386 }
7387
7388}
7389
7390/**
7391 * i40e_up_complete - Finish the last steps of bringing up a connection
7392 * @vsi: the VSI being configured
7393 **/
7394static int i40e_up_complete(struct i40e_vsi *vsi)
7395{
7396 struct i40e_pf *pf = vsi->back;
7397 int err;
7398
7399 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
7400 i40e_vsi_configure_msix(vsi);
7401 else
7402 i40e_configure_msi_and_legacy(vsi);
7403
7404 /* start rings */
7405 err = i40e_vsi_start_rings(vsi);
7406 if (err)
7407 return err;
7408
7409 clear_bit(nr: __I40E_VSI_DOWN, addr: vsi->state);
7410 i40e_napi_enable_all(vsi);
7411 i40e_vsi_enable_irq(vsi);
7412
7413 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7414 (vsi->netdev)) {
7415 i40e_print_link_message(vsi, isup: true);
7416 netif_tx_start_all_queues(dev: vsi->netdev);
7417 netif_carrier_on(dev: vsi->netdev);
7418 }
7419
7420 /* replay FDIR SB filters */
7421 if (vsi->type == I40E_VSI_FDIR) {
7422 /* reset fd counters */
7423 pf->fd_add_err = 0;
7424 pf->fd_atr_cnt = 0;
7425 i40e_fdir_filter_restore(vsi);
7426 }
7427
7428 /* On the next run of the service_task, notify any clients of the new
7429 * opened netdev
7430 */
7431 set_bit(nr: __I40E_CLIENT_SERVICE_REQUESTED, addr: pf->state);
7432 i40e_service_event_schedule(pf);
7433
7434 return 0;
7435}
7436
7437/**
7438 * i40e_vsi_reinit_locked - Reset the VSI
7439 * @vsi: the VSI being configured
7440 *
7441 * Rebuild the ring structs after some configuration
7442 * has changed, e.g. MTU size.
7443 **/
7444static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
7445{
7446 struct i40e_pf *pf = vsi->back;
7447
7448 while (test_and_set_bit(nr: __I40E_CONFIG_BUSY, addr: pf->state))
7449 usleep_range(min: 1000, max: 2000);
7450 i40e_down(vsi);
7451
7452 i40e_up(vsi);
7453 clear_bit(nr: __I40E_CONFIG_BUSY, addr: pf->state);
7454}
7455
7456/**
7457 * i40e_force_link_state - Force the link status
7458 * @pf: board private structure
7459 * @is_up: whether the link state should be forced up or down
7460 **/
7461static int i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7462{
7463 struct i40e_aq_get_phy_abilities_resp abilities;
7464 struct i40e_aq_set_phy_config config = {0};
7465 bool non_zero_phy_type = is_up;
7466 struct i40e_hw *hw = &pf->hw;
7467 u64 mask;
7468 u8 speed;
7469 int err;
7470
7471 /* Card might've been put in an unstable state by other drivers
7472 * and applications, which causes incorrect speed values being
7473 * set on startup. In order to clear speed registers, we call
7474 * get_phy_capabilities twice, once to get initial state of
7475 * available speeds, and once to get current PHY config.
7476 */
7477 err = i40e_aq_get_phy_capabilities(hw, qualified_modules: false, report_init: true, abilities: &abilities,
7478 NULL);
7479 if (err) {
7480 dev_err(&pf->pdev->dev,
7481 "failed to get phy cap., ret = %pe last_status = %s\n",
7482 ERR_PTR(err), libie_aq_str(hw->aq.asq_last_status));
7483 return err;
7484 }
7485 speed = abilities.link_speed;
7486
7487 /* Get the current phy config */
7488 err = i40e_aq_get_phy_capabilities(hw, qualified_modules: false, report_init: false, abilities: &abilities,
7489 NULL);
7490 if (err) {
7491 dev_err(&pf->pdev->dev,
7492 "failed to get phy cap., ret = %pe last_status = %s\n",
7493 ERR_PTR(err), libie_aq_str(hw->aq.asq_last_status));
7494 return err;
7495 }
7496
7497 /* If link needs to go up, but was not forced to go down,
7498 * and its speed values are OK, no need for a flap
7499 * if non_zero_phy_type was set, still need to force up
7500 */
7501 if (test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, pf->flags))
7502 non_zero_phy_type = true;
7503 else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
7504 return 0;
7505
7506 /* To force link we need to set bits for all supported PHY types,
7507 * but there are now more than 32, so we need to split the bitmap
7508 * across two fields.
7509 */
7510 mask = I40E_PHY_TYPES_BITMASK;
7511 config.phy_type =
7512 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
7513 config.phy_type_ext =
7514 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0;
7515 /* Copy the old settings, except of phy_type */
7516 config.abilities = abilities.abilities;
7517 if (test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, pf->flags)) {
7518 if (is_up)
7519 config.abilities |= I40E_AQ_PHY_ENABLE_LINK;
7520 else
7521 config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK);
7522 }
7523 if (abilities.link_speed != 0)
7524 config.link_speed = abilities.link_speed;
7525 else
7526 config.link_speed = speed;
7527 config.eee_capability = abilities.eee_capability;
7528 config.eeer = abilities.eeer_val;
7529 config.low_power_ctrl = abilities.d3_lpan;
7530 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
7531 I40E_AQ_PHY_FEC_CONFIG_MASK;
7532 err = i40e_aq_set_phy_config(hw, config: &config, NULL);
7533
7534 if (err) {
7535 dev_err(&pf->pdev->dev,
7536 "set phy config ret = %pe last_status = %s\n",
7537 ERR_PTR(err), libie_aq_str(pf->hw.aq.asq_last_status));
7538 return err;
7539 }
7540
7541 /* Update the link info */
7542 err = i40e_update_link_info(hw);
7543 if (err) {
7544 /* Wait a little bit (on 40G cards it sometimes takes a really
7545 * long time for link to come back from the atomic reset)
7546 * and try once more
7547 */
7548 msleep(msecs: 1000);
7549 i40e_update_link_info(hw);
7550 }
7551
7552 i40e_aq_set_link_restart_an(hw, enable_link: is_up, NULL);
7553
7554 return 0;
7555}
7556
7557/**
7558 * i40e_up - Bring the connection back up after being down
7559 * @vsi: the VSI being configured
7560 **/
7561int i40e_up(struct i40e_vsi *vsi)
7562{
7563 int err;
7564
7565 if (vsi->type == I40E_VSI_MAIN &&
7566 (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, vsi->back->flags) ||
7567 test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, vsi->back->flags)))
7568 i40e_force_link_state(pf: vsi->back, is_up: true);
7569
7570 err = i40e_vsi_configure(vsi);
7571 if (!err)
7572 err = i40e_up_complete(vsi);
7573
7574 return err;
7575}
7576
7577/**
7578 * i40e_down - Shutdown the connection processing
7579 * @vsi: the VSI being stopped
7580 **/
7581void i40e_down(struct i40e_vsi *vsi)
7582{
7583 int i;
7584
7585 /* It is assumed that the caller of this function
7586 * sets the vsi->state __I40E_VSI_DOWN bit.
7587 */
7588 if (vsi->netdev) {
7589 netif_carrier_off(dev: vsi->netdev);
7590 netif_tx_disable(dev: vsi->netdev);
7591 }
7592 i40e_vsi_disable_irq(vsi);
7593 i40e_vsi_stop_rings(vsi);
7594 if (vsi->type == I40E_VSI_MAIN &&
7595 (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, vsi->back->flags) ||
7596 test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, vsi->back->flags)))
7597 i40e_force_link_state(pf: vsi->back, is_up: false);
7598 i40e_napi_disable_all(vsi);
7599
7600 for (i = 0; i < vsi->num_queue_pairs; i++) {
7601 i40e_clean_tx_ring(tx_ring: vsi->tx_rings[i]);
7602 if (i40e_enabled_xdp_vsi(vsi)) {
7603 /* Make sure that in-progress ndo_xdp_xmit and
7604 * ndo_xsk_wakeup calls are completed.
7605 */
7606 synchronize_rcu();
7607 i40e_clean_tx_ring(tx_ring: vsi->xdp_rings[i]);
7608 }
7609 i40e_clean_rx_ring(rx_ring: vsi->rx_rings[i]);
7610 }
7611
7612}
7613
7614/**
7615 * i40e_validate_mqprio_qopt- validate queue mapping info
7616 * @vsi: the VSI being configured
7617 * @mqprio_qopt: queue parametrs
7618 **/
7619static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
7620 struct tc_mqprio_qopt_offload *mqprio_qopt)
7621{
7622 u64 sum_max_rate = 0;
7623 u64 max_rate = 0;
7624 int i;
7625
7626 if (mqprio_qopt->qopt.offset[0] != 0 ||
7627 mqprio_qopt->qopt.num_tc < 1 ||
7628 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
7629 return -EINVAL;
7630 for (i = 0; ; i++) {
7631 if (!mqprio_qopt->qopt.count[i])
7632 return -EINVAL;
7633 if (mqprio_qopt->min_rate[i]) {
7634 dev_err(&vsi->back->pdev->dev,
7635 "Invalid min tx rate (greater than 0) specified\n");
7636 return -EINVAL;
7637 }
7638 max_rate = mqprio_qopt->max_rate[i];
7639 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
7640 sum_max_rate += max_rate;
7641
7642 if (i >= mqprio_qopt->qopt.num_tc - 1)
7643 break;
7644 if (mqprio_qopt->qopt.offset[i + 1] !=
7645 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
7646 return -EINVAL;
7647 }
7648 if (vsi->num_queue_pairs <
7649 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
7650 dev_err(&vsi->back->pdev->dev,
7651 "Failed to create traffic channel, insufficient number of queues.\n");
7652 return -EINVAL;
7653 }
7654 if (sum_max_rate > i40e_get_link_speed(vsi)) {
7655 dev_err(&vsi->back->pdev->dev,
7656 "Invalid max tx rate specified\n");
7657 return -EINVAL;
7658 }
7659 return 0;
7660}
7661
7662/**
7663 * i40e_vsi_set_default_tc_config - set default values for tc configuration
7664 * @vsi: the VSI being configured
7665 **/
7666static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
7667{
7668 u16 qcount;
7669 int i;
7670
7671 /* Only TC0 is enabled */
7672 vsi->tc_config.numtc = 1;
7673 vsi->tc_config.enabled_tc = 1;
7674 qcount = min_t(int, vsi->alloc_queue_pairs,
7675 i40e_pf_get_max_q_per_tc(vsi->back));
7676 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7677 /* For the TC that is not enabled set the offset to default
7678 * queue and allocate one queue for the given TC.
7679 */
7680 vsi->tc_config.tc_info[i].qoffset = 0;
7681 if (i == 0)
7682 vsi->tc_config.tc_info[i].qcount = qcount;
7683 else
7684 vsi->tc_config.tc_info[i].qcount = 1;
7685 vsi->tc_config.tc_info[i].netdev_tc = 0;
7686 }
7687}
7688
7689/**
7690 * i40e_del_macvlan_filter
7691 * @hw: pointer to the HW structure
7692 * @seid: seid of the channel VSI
7693 * @macaddr: the mac address to apply as a filter
7694 * @aq_err: store the admin Q error
7695 *
7696 * This function deletes a mac filter on the channel VSI which serves as the
7697 * macvlan. Returns 0 on success.
7698 **/
7699static int i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
7700 const u8 *macaddr, int *aq_err)
7701{
7702 struct i40e_aqc_remove_macvlan_element_data element;
7703 int status;
7704
7705 memset(&element, 0, sizeof(element));
7706 ether_addr_copy(dst: element.mac_addr, src: macaddr);
7707 element.vlan_tag = 0;
7708 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7709 status = i40e_aq_remove_macvlan(hw, vsi_id: seid, mv_list: &element, count: 1, NULL);
7710 *aq_err = hw->aq.asq_last_status;
7711
7712 return status;
7713}
7714
7715/**
7716 * i40e_add_macvlan_filter
7717 * @hw: pointer to the HW structure
7718 * @seid: seid of the channel VSI
7719 * @macaddr: the mac address to apply as a filter
7720 * @aq_err: store the admin Q error
7721 *
7722 * This function adds a mac filter on the channel VSI which serves as the
7723 * macvlan. Returns 0 on success.
7724 **/
7725static int i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
7726 const u8 *macaddr, int *aq_err)
7727{
7728 struct i40e_aqc_add_macvlan_element_data element;
7729 u16 cmd_flags = 0;
7730 int status;
7731
7732 ether_addr_copy(dst: element.mac_addr, src: macaddr);
7733 element.vlan_tag = 0;
7734 element.queue_number = 0;
7735 element.match_method = I40E_AQC_MM_ERR_NO_RES;
7736 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
7737 element.flags = cpu_to_le16(cmd_flags);
7738 status = i40e_aq_add_macvlan(hw, vsi_id: seid, mv_list: &element, count: 1, NULL);
7739 *aq_err = hw->aq.asq_last_status;
7740
7741 return status;
7742}
7743
7744/**
7745 * i40e_reset_ch_rings - Reset the queue contexts in a channel
7746 * @vsi: the VSI we want to access
7747 * @ch: the channel we want to access
7748 */
7749static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
7750{
7751 struct i40e_ring *tx_ring, *rx_ring;
7752 u16 pf_q;
7753 int i;
7754
7755 for (i = 0; i < ch->num_queue_pairs; i++) {
7756 pf_q = ch->base_queue + i;
7757 tx_ring = vsi->tx_rings[pf_q];
7758 tx_ring->ch = NULL;
7759 rx_ring = vsi->rx_rings[pf_q];
7760 rx_ring->ch = NULL;
7761 }
7762}
7763
7764/**
7765 * i40e_free_macvlan_channels
7766 * @vsi: the VSI we want to access
7767 *
7768 * This function frees the Qs of the channel VSI from
7769 * the stack and also deletes the channel VSIs which
7770 * serve as macvlans.
7771 */
7772static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
7773{
7774 struct i40e_channel *ch, *ch_tmp;
7775 int ret;
7776
7777 if (list_empty(head: &vsi->macvlan_list))
7778 return;
7779
7780 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7781 struct i40e_vsi *parent_vsi;
7782
7783 if (i40e_is_channel_macvlan(ch)) {
7784 i40e_reset_ch_rings(vsi, ch);
7785 clear_bit(nr: ch->fwd->bit_no, addr: vsi->fwd_bitmask);
7786 netdev_unbind_sb_channel(dev: vsi->netdev, sb_dev: ch->fwd->netdev);
7787 netdev_set_sb_channel(dev: ch->fwd->netdev, channel: 0);
7788 kfree(objp: ch->fwd);
7789 ch->fwd = NULL;
7790 }
7791
7792 list_del(entry: &ch->list);
7793 parent_vsi = ch->parent_vsi;
7794 if (!parent_vsi || !ch->initialized) {
7795 kfree(objp: ch);
7796 continue;
7797 }
7798
7799 /* remove the VSI */
7800 ret = i40e_aq_delete_element(hw: &vsi->back->hw, seid: ch->seid,
7801 NULL);
7802 if (ret)
7803 dev_err(&vsi->back->pdev->dev,
7804 "unable to remove channel (%d) for parent VSI(%d)\n",
7805 ch->seid, parent_vsi->seid);
7806 kfree(objp: ch);
7807 }
7808 vsi->macvlan_cnt = 0;
7809}
7810
7811/**
7812 * i40e_fwd_ring_up - bring the macvlan device up
7813 * @vsi: the VSI we want to access
7814 * @vdev: macvlan netdevice
7815 * @fwd: the private fwd structure
7816 */
7817static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7818 struct i40e_fwd_adapter *fwd)
7819{
7820 struct i40e_channel *ch = NULL, *ch_tmp, *iter;
7821 int ret = 0, num_tc = 1, i, aq_err;
7822 struct i40e_pf *pf = vsi->back;
7823 struct i40e_hw *hw = &pf->hw;
7824
7825 /* Go through the list and find an available channel */
7826 list_for_each_entry_safe(iter, ch_tmp, &vsi->macvlan_list, list) {
7827 if (!i40e_is_channel_macvlan(ch: iter)) {
7828 iter->fwd = fwd;
7829 /* record configuration for macvlan interface in vdev */
7830 for (i = 0; i < num_tc; i++)
7831 netdev_bind_sb_channel_queue(dev: vsi->netdev, sb_dev: vdev,
7832 tc: i,
7833 count: iter->num_queue_pairs,
7834 offset: iter->base_queue);
7835 for (i = 0; i < iter->num_queue_pairs; i++) {
7836 struct i40e_ring *tx_ring, *rx_ring;
7837 u16 pf_q;
7838
7839 pf_q = iter->base_queue + i;
7840
7841 /* Get to TX ring ptr */
7842 tx_ring = vsi->tx_rings[pf_q];
7843 tx_ring->ch = iter;
7844
7845 /* Get the RX ring ptr */
7846 rx_ring = vsi->rx_rings[pf_q];
7847 rx_ring->ch = iter;
7848 }
7849 ch = iter;
7850 break;
7851 }
7852 }
7853
7854 if (!ch)
7855 return -EINVAL;
7856
7857 /* Guarantee all rings are updated before we update the
7858 * MAC address filter.
7859 */
7860 wmb();
7861
7862 /* Add a mac filter */
7863 ret = i40e_add_macvlan_filter(hw, seid: ch->seid, macaddr: vdev->dev_addr, aq_err: &aq_err);
7864 if (ret) {
7865 /* if we cannot add the MAC rule then disable the offload */
7866 macvlan_release_l2fw_offload(dev: vdev);
7867 for (i = 0; i < ch->num_queue_pairs; i++) {
7868 struct i40e_ring *rx_ring;
7869 u16 pf_q;
7870
7871 pf_q = ch->base_queue + i;
7872 rx_ring = vsi->rx_rings[pf_q];
7873 rx_ring->netdev = NULL;
7874 }
7875 dev_info(&pf->pdev->dev,
7876 "Error adding mac filter on macvlan err %pe, aq_err %s\n",
7877 ERR_PTR(ret), libie_aq_str(aq_err));
7878 netdev_err(dev: vdev, format: "L2fwd offload disabled to L2 filter error\n");
7879 }
7880
7881 return ret;
7882}
7883
7884/**
7885 * i40e_setup_macvlans - create the channels which will be macvlans
7886 * @vsi: the VSI we want to access
7887 * @macvlan_cnt: no. of macvlans to be setup
7888 * @qcnt: no. of Qs per macvlan
7889 * @vdev: macvlan netdevice
7890 */
7891static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7892 struct net_device *vdev)
7893{
7894 struct i40e_pf *pf = vsi->back;
7895 struct i40e_hw *hw = &pf->hw;
7896 struct i40e_vsi_context ctxt;
7897 u16 sections, qmap, num_qps;
7898 struct i40e_channel *ch;
7899 int i, pow, ret = 0;
7900 u8 offset = 0;
7901
7902 if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7903 return -EINVAL;
7904
7905 num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7906
7907 /* find the next higher power-of-2 of num queue pairs */
7908 pow = fls(roundup_pow_of_two(num_qps) - 1);
7909
7910 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7911 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7912
7913 /* Setup context bits for the main VSI */
7914 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7915 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7916 memset(&ctxt, 0, sizeof(ctxt));
7917 ctxt.seid = vsi->seid;
7918 ctxt.pf_num = vsi->back->hw.pf_id;
7919 ctxt.vf_num = 0;
7920 ctxt.uplink_seid = vsi->uplink_seid;
7921 ctxt.info = vsi->info;
7922 ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7923 ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7924 ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7925 ctxt.info.valid_sections |= cpu_to_le16(sections);
7926
7927 /* Reconfigure RSS for main VSI with new max queue count */
7928 vsi->rss_size = max_t(u16, num_qps, qcnt);
7929 ret = i40e_vsi_config_rss(vsi);
7930 if (ret) {
7931 dev_info(&pf->pdev->dev,
7932 "Failed to reconfig RSS for num_queues (%u)\n",
7933 vsi->rss_size);
7934 return ret;
7935 }
7936 vsi->reconfig_rss = true;
7937 dev_dbg(&vsi->back->pdev->dev,
7938 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7939 vsi->next_base_queue = num_qps;
7940 vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7941
7942 /* Update the VSI after updating the VSI queue-mapping
7943 * information
7944 */
7945 ret = i40e_aq_update_vsi_params(hw, vsi_ctx: &ctxt, NULL);
7946 if (ret) {
7947 dev_info(&pf->pdev->dev,
7948 "Update vsi tc config failed, err %pe aq_err %s\n",
7949 ERR_PTR(ret), libie_aq_str(hw->aq.asq_last_status));
7950 return ret;
7951 }
7952 /* update the local VSI info with updated queue map */
7953 i40e_vsi_update_queue_map(vsi, ctxt: &ctxt);
7954 vsi->info.valid_sections = 0;
7955
7956 /* Create channels for macvlans */
7957 INIT_LIST_HEAD(list: &vsi->macvlan_list);
7958 for (i = 0; i < macvlan_cnt; i++) {
7959 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7960 if (!ch) {
7961 ret = -ENOMEM;
7962 goto err_free;
7963 }
7964 INIT_LIST_HEAD(list: &ch->list);
7965 ch->num_queue_pairs = qcnt;
7966 if (!i40e_setup_channel(pf, vsi, ch)) {
7967 ret = -EINVAL;
7968 kfree(objp: ch);
7969 goto err_free;
7970 }
7971 ch->parent_vsi = vsi;
7972 vsi->cnt_q_avail -= ch->num_queue_pairs;
7973 vsi->macvlan_cnt++;
7974 list_add_tail(new: &ch->list, head: &vsi->macvlan_list);
7975 }
7976
7977 return ret;
7978
7979err_free:
7980 dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7981 i40e_free_macvlan_channels(vsi);
7982
7983 return ret;
7984}
7985
7986/**
7987 * i40e_fwd_add - configure macvlans
7988 * @netdev: net device to configure
7989 * @vdev: macvlan netdevice
7990 **/
7991static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
7992{
7993 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
7994 u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
7995 struct i40e_vsi *vsi = np->vsi;
7996 struct i40e_pf *pf = vsi->back;
7997 struct i40e_fwd_adapter *fwd;
7998 int avail_macvlan, ret;
7999
8000 if (test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
8001 netdev_info(dev: netdev, format: "Macvlans are not supported when DCB is enabled\n");
8002 return ERR_PTR(error: -EINVAL);
8003 }
8004 if (i40e_is_tc_mqprio_enabled(pf)) {
8005 netdev_info(dev: netdev, format: "Macvlans are not supported when HW TC offload is on\n");
8006 return ERR_PTR(error: -EINVAL);
8007 }
8008 if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
8009 netdev_info(dev: netdev, format: "Not enough vectors available to support macvlans\n");
8010 return ERR_PTR(error: -EINVAL);
8011 }
8012
8013 /* The macvlan device has to be a single Q device so that the
8014 * tc_to_txq field can be reused to pick the tx queue.
8015 */
8016 if (netif_is_multiqueue(dev: vdev))
8017 return ERR_PTR(error: -ERANGE);
8018
8019 if (!vsi->macvlan_cnt) {
8020 /* reserve bit 0 for the pf device */
8021 set_bit(nr: 0, addr: vsi->fwd_bitmask);
8022
8023 /* Try to reserve as many queues as possible for macvlans. First
8024 * reserve 3/4th of max vectors, then half, then quarter and
8025 * calculate Qs per macvlan as you go
8026 */
8027 vectors = pf->num_lan_msix;
8028 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
8029 /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
8030 q_per_macvlan = 4;
8031 macvlan_cnt = (vectors - 32) / 4;
8032 } else if (vectors <= 64 && vectors > 32) {
8033 /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
8034 q_per_macvlan = 2;
8035 macvlan_cnt = (vectors - 16) / 2;
8036 } else if (vectors <= 32 && vectors > 16) {
8037 /* allocate 1 Q per macvlan and 16 Qs to the PF*/
8038 q_per_macvlan = 1;
8039 macvlan_cnt = vectors - 16;
8040 } else if (vectors <= 16 && vectors > 8) {
8041 /* allocate 1 Q per macvlan and 8 Qs to the PF */
8042 q_per_macvlan = 1;
8043 macvlan_cnt = vectors - 8;
8044 } else {
8045 /* allocate 1 Q per macvlan and 1 Q to the PF */
8046 q_per_macvlan = 1;
8047 macvlan_cnt = vectors - 1;
8048 }
8049
8050 if (macvlan_cnt == 0)
8051 return ERR_PTR(error: -EBUSY);
8052
8053 /* Quiesce VSI queues */
8054 i40e_quiesce_vsi(vsi);
8055
8056 /* sets up the macvlans but does not "enable" them */
8057 ret = i40e_setup_macvlans(vsi, macvlan_cnt, qcnt: q_per_macvlan,
8058 vdev);
8059 if (ret)
8060 return ERR_PTR(error: ret);
8061
8062 /* Unquiesce VSI */
8063 i40e_unquiesce_vsi(vsi);
8064 }
8065 avail_macvlan = find_first_zero_bit(addr: vsi->fwd_bitmask,
8066 size: vsi->macvlan_cnt);
8067 if (avail_macvlan >= I40E_MAX_MACVLANS)
8068 return ERR_PTR(error: -EBUSY);
8069
8070 /* create the fwd struct */
8071 fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
8072 if (!fwd)
8073 return ERR_PTR(error: -ENOMEM);
8074
8075 set_bit(nr: avail_macvlan, addr: vsi->fwd_bitmask);
8076 fwd->bit_no = avail_macvlan;
8077 netdev_set_sb_channel(dev: vdev, channel: avail_macvlan);
8078 fwd->netdev = vdev;
8079
8080 if (!netif_running(dev: netdev))
8081 return fwd;
8082
8083 /* Set fwd ring up */
8084 ret = i40e_fwd_ring_up(vsi, vdev, fwd);
8085 if (ret) {
8086 /* unbind the queues and drop the subordinate channel config */
8087 netdev_unbind_sb_channel(dev: netdev, sb_dev: vdev);
8088 netdev_set_sb_channel(dev: vdev, channel: 0);
8089
8090 kfree(objp: fwd);
8091 return ERR_PTR(error: -EINVAL);
8092 }
8093
8094 return fwd;
8095}
8096
8097/**
8098 * i40e_del_all_macvlans - Delete all the mac filters on the channels
8099 * @vsi: the VSI we want to access
8100 */
8101static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
8102{
8103 struct i40e_channel *ch, *ch_tmp;
8104 struct i40e_pf *pf = vsi->back;
8105 struct i40e_hw *hw = &pf->hw;
8106 int aq_err, ret = 0;
8107
8108 if (list_empty(head: &vsi->macvlan_list))
8109 return;
8110
8111 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
8112 if (i40e_is_channel_macvlan(ch)) {
8113 ret = i40e_del_macvlan_filter(hw, seid: ch->seid,
8114 macaddr: i40e_channel_mac(ch),
8115 aq_err: &aq_err);
8116 if (!ret) {
8117 /* Reset queue contexts */
8118 i40e_reset_ch_rings(vsi, ch);
8119 clear_bit(nr: ch->fwd->bit_no, addr: vsi->fwd_bitmask);
8120 netdev_unbind_sb_channel(dev: vsi->netdev,
8121 sb_dev: ch->fwd->netdev);
8122 netdev_set_sb_channel(dev: ch->fwd->netdev, channel: 0);
8123 kfree(objp: ch->fwd);
8124 ch->fwd = NULL;
8125 }
8126 }
8127 }
8128}
8129
8130/**
8131 * i40e_fwd_del - delete macvlan interfaces
8132 * @netdev: net device to configure
8133 * @vdev: macvlan netdevice
8134 */
8135static void i40e_fwd_del(struct net_device *netdev, void *vdev)
8136{
8137 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
8138 struct i40e_fwd_adapter *fwd = vdev;
8139 struct i40e_channel *ch, *ch_tmp;
8140 struct i40e_vsi *vsi = np->vsi;
8141 struct i40e_pf *pf = vsi->back;
8142 struct i40e_hw *hw = &pf->hw;
8143 int aq_err, ret = 0;
8144
8145 /* Find the channel associated with the macvlan and del mac filter */
8146 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
8147 if (i40e_is_channel_macvlan(ch) &&
8148 ether_addr_equal(addr1: i40e_channel_mac(ch),
8149 addr2: fwd->netdev->dev_addr)) {
8150 ret = i40e_del_macvlan_filter(hw, seid: ch->seid,
8151 macaddr: i40e_channel_mac(ch),
8152 aq_err: &aq_err);
8153 if (!ret) {
8154 /* Reset queue contexts */
8155 i40e_reset_ch_rings(vsi, ch);
8156 clear_bit(nr: ch->fwd->bit_no, addr: vsi->fwd_bitmask);
8157 netdev_unbind_sb_channel(dev: netdev, sb_dev: fwd->netdev);
8158 netdev_set_sb_channel(dev: fwd->netdev, channel: 0);
8159 kfree(objp: ch->fwd);
8160 ch->fwd = NULL;
8161 } else {
8162 dev_info(&pf->pdev->dev,
8163 "Error deleting mac filter on macvlan err %pe, aq_err %s\n",
8164 ERR_PTR(ret), libie_aq_str(aq_err));
8165 }
8166 break;
8167 }
8168 }
8169}
8170
8171/**
8172 * i40e_setup_tc - configure multiple traffic classes
8173 * @netdev: net device to configure
8174 * @type_data: tc offload data
8175 **/
8176static int i40e_setup_tc(struct net_device *netdev, void *type_data)
8177{
8178 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
8179 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
8180 struct i40e_vsi *vsi = np->vsi;
8181 struct i40e_pf *pf = vsi->back;
8182 u8 enabled_tc = 0, num_tc, hw;
8183 bool need_reset = false;
8184 int old_queue_pairs;
8185 int ret = -EINVAL;
8186 u16 mode;
8187 int i;
8188
8189 old_queue_pairs = vsi->num_queue_pairs;
8190 num_tc = mqprio_qopt->qopt.num_tc;
8191 hw = mqprio_qopt->qopt.hw;
8192 mode = mqprio_qopt->mode;
8193 if (!hw) {
8194 clear_bit(nr: I40E_FLAG_TC_MQPRIO_ENA, addr: pf->flags);
8195 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
8196 goto config_tc;
8197 }
8198
8199 /* Check if MFP enabled */
8200 if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
8201 netdev_info(dev: netdev,
8202 format: "Configuring TC not supported in MFP mode\n");
8203 return ret;
8204 }
8205 switch (mode) {
8206 case TC_MQPRIO_MODE_DCB:
8207 clear_bit(nr: I40E_FLAG_TC_MQPRIO_ENA, addr: pf->flags);
8208
8209 /* Check if DCB enabled to continue */
8210 if (!test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
8211 netdev_info(dev: netdev,
8212 format: "DCB is not enabled for adapter\n");
8213 return ret;
8214 }
8215
8216 /* Check whether tc count is within enabled limit */
8217 if (num_tc > i40e_pf_get_num_tc(pf)) {
8218 netdev_info(dev: netdev,
8219 format: "TC count greater than enabled on link for adapter\n");
8220 return ret;
8221 }
8222 break;
8223 case TC_MQPRIO_MODE_CHANNEL:
8224 if (test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
8225 netdev_info(dev: netdev,
8226 format: "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
8227 return ret;
8228 }
8229 if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
8230 return ret;
8231 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
8232 if (ret)
8233 return ret;
8234 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
8235 sizeof(*mqprio_qopt));
8236 set_bit(nr: I40E_FLAG_TC_MQPRIO_ENA, addr: pf->flags);
8237 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
8238 break;
8239 default:
8240 return -EINVAL;
8241 }
8242
8243config_tc:
8244 /* Generate TC map for number of tc requested */
8245 for (i = 0; i < num_tc; i++)
8246 enabled_tc |= BIT(i);
8247
8248 /* Requesting same TC configuration as already enabled */
8249 if (enabled_tc == vsi->tc_config.enabled_tc &&
8250 mode != TC_MQPRIO_MODE_CHANNEL)
8251 return 0;
8252
8253 /* Quiesce VSI queues */
8254 i40e_quiesce_vsi(vsi);
8255
8256 if (!hw && !i40e_is_tc_mqprio_enabled(pf))
8257 i40e_remove_queue_channels(vsi);
8258
8259 /* Configure VSI for enabled TCs */
8260 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8261 if (ret) {
8262 netdev_info(dev: netdev, format: "Failed configuring TC for VSI seid=%d\n",
8263 vsi->seid);
8264 need_reset = true;
8265 goto exit;
8266 } else if (enabled_tc &&
8267 (!is_power_of_2(n: vsi->tc_config.tc_info[0].qcount))) {
8268 netdev_info(dev: netdev,
8269 format: "Failed to create channel. Override queues (%u) not power of 2\n",
8270 vsi->tc_config.tc_info[0].qcount);
8271 ret = -EINVAL;
8272 need_reset = true;
8273 goto exit;
8274 }
8275
8276 dev_info(&vsi->back->pdev->dev,
8277 "Setup channel (id:%u) utilizing num_queues %d\n",
8278 vsi->seid, vsi->tc_config.tc_info[0].qcount);
8279
8280 if (i40e_is_tc_mqprio_enabled(pf)) {
8281 if (vsi->mqprio_qopt.max_rate[0]) {
8282 u64 max_tx_rate = i40e_bw_bytes_to_mbits(vsi,
8283 max_tx_rate: vsi->mqprio_qopt.max_rate[0]);
8284
8285 ret = i40e_set_bw_limit(vsi, seid: vsi->seid, max_tx_rate);
8286 if (!ret) {
8287 u64 credits = max_tx_rate;
8288
8289 do_div(credits, I40E_BW_CREDIT_DIVISOR);
8290 dev_dbg(&vsi->back->pdev->dev,
8291 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
8292 max_tx_rate,
8293 credits,
8294 vsi->seid);
8295 } else {
8296 need_reset = true;
8297 goto exit;
8298 }
8299 }
8300 ret = i40e_configure_queue_channels(vsi);
8301 if (ret) {
8302 vsi->num_queue_pairs = old_queue_pairs;
8303 netdev_info(dev: netdev,
8304 format: "Failed configuring queue channels\n");
8305 need_reset = true;
8306 goto exit;
8307 }
8308 }
8309
8310exit:
8311 /* Reset the configuration data to defaults, only TC0 is enabled */
8312 if (need_reset) {
8313 i40e_vsi_set_default_tc_config(vsi);
8314 need_reset = false;
8315 }
8316
8317 /* Unquiesce VSI */
8318 i40e_unquiesce_vsi(vsi);
8319 return ret;
8320}
8321
8322/**
8323 * i40e_set_cld_element - sets cloud filter element data
8324 * @filter: cloud filter rule
8325 * @cld: ptr to cloud filter element data
8326 *
8327 * This is helper function to copy data into cloud filter element
8328 **/
8329static inline void
8330i40e_set_cld_element(struct i40e_cloud_filter *filter,
8331 struct i40e_aqc_cloud_filters_element_data *cld)
8332{
8333 u32 ipa;
8334 int i;
8335
8336 memset(cld, 0, sizeof(*cld));
8337 ether_addr_copy(dst: cld->outer_mac, src: filter->dst_mac);
8338 ether_addr_copy(dst: cld->inner_mac, src: filter->src_mac);
8339
8340 if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
8341 return;
8342
8343 if (filter->n_proto == ETH_P_IPV6) {
8344#define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
8345 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
8346 ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
8347
8348 *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
8349 }
8350 } else {
8351 ipa = be32_to_cpu(filter->dst_ipv4);
8352
8353 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
8354 }
8355
8356 cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
8357
8358 /* tenant_id is not supported by FW now, once the support is enabled
8359 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
8360 */
8361 if (filter->tenant_id)
8362 return;
8363}
8364
8365/**
8366 * i40e_add_del_cloud_filter - Add/del cloud filter
8367 * @vsi: pointer to VSI
8368 * @filter: cloud filter rule
8369 * @add: if true, add, if false, delete
8370 *
8371 * Add or delete a cloud filter for a specific flow spec.
8372 * Returns 0 if the filter were successfully added.
8373 **/
8374int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
8375 struct i40e_cloud_filter *filter, bool add)
8376{
8377 struct i40e_aqc_cloud_filters_element_data cld_filter;
8378 struct i40e_pf *pf = vsi->back;
8379 int ret;
8380 static const u16 flag_table[128] = {
8381 [I40E_CLOUD_FILTER_FLAGS_OMAC] =
8382 I40E_AQC_ADD_CLOUD_FILTER_OMAC,
8383 [I40E_CLOUD_FILTER_FLAGS_IMAC] =
8384 I40E_AQC_ADD_CLOUD_FILTER_IMAC,
8385 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] =
8386 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
8387 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
8388 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
8389 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
8390 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
8391 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
8392 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
8393 [I40E_CLOUD_FILTER_FLAGS_IIP] =
8394 I40E_AQC_ADD_CLOUD_FILTER_IIP,
8395 };
8396
8397 if (filter->flags >= ARRAY_SIZE(flag_table))
8398 return -EIO;
8399
8400 memset(&cld_filter, 0, sizeof(cld_filter));
8401
8402 /* copy element needed to add cloud filter from filter */
8403 i40e_set_cld_element(filter, cld: &cld_filter);
8404
8405 if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
8406 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
8407 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
8408
8409 if (filter->n_proto == ETH_P_IPV6)
8410 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8411 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8412 else
8413 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8414 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8415
8416 if (add)
8417 ret = i40e_aq_add_cloud_filters(hw: &pf->hw, vsi: filter->seid,
8418 filters: &cld_filter, filter_count: 1);
8419 else
8420 ret = i40e_aq_rem_cloud_filters(hw: &pf->hw, vsi: filter->seid,
8421 filters: &cld_filter, filter_count: 1);
8422 if (ret)
8423 dev_dbg(&pf->pdev->dev,
8424 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
8425 add ? "add" : "delete", filter->dst_port, ret,
8426 pf->hw.aq.asq_last_status);
8427 else
8428 dev_info(&pf->pdev->dev,
8429 "%s cloud filter for VSI: %d\n",
8430 add ? "Added" : "Deleted", filter->seid);
8431 return ret;
8432}
8433
8434/**
8435 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
8436 * @vsi: pointer to VSI
8437 * @filter: cloud filter rule
8438 * @add: if true, add, if false, delete
8439 *
8440 * Add or delete a cloud filter for a specific flow spec using big buffer.
8441 * Returns 0 if the filter were successfully added.
8442 **/
8443int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
8444 struct i40e_cloud_filter *filter,
8445 bool add)
8446{
8447 struct i40e_aqc_cloud_filters_element_bb cld_filter;
8448 struct i40e_pf *pf = vsi->back;
8449 int ret;
8450
8451 /* Both (src/dst) valid mac_addr are not supported */
8452 if ((is_valid_ether_addr(addr: filter->dst_mac) &&
8453 is_valid_ether_addr(addr: filter->src_mac)) ||
8454 (is_multicast_ether_addr(addr: filter->dst_mac) &&
8455 is_multicast_ether_addr(addr: filter->src_mac)))
8456 return -EOPNOTSUPP;
8457
8458 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
8459 * ports are not supported via big buffer now.
8460 */
8461 if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
8462 return -EOPNOTSUPP;
8463
8464 /* adding filter using src_port/src_ip is not supported at this stage */
8465 if (filter->src_port ||
8466 (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8467 !ipv6_addr_any(a: &filter->ip.v6.src_ip6))
8468 return -EOPNOTSUPP;
8469
8470 memset(&cld_filter, 0, sizeof(cld_filter));
8471
8472 /* copy element needed to add cloud filter from filter */
8473 i40e_set_cld_element(filter, cld: &cld_filter.element);
8474
8475 if (is_valid_ether_addr(addr: filter->dst_mac) ||
8476 is_valid_ether_addr(addr: filter->src_mac) ||
8477 is_multicast_ether_addr(addr: filter->dst_mac) ||
8478 is_multicast_ether_addr(addr: filter->src_mac)) {
8479 /* MAC + IP : unsupported mode */
8480 if (filter->dst_ipv4)
8481 return -EOPNOTSUPP;
8482
8483 /* since we validated that L4 port must be valid before
8484 * we get here, start with respective "flags" value
8485 * and update if vlan is present or not
8486 */
8487 cld_filter.element.flags =
8488 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
8489
8490 if (filter->vlan_id) {
8491 cld_filter.element.flags =
8492 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
8493 }
8494
8495 } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8496 !ipv6_addr_any(a: &filter->ip.v6.dst_ip6)) {
8497 cld_filter.element.flags =
8498 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
8499 if (filter->n_proto == ETH_P_IPV6)
8500 cld_filter.element.flags |=
8501 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8502 else
8503 cld_filter.element.flags |=
8504 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8505 } else {
8506 dev_err(&pf->pdev->dev,
8507 "either mac or ip has to be valid for cloud filter\n");
8508 return -EINVAL;
8509 }
8510
8511 /* Now copy L4 port in Byte 6..7 in general fields */
8512 cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
8513 be16_to_cpu(filter->dst_port);
8514
8515 if (add) {
8516 /* Validate current device switch mode, change if necessary */
8517 ret = i40e_validate_and_set_switch_mode(vsi);
8518 if (ret) {
8519 dev_err(&pf->pdev->dev,
8520 "failed to set switch mode, ret %d\n",
8521 ret);
8522 return ret;
8523 }
8524
8525 ret = i40e_aq_add_cloud_filters_bb(hw: &pf->hw, seid: filter->seid,
8526 filters: &cld_filter, filter_count: 1);
8527 } else {
8528 ret = i40e_aq_rem_cloud_filters_bb(hw: &pf->hw, seid: filter->seid,
8529 filters: &cld_filter, filter_count: 1);
8530 }
8531
8532 if (ret)
8533 dev_dbg(&pf->pdev->dev,
8534 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
8535 add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8536 else
8537 dev_info(&pf->pdev->dev,
8538 "%s cloud filter for VSI: %d, L4 port: %d\n",
8539 add ? "add" : "delete", filter->seid,
8540 ntohs(filter->dst_port));
8541 return ret;
8542}
8543
8544/**
8545 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
8546 * @vsi: Pointer to VSI
8547 * @f: Pointer to struct flow_cls_offload
8548 * @filter: Pointer to cloud filter structure
8549 *
8550 **/
8551static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
8552 struct flow_cls_offload *f,
8553 struct i40e_cloud_filter *filter)
8554{
8555 struct flow_rule *rule = flow_cls_offload_flow_rule(flow_cmd: f);
8556 struct flow_dissector *dissector = rule->match.dissector;
8557 u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
8558 struct i40e_pf *pf = vsi->back;
8559 u8 field_flags = 0;
8560
8561 if (dissector->used_keys &
8562 ~(BIT_ULL(FLOW_DISSECTOR_KEY_CONTROL) |
8563 BIT_ULL(FLOW_DISSECTOR_KEY_BASIC) |
8564 BIT_ULL(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
8565 BIT_ULL(FLOW_DISSECTOR_KEY_VLAN) |
8566 BIT_ULL(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
8567 BIT_ULL(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
8568 BIT_ULL(FLOW_DISSECTOR_KEY_PORTS) |
8569 BIT_ULL(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
8570 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%llx\n",
8571 dissector->used_keys);
8572 return -EOPNOTSUPP;
8573 }
8574
8575 if (flow_rule_match_key(rule, key: FLOW_DISSECTOR_KEY_ENC_KEYID)) {
8576 struct flow_match_enc_keyid match;
8577
8578 flow_rule_match_enc_keyid(rule, out: &match);
8579 if (match.mask->keyid != 0)
8580 field_flags |= I40E_CLOUD_FIELD_TEN_ID;
8581
8582 filter->tenant_id = be32_to_cpu(match.key->keyid);
8583 }
8584
8585 if (flow_rule_match_key(rule, key: FLOW_DISSECTOR_KEY_BASIC)) {
8586 struct flow_match_basic match;
8587
8588 flow_rule_match_basic(rule, out: &match);
8589 n_proto_key = ntohs(match.key->n_proto);
8590 n_proto_mask = ntohs(match.mask->n_proto);
8591
8592 if (n_proto_key == ETH_P_ALL) {
8593 n_proto_key = 0;
8594 n_proto_mask = 0;
8595 }
8596 filter->n_proto = n_proto_key & n_proto_mask;
8597 filter->ip_proto = match.key->ip_proto;
8598 }
8599
8600 if (flow_rule_match_key(rule, key: FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
8601 struct flow_match_eth_addrs match;
8602
8603 flow_rule_match_eth_addrs(rule, out: &match);
8604
8605 /* use is_broadcast and is_zero to check for all 0xf or 0 */
8606 if (!is_zero_ether_addr(addr: match.mask->dst)) {
8607 if (is_broadcast_ether_addr(addr: match.mask->dst)) {
8608 field_flags |= I40E_CLOUD_FIELD_OMAC;
8609 } else {
8610 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8611 match.mask->dst);
8612 return -EIO;
8613 }
8614 }
8615
8616 if (!is_zero_ether_addr(addr: match.mask->src)) {
8617 if (is_broadcast_ether_addr(addr: match.mask->src)) {
8618 field_flags |= I40E_CLOUD_FIELD_IMAC;
8619 } else {
8620 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8621 match.mask->src);
8622 return -EIO;
8623 }
8624 }
8625 ether_addr_copy(dst: filter->dst_mac, src: match.key->dst);
8626 ether_addr_copy(dst: filter->src_mac, src: match.key->src);
8627 }
8628
8629 if (flow_rule_match_key(rule, key: FLOW_DISSECTOR_KEY_VLAN)) {
8630 struct flow_match_vlan match;
8631
8632 flow_rule_match_vlan(rule, out: &match);
8633 if (match.mask->vlan_id) {
8634 if (match.mask->vlan_id == VLAN_VID_MASK) {
8635 field_flags |= I40E_CLOUD_FIELD_IVLAN;
8636
8637 } else {
8638 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8639 match.mask->vlan_id);
8640 return -EIO;
8641 }
8642 }
8643
8644 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
8645 }
8646
8647 if (flow_rule_match_key(rule, key: FLOW_DISSECTOR_KEY_CONTROL)) {
8648 struct flow_match_control match;
8649
8650 flow_rule_match_control(rule, out: &match);
8651 addr_type = match.key->addr_type;
8652
8653 if (flow_rule_has_control_flags(ctrl_flags: match.mask->flags,
8654 extack: f->common.extack))
8655 return -EOPNOTSUPP;
8656 }
8657
8658 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
8659 struct flow_match_ipv4_addrs match;
8660
8661 flow_rule_match_ipv4_addrs(rule, out: &match);
8662 if (match.mask->dst) {
8663 if (match.mask->dst == cpu_to_be32(0xffffffff)) {
8664 field_flags |= I40E_CLOUD_FIELD_IIP;
8665 } else {
8666 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8667 &match.mask->dst);
8668 return -EIO;
8669 }
8670 }
8671
8672 if (match.mask->src) {
8673 if (match.mask->src == cpu_to_be32(0xffffffff)) {
8674 field_flags |= I40E_CLOUD_FIELD_IIP;
8675 } else {
8676 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8677 &match.mask->src);
8678 return -EIO;
8679 }
8680 }
8681
8682 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
8683 dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8684 return -EIO;
8685 }
8686 filter->dst_ipv4 = match.key->dst;
8687 filter->src_ipv4 = match.key->src;
8688 }
8689
8690 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
8691 struct flow_match_ipv6_addrs match;
8692
8693 flow_rule_match_ipv6_addrs(rule, out: &match);
8694
8695 /* src and dest IPV6 address should not be LOOPBACK
8696 * (0:0:0:0:0:0:0:1), which can be represented as ::1
8697 */
8698 if (ipv6_addr_loopback(a: &match.key->dst) ||
8699 ipv6_addr_loopback(a: &match.key->src)) {
8700 dev_err(&pf->pdev->dev,
8701 "Bad ipv6, addr is LOOPBACK\n");
8702 return -EIO;
8703 }
8704 if (!ipv6_addr_any(a: &match.mask->dst) ||
8705 !ipv6_addr_any(a: &match.mask->src))
8706 field_flags |= I40E_CLOUD_FIELD_IIP;
8707
8708 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
8709 sizeof(filter->src_ipv6));
8710 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
8711 sizeof(filter->dst_ipv6));
8712 }
8713
8714 if (flow_rule_match_key(rule, key: FLOW_DISSECTOR_KEY_PORTS)) {
8715 struct flow_match_ports match;
8716
8717 flow_rule_match_ports(rule, out: &match);
8718 if (match.mask->src) {
8719 if (match.mask->src == cpu_to_be16(0xffff)) {
8720 field_flags |= I40E_CLOUD_FIELD_IIP;
8721 } else {
8722 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8723 be16_to_cpu(match.mask->src));
8724 return -EIO;
8725 }
8726 }
8727
8728 if (match.mask->dst) {
8729 if (match.mask->dst == cpu_to_be16(0xffff)) {
8730 field_flags |= I40E_CLOUD_FIELD_IIP;
8731 } else {
8732 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8733 be16_to_cpu(match.mask->dst));
8734 return -EIO;
8735 }
8736 }
8737
8738 filter->dst_port = match.key->dst;
8739 filter->src_port = match.key->src;
8740
8741 switch (filter->ip_proto) {
8742 case IPPROTO_TCP:
8743 case IPPROTO_UDP:
8744 break;
8745 default:
8746 dev_err(&pf->pdev->dev,
8747 "Only UDP and TCP transport are supported\n");
8748 return -EINVAL;
8749 }
8750 }
8751 filter->flags = field_flags;
8752 return 0;
8753}
8754
8755/**
8756 * i40e_handle_tclass: Forward to a traffic class on the device
8757 * @vsi: Pointer to VSI
8758 * @tc: traffic class index on the device
8759 * @filter: Pointer to cloud filter structure
8760 *
8761 **/
8762static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
8763 struct i40e_cloud_filter *filter)
8764{
8765 struct i40e_channel *ch, *ch_tmp;
8766
8767 /* direct to a traffic class on the same device */
8768 if (tc == 0) {
8769 filter->seid = vsi->seid;
8770 return 0;
8771 } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
8772 if (!filter->dst_port) {
8773 dev_err(&vsi->back->pdev->dev,
8774 "Specify destination port to direct to traffic class that is not default\n");
8775 return -EINVAL;
8776 }
8777 if (list_empty(head: &vsi->ch_list))
8778 return -EINVAL;
8779 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
8780 list) {
8781 if (ch->seid == vsi->tc_seid_map[tc])
8782 filter->seid = ch->seid;
8783 }
8784 return 0;
8785 }
8786 dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
8787 return -EINVAL;
8788}
8789
8790/**
8791 * i40e_configure_clsflower - Configure tc flower filters
8792 * @vsi: Pointer to VSI
8793 * @cls_flower: Pointer to struct flow_cls_offload
8794 *
8795 **/
8796static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8797 struct flow_cls_offload *cls_flower)
8798{
8799 int tc = tc_classid_to_hwtc(dev: vsi->netdev, classid: cls_flower->classid);
8800 struct i40e_cloud_filter *filter = NULL;
8801 struct i40e_pf *pf = vsi->back;
8802 int err = 0;
8803
8804 if (tc < 0) {
8805 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8806 return -EOPNOTSUPP;
8807 }
8808
8809 if (!tc) {
8810 dev_err(&pf->pdev->dev, "Unable to add filter because of invalid destination");
8811 return -EINVAL;
8812 }
8813
8814 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8815 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8816 return -EBUSY;
8817
8818 if (pf->fdir_pf_active_filters ||
8819 (!hlist_empty(h: &pf->fdir_filter_list))) {
8820 dev_err(&vsi->back->pdev->dev,
8821 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8822 return -EINVAL;
8823 }
8824
8825 if (test_bit(I40E_FLAG_FD_SB_ENA, vsi->back->flags)) {
8826 dev_err(&vsi->back->pdev->dev,
8827 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8828 clear_bit(nr: I40E_FLAG_FD_SB_ENA, addr: vsi->back->flags);
8829 clear_bit(nr: I40E_FLAG_FD_SB_TO_CLOUD_FILTER, addr: vsi->back->flags);
8830 }
8831
8832 filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8833 if (!filter)
8834 return -ENOMEM;
8835
8836 filter->cookie = cls_flower->cookie;
8837
8838 err = i40e_parse_cls_flower(vsi, f: cls_flower, filter);
8839 if (err < 0)
8840 goto err;
8841
8842 err = i40e_handle_tclass(vsi, tc, filter);
8843 if (err < 0)
8844 goto err;
8845
8846 /* Add cloud filter */
8847 if (filter->dst_port)
8848 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, add: true);
8849 else
8850 err = i40e_add_del_cloud_filter(vsi, filter, add: true);
8851
8852 if (err) {
8853 dev_err(&pf->pdev->dev, "Failed to add cloud filter, err %d\n",
8854 err);
8855 goto err;
8856 }
8857
8858 /* add filter to the ordered list */
8859 INIT_HLIST_NODE(h: &filter->cloud_node);
8860
8861 hlist_add_head(n: &filter->cloud_node, h: &pf->cloud_filter_list);
8862
8863 pf->num_cloud_filters++;
8864
8865 return err;
8866err:
8867 kfree(objp: filter);
8868 return err;
8869}
8870
8871/**
8872 * i40e_find_cloud_filter - Find the could filter in the list
8873 * @vsi: Pointer to VSI
8874 * @cookie: filter specific cookie
8875 *
8876 **/
8877static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8878 unsigned long *cookie)
8879{
8880 struct i40e_cloud_filter *filter = NULL;
8881 struct hlist_node *node2;
8882
8883 hlist_for_each_entry_safe(filter, node2,
8884 &vsi->back->cloud_filter_list, cloud_node)
8885 if (!memcmp(p: cookie, q: &filter->cookie, size: sizeof(filter->cookie)))
8886 return filter;
8887 return NULL;
8888}
8889
8890/**
8891 * i40e_delete_clsflower - Remove tc flower filters
8892 * @vsi: Pointer to VSI
8893 * @cls_flower: Pointer to struct flow_cls_offload
8894 *
8895 **/
8896static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8897 struct flow_cls_offload *cls_flower)
8898{
8899 struct i40e_cloud_filter *filter = NULL;
8900 struct i40e_pf *pf = vsi->back;
8901 int err = 0;
8902
8903 filter = i40e_find_cloud_filter(vsi, cookie: &cls_flower->cookie);
8904
8905 if (!filter)
8906 return -EINVAL;
8907
8908 hash_del(node: &filter->cloud_node);
8909
8910 if (filter->dst_port)
8911 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, add: false);
8912 else
8913 err = i40e_add_del_cloud_filter(vsi, filter, add: false);
8914
8915 kfree(objp: filter);
8916 if (err) {
8917 dev_err(&pf->pdev->dev,
8918 "Failed to delete cloud filter, err %pe\n",
8919 ERR_PTR(err));
8920 return i40e_aq_rc_to_posix(aq_ret: err, aq_rc: pf->hw.aq.asq_last_status);
8921 }
8922
8923 pf->num_cloud_filters--;
8924 if (!pf->num_cloud_filters)
8925 if (test_bit(I40E_FLAG_FD_SB_TO_CLOUD_FILTER, pf->flags) &&
8926 !test_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags)) {
8927 set_bit(nr: I40E_FLAG_FD_SB_ENA, addr: pf->flags);
8928 clear_bit(nr: I40E_FLAG_FD_SB_TO_CLOUD_FILTER, addr: pf->flags);
8929 clear_bit(nr: I40E_FLAG_FD_SB_INACTIVE, addr: pf->flags);
8930 }
8931 return 0;
8932}
8933
8934/**
8935 * i40e_setup_tc_cls_flower - flower classifier offloads
8936 * @np: net device to configure
8937 * @cls_flower: offload data
8938 **/
8939static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8940 struct flow_cls_offload *cls_flower)
8941{
8942 struct i40e_vsi *vsi = np->vsi;
8943
8944 switch (cls_flower->command) {
8945 case FLOW_CLS_REPLACE:
8946 return i40e_configure_clsflower(vsi, cls_flower);
8947 case FLOW_CLS_DESTROY:
8948 return i40e_delete_clsflower(vsi, cls_flower);
8949 case FLOW_CLS_STATS:
8950 return -EOPNOTSUPP;
8951 default:
8952 return -EOPNOTSUPP;
8953 }
8954}
8955
8956static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8957 void *cb_priv)
8958{
8959 struct i40e_netdev_priv *np = cb_priv;
8960
8961 if (!tc_cls_can_offload_and_chain0(dev: np->vsi->netdev, common: type_data))
8962 return -EOPNOTSUPP;
8963
8964 switch (type) {
8965 case TC_SETUP_CLSFLOWER:
8966 return i40e_setup_tc_cls_flower(np, cls_flower: type_data);
8967
8968 default:
8969 return -EOPNOTSUPP;
8970 }
8971}
8972
8973static LIST_HEAD(i40e_block_cb_list);
8974
8975static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8976 void *type_data)
8977{
8978 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
8979
8980 switch (type) {
8981 case TC_SETUP_QDISC_MQPRIO:
8982 return i40e_setup_tc(netdev, type_data);
8983 case TC_SETUP_BLOCK:
8984 return flow_block_cb_setup_simple(f: type_data,
8985 driver_list: &i40e_block_cb_list,
8986 cb: i40e_setup_tc_block_cb,
8987 cb_ident: np, cb_priv: np, ingress_only: true);
8988 default:
8989 return -EOPNOTSUPP;
8990 }
8991}
8992
8993/**
8994 * i40e_open - Called when a network interface is made active
8995 * @netdev: network interface device structure
8996 *
8997 * The open entry point is called when a network interface is made
8998 * active by the system (IFF_UP). At this point all resources needed
8999 * for transmit and receive operations are allocated, the interrupt
9000 * handler is registered with the OS, the netdev watchdog subtask is
9001 * enabled, and the stack is notified that the interface is ready.
9002 *
9003 * Returns 0 on success, negative value on failure
9004 **/
9005int i40e_open(struct net_device *netdev)
9006{
9007 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
9008 struct i40e_vsi *vsi = np->vsi;
9009 struct i40e_pf *pf = vsi->back;
9010 int err;
9011
9012 /* disallow open during test or if eeprom is broken */
9013 if (test_bit(__I40E_TESTING, pf->state) ||
9014 test_bit(__I40E_BAD_EEPROM, pf->state))
9015 return -EBUSY;
9016
9017 netif_carrier_off(dev: netdev);
9018
9019 if (i40e_force_link_state(pf, is_up: true))
9020 return -EAGAIN;
9021
9022 err = i40e_vsi_open(vsi);
9023 if (err)
9024 return err;
9025
9026 /* configure global TSO hardware offload settings */
9027 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
9028 TCP_FLAG_FIN) >> 16);
9029 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
9030 TCP_FLAG_FIN |
9031 TCP_FLAG_CWR) >> 16);
9032 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
9033
9034 return 0;
9035}
9036
9037/**
9038 * i40e_netif_set_realnum_tx_rx_queues - Update number of tx/rx queues
9039 * @vsi: vsi structure
9040 *
9041 * This updates netdev's number of tx/rx queues
9042 *
9043 * Returns status of setting tx/rx queues
9044 **/
9045static int i40e_netif_set_realnum_tx_rx_queues(struct i40e_vsi *vsi)
9046{
9047 int ret;
9048
9049 ret = netif_set_real_num_rx_queues(dev: vsi->netdev,
9050 rxq: vsi->num_queue_pairs);
9051 if (ret)
9052 return ret;
9053
9054 return netif_set_real_num_tx_queues(dev: vsi->netdev,
9055 txq: vsi->num_queue_pairs);
9056}
9057
9058/**
9059 * i40e_vsi_open -
9060 * @vsi: the VSI to open
9061 *
9062 * Finish initialization of the VSI.
9063 *
9064 * Returns 0 on success, negative value on failure
9065 *
9066 * Note: expects to be called while under rtnl_lock()
9067 **/
9068int i40e_vsi_open(struct i40e_vsi *vsi)
9069{
9070 struct i40e_pf *pf = vsi->back;
9071 char int_name[I40E_INT_NAME_STR_LEN];
9072 int err;
9073
9074 /* allocate descriptors */
9075 err = i40e_vsi_setup_tx_resources(vsi);
9076 if (err)
9077 goto err_setup_tx;
9078 err = i40e_vsi_setup_rx_resources(vsi);
9079 if (err)
9080 goto err_setup_rx;
9081
9082 err = i40e_vsi_configure(vsi);
9083 if (err)
9084 goto err_setup_rx;
9085
9086 if (vsi->netdev) {
9087 snprintf(buf: int_name, size: sizeof(int_name) - 1, fmt: "%s-%s",
9088 dev_driver_string(dev: &pf->pdev->dev), vsi->netdev->name);
9089 err = i40e_vsi_request_irq(vsi, basename: int_name);
9090 if (err)
9091 goto err_setup_rx;
9092
9093 /* Notify the stack of the actual queue counts. */
9094 err = i40e_netif_set_realnum_tx_rx_queues(vsi);
9095 if (err)
9096 goto err_set_queues;
9097
9098 } else if (vsi->type == I40E_VSI_FDIR) {
9099 snprintf(buf: int_name, size: sizeof(int_name) - 1, fmt: "%s-%s:fdir",
9100 dev_driver_string(dev: &pf->pdev->dev),
9101 dev_name(dev: &pf->pdev->dev));
9102 err = i40e_vsi_request_irq(vsi, basename: int_name);
9103 if (err)
9104 goto err_setup_rx;
9105
9106 } else {
9107 err = -EINVAL;
9108 goto err_setup_rx;
9109 }
9110
9111 err = i40e_up_complete(vsi);
9112 if (err)
9113 goto err_up_complete;
9114
9115 return 0;
9116
9117err_up_complete:
9118 i40e_down(vsi);
9119err_set_queues:
9120 i40e_vsi_free_irq(vsi);
9121err_setup_rx:
9122 i40e_vsi_free_rx_resources(vsi);
9123err_setup_tx:
9124 i40e_vsi_free_tx_resources(vsi);
9125 if (vsi->type == I40E_VSI_MAIN)
9126 i40e_do_reset(pf, I40E_PF_RESET_FLAG, lock_acquired: true);
9127
9128 return err;
9129}
9130
9131/**
9132 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
9133 * @pf: Pointer to PF
9134 *
9135 * This function destroys the hlist where all the Flow Director
9136 * filters were saved.
9137 **/
9138static void i40e_fdir_filter_exit(struct i40e_pf *pf)
9139{
9140 struct i40e_fdir_filter *filter;
9141 struct i40e_flex_pit *pit_entry, *tmp;
9142 struct hlist_node *node2;
9143
9144 hlist_for_each_entry_safe(filter, node2,
9145 &pf->fdir_filter_list, fdir_node) {
9146 hlist_del(n: &filter->fdir_node);
9147 kfree(objp: filter);
9148 }
9149
9150 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
9151 list_del(entry: &pit_entry->list);
9152 kfree(objp: pit_entry);
9153 }
9154 INIT_LIST_HEAD(list: &pf->l3_flex_pit_list);
9155
9156 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
9157 list_del(entry: &pit_entry->list);
9158 kfree(objp: pit_entry);
9159 }
9160 INIT_LIST_HEAD(list: &pf->l4_flex_pit_list);
9161
9162 pf->fdir_pf_active_filters = 0;
9163 i40e_reset_fdir_filter_cnt(pf);
9164
9165 /* Reprogram the default input set for TCP/IPv4 */
9166 i40e_write_fd_input_set(pf, addr: LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP,
9167 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9168 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9169
9170 /* Reprogram the default input set for TCP/IPv6 */
9171 i40e_write_fd_input_set(pf, addr: LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP,
9172 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9173 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9174
9175 /* Reprogram the default input set for UDP/IPv4 */
9176 i40e_write_fd_input_set(pf, addr: LIBIE_FILTER_PCTYPE_NONF_IPV4_UDP,
9177 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9178 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9179
9180 /* Reprogram the default input set for UDP/IPv6 */
9181 i40e_write_fd_input_set(pf, addr: LIBIE_FILTER_PCTYPE_NONF_IPV6_UDP,
9182 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9183 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9184
9185 /* Reprogram the default input set for SCTP/IPv4 */
9186 i40e_write_fd_input_set(pf, addr: LIBIE_FILTER_PCTYPE_NONF_IPV4_SCTP,
9187 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9188 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9189
9190 /* Reprogram the default input set for SCTP/IPv6 */
9191 i40e_write_fd_input_set(pf, addr: LIBIE_FILTER_PCTYPE_NONF_IPV6_SCTP,
9192 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9193 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9194
9195 /* Reprogram the default input set for Other/IPv4 */
9196 i40e_write_fd_input_set(pf, addr: LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER,
9197 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9198
9199 i40e_write_fd_input_set(pf, addr: LIBIE_FILTER_PCTYPE_FRAG_IPV4,
9200 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9201
9202 /* Reprogram the default input set for Other/IPv6 */
9203 i40e_write_fd_input_set(pf, addr: LIBIE_FILTER_PCTYPE_NONF_IPV6_OTHER,
9204 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9205
9206 i40e_write_fd_input_set(pf, addr: LIBIE_FILTER_PCTYPE_FRAG_IPV6,
9207 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9208}
9209
9210/**
9211 * i40e_cloud_filter_exit - Cleans up the cloud filters
9212 * @pf: Pointer to PF
9213 *
9214 * This function destroys the hlist where all the cloud filters
9215 * were saved.
9216 **/
9217static void i40e_cloud_filter_exit(struct i40e_pf *pf)
9218{
9219 struct i40e_cloud_filter *cfilter;
9220 struct hlist_node *node;
9221
9222 hlist_for_each_entry_safe(cfilter, node,
9223 &pf->cloud_filter_list, cloud_node) {
9224 hlist_del(n: &cfilter->cloud_node);
9225 kfree(objp: cfilter);
9226 }
9227 pf->num_cloud_filters = 0;
9228
9229 if (test_bit(I40E_FLAG_FD_SB_TO_CLOUD_FILTER, pf->flags) &&
9230 !test_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags)) {
9231 set_bit(nr: I40E_FLAG_FD_SB_ENA, addr: pf->flags);
9232 clear_bit(nr: I40E_FLAG_FD_SB_TO_CLOUD_FILTER, addr: pf->flags);
9233 clear_bit(nr: I40E_FLAG_FD_SB_INACTIVE, addr: pf->flags);
9234 }
9235}
9236
9237/**
9238 * i40e_close - Disables a network interface
9239 * @netdev: network interface device structure
9240 *
9241 * The close entry point is called when an interface is de-activated
9242 * by the OS. The hardware is still under the driver's control, but
9243 * this netdev interface is disabled.
9244 *
9245 * Returns 0, this is not allowed to fail
9246 **/
9247int i40e_close(struct net_device *netdev)
9248{
9249 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
9250 struct i40e_vsi *vsi = np->vsi;
9251
9252 i40e_vsi_close(vsi);
9253
9254 return 0;
9255}
9256
9257/**
9258 * i40e_do_reset - Start a PF or Core Reset sequence
9259 * @pf: board private structure
9260 * @reset_flags: which reset is requested
9261 * @lock_acquired: indicates whether or not the lock has been acquired
9262 * before this function was called.
9263 *
9264 * The essential difference in resets is that the PF Reset
9265 * doesn't clear the packet buffers, doesn't reset the PE
9266 * firmware, and doesn't bother the other PFs on the chip.
9267 **/
9268void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
9269{
9270 struct i40e_vsi *vsi;
9271 u32 val;
9272 int i;
9273
9274 /* do the biggest reset indicated */
9275 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
9276
9277 /* Request a Global Reset
9278 *
9279 * This will start the chip's countdown to the actual full
9280 * chip reset event, and a warning interrupt to be sent
9281 * to all PFs, including the requestor. Our handler
9282 * for the warning interrupt will deal with the shutdown
9283 * and recovery of the switch setup.
9284 */
9285 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
9286 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9287 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
9288 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9289
9290 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
9291
9292 /* Request a Core Reset
9293 *
9294 * Same as Global Reset, except does *not* include the MAC/PHY
9295 */
9296 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
9297 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9298 val |= I40E_GLGEN_RTRIG_CORER_MASK;
9299 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9300 i40e_flush(&pf->hw);
9301
9302 } else if (reset_flags & I40E_PF_RESET_FLAG) {
9303
9304 /* Request a PF Reset
9305 *
9306 * Resets only the PF-specific registers
9307 *
9308 * This goes directly to the tear-down and rebuild of
9309 * the switch, since we need to do all the recovery as
9310 * for the Core Reset.
9311 */
9312 dev_dbg(&pf->pdev->dev, "PFR requested\n");
9313 i40e_handle_reset_warning(pf, lock_acquired);
9314
9315 } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
9316 /* Request a PF Reset
9317 *
9318 * Resets PF and reinitializes PFs VSI.
9319 */
9320 i40e_prep_for_reset(pf);
9321 i40e_reset_and_rebuild(pf, reinit: true, lock_acquired);
9322 dev_info(&pf->pdev->dev,
9323 test_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags) ?
9324 "FW LLDP is disabled\n" :
9325 "FW LLDP is enabled\n");
9326
9327 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
9328 /* Find the VSI(s) that requested a re-init */
9329 dev_info(&pf->pdev->dev, "VSI reinit requested\n");
9330
9331 i40e_pf_for_each_vsi(pf, i, vsi) {
9332 if (test_and_clear_bit(nr: __I40E_VSI_REINIT_REQUESTED,
9333 addr: vsi->state))
9334 i40e_vsi_reinit_locked(vsi);
9335 }
9336 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
9337 /* Find the VSI(s) that needs to be brought down */
9338 dev_info(&pf->pdev->dev, "VSI down requested\n");
9339
9340 i40e_pf_for_each_vsi(pf, i, vsi) {
9341 if (test_and_clear_bit(nr: __I40E_VSI_DOWN_REQUESTED,
9342 addr: vsi->state)) {
9343 set_bit(nr: __I40E_VSI_DOWN, addr: vsi->state);
9344 i40e_down(vsi);
9345 }
9346 }
9347 } else {
9348 dev_info(&pf->pdev->dev,
9349 "bad reset request 0x%08x\n", reset_flags);
9350 }
9351}
9352
9353#ifdef CONFIG_I40E_DCB
9354/**
9355 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
9356 * @pf: board private structure
9357 * @old_cfg: current DCB config
9358 * @new_cfg: new DCB config
9359 **/
9360bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
9361 struct i40e_dcbx_config *old_cfg,
9362 struct i40e_dcbx_config *new_cfg)
9363{
9364 bool need_reconfig = false;
9365
9366 /* Check if ETS configuration has changed */
9367 if (memcmp(p: &new_cfg->etscfg,
9368 q: &old_cfg->etscfg,
9369 size: sizeof(new_cfg->etscfg))) {
9370 /* If Priority Table has changed reconfig is needed */
9371 if (memcmp(p: &new_cfg->etscfg.prioritytable,
9372 q: &old_cfg->etscfg.prioritytable,
9373 size: sizeof(new_cfg->etscfg.prioritytable))) {
9374 need_reconfig = true;
9375 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9376 }
9377
9378 if (memcmp(p: &new_cfg->etscfg.tcbwtable,
9379 q: &old_cfg->etscfg.tcbwtable,
9380 size: sizeof(new_cfg->etscfg.tcbwtable)))
9381 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9382
9383 if (memcmp(p: &new_cfg->etscfg.tsatable,
9384 q: &old_cfg->etscfg.tsatable,
9385 size: sizeof(new_cfg->etscfg.tsatable)))
9386 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9387 }
9388
9389 /* Check if PFC configuration has changed */
9390 if (memcmp(p: &new_cfg->pfc,
9391 q: &old_cfg->pfc,
9392 size: sizeof(new_cfg->pfc))) {
9393 need_reconfig = true;
9394 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9395 }
9396
9397 /* Check if APP Table has changed */
9398 if (memcmp(p: &new_cfg->app,
9399 q: &old_cfg->app,
9400 size: sizeof(new_cfg->app))) {
9401 need_reconfig = true;
9402 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9403 }
9404
9405 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9406 return need_reconfig;
9407}
9408
9409/**
9410 * i40e_handle_lldp_event - Handle LLDP Change MIB event
9411 * @pf: board private structure
9412 * @e: event info posted on ARQ
9413 **/
9414static int i40e_handle_lldp_event(struct i40e_pf *pf,
9415 struct i40e_arq_event_info *e)
9416{
9417 struct i40e_aqc_lldp_get_mib *mib = libie_aq_raw(desc: &e->desc);
9418 struct i40e_hw *hw = &pf->hw;
9419 struct i40e_dcbx_config tmp_dcbx_cfg;
9420 bool need_reconfig = false;
9421 int ret = 0;
9422 u8 type;
9423
9424 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9425 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9426 (hw->phy.link_info.link_speed &
9427 ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) &&
9428 !test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
9429 /* let firmware decide if the DCB should be disabled */
9430 set_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
9431
9432 /* Not DCB capable or capability disabled */
9433 if (!test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
9434 return ret;
9435
9436 /* Ignore if event is not for Nearest Bridge */
9437 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
9438 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
9439 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9440 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
9441 return ret;
9442
9443 /* Check MIB Type and return if event for Remote MIB update */
9444 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
9445 dev_dbg(&pf->pdev->dev,
9446 "LLDP event mib type %s\n", type ? "remote" : "local");
9447 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
9448 /* Update the remote cached instance and return */
9449 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
9450 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
9451 dcbcfg: &hw->remote_dcbx_config);
9452 goto exit;
9453 }
9454
9455 /* Store the old configuration */
9456 tmp_dcbx_cfg = hw->local_dcbx_config;
9457
9458 /* Reset the old DCBx configuration data */
9459 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
9460 /* Get updated DCBX data from firmware */
9461 ret = i40e_get_dcb_config(hw: &pf->hw);
9462 if (ret) {
9463 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9464 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9465 (hw->phy.link_info.link_speed &
9466 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
9467 dev_warn(&pf->pdev->dev,
9468 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
9469 clear_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
9470 } else {
9471 dev_info(&pf->pdev->dev,
9472 "Failed querying DCB configuration data from firmware, err %pe aq_err %s\n",
9473 ERR_PTR(ret),
9474 libie_aq_str(pf->hw.aq.asq_last_status));
9475 }
9476 goto exit;
9477 }
9478
9479 /* No change detected in DCBX configs */
9480 if (!memcmp(p: &tmp_dcbx_cfg, q: &hw->local_dcbx_config,
9481 size: sizeof(tmp_dcbx_cfg))) {
9482 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9483 goto exit;
9484 }
9485
9486 need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg: &tmp_dcbx_cfg,
9487 new_cfg: &hw->local_dcbx_config);
9488
9489 i40e_dcbnl_flush_apps(pf, old_cfg: &tmp_dcbx_cfg, new_cfg: &hw->local_dcbx_config);
9490
9491 if (!need_reconfig)
9492 goto exit;
9493
9494 /* Enable DCB tagging only when more than one TC */
9495 if (i40e_dcb_get_num_tc(dcbcfg: &hw->local_dcbx_config) > 1)
9496 set_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
9497 else
9498 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
9499
9500 set_bit(nr: __I40E_PORT_SUSPENDED, addr: pf->state);
9501 /* Reconfiguration needed quiesce all VSIs */
9502 i40e_pf_quiesce_all_vsi(pf);
9503
9504 /* Changes in configuration update VEB/VSI */
9505 i40e_dcb_reconfigure(pf);
9506
9507 ret = i40e_resume_port_tx(pf);
9508
9509 clear_bit(nr: __I40E_PORT_SUSPENDED, addr: pf->state);
9510 /* In case of error no point in resuming VSIs */
9511 if (ret)
9512 goto exit;
9513
9514 /* Wait for the PF's queues to be disabled */
9515 ret = i40e_pf_wait_queues_disabled(pf);
9516 if (ret) {
9517 /* Schedule PF reset to recover */
9518 set_bit(nr: __I40E_PF_RESET_REQUESTED, addr: pf->state);
9519 i40e_service_event_schedule(pf);
9520 } else {
9521 i40e_pf_unquiesce_all_vsi(pf);
9522 set_bit(nr: __I40E_CLIENT_SERVICE_REQUESTED, addr: pf->state);
9523 set_bit(nr: __I40E_CLIENT_L2_CHANGE, addr: pf->state);
9524 }
9525
9526exit:
9527 return ret;
9528}
9529#endif /* CONFIG_I40E_DCB */
9530
9531/**
9532 * i40e_do_reset_safe - Protected reset path for userland calls.
9533 * @pf: board private structure
9534 * @reset_flags: which reset is requested
9535 *
9536 **/
9537void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9538{
9539 rtnl_lock();
9540 i40e_do_reset(pf, reset_flags, lock_acquired: true);
9541 rtnl_unlock();
9542}
9543
9544/**
9545 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
9546 * @pf: board private structure
9547 * @e: event info posted on ARQ
9548 *
9549 * Handler for LAN Queue Overflow Event generated by the firmware for PF
9550 * and VF queues
9551 **/
9552static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9553 struct i40e_arq_event_info *e)
9554{
9555 struct i40e_aqc_lan_overflow *data = libie_aq_raw(desc: &e->desc);
9556 u32 queue = le32_to_cpu(data->prtdcb_rupto);
9557 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
9558 struct i40e_hw *hw = &pf->hw;
9559 struct i40e_vf *vf;
9560 u16 vf_id;
9561
9562 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9563 queue, qtx_ctl);
9564
9565 if (FIELD_GET(I40E_QTX_CTL_PFVF_Q_MASK, qtx_ctl) !=
9566 I40E_QTX_CTL_VF_QUEUE)
9567 return;
9568
9569 /* Queue belongs to VF, find the VF and issue VF reset */
9570 vf_id = FIELD_GET(I40E_QTX_CTL_VFVM_INDX_MASK, qtx_ctl);
9571 vf_id -= hw->func_caps.vf_base_id;
9572 vf = &pf->vf[vf_id];
9573 i40e_vc_notify_vf_reset(vf);
9574 /* Allow VF to process pending reset notification */
9575 msleep(msecs: 20);
9576 i40e_reset_vf(vf, flr: false);
9577}
9578
9579/**
9580 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
9581 * @pf: board private structure
9582 **/
9583u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9584{
9585 u32 val, fcnt_prog;
9586
9587 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9588 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
9589 FIELD_GET(I40E_PFQF_FDSTAT_BEST_CNT_MASK, val);
9590 return fcnt_prog;
9591}
9592
9593/**
9594 * i40e_get_global_fd_count - Get total FD filters programmed on device
9595 * @pf: board private structure
9596 **/
9597u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9598{
9599 u32 val, fcnt_prog;
9600
9601 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9602 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
9603 FIELD_GET(I40E_GLQF_FDCNT_0_BESTCNT_MASK, val);
9604 return fcnt_prog;
9605}
9606
9607/**
9608 * i40e_reenable_fdir_sb - Restore FDir SB capability
9609 * @pf: board private structure
9610 **/
9611static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9612{
9613 if (test_and_clear_bit(nr: __I40E_FD_SB_AUTO_DISABLED, addr: pf->state))
9614 if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) &&
9615 (I40E_DEBUG_FD & pf->hw.debug_mask))
9616 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9617}
9618
9619/**
9620 * i40e_reenable_fdir_atr - Restore FDir ATR capability
9621 * @pf: board private structure
9622 **/
9623static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9624{
9625 if (test_and_clear_bit(nr: __I40E_FD_ATR_AUTO_DISABLED, addr: pf->state)) {
9626 /* ATR uses the same filtering logic as SB rules. It only
9627 * functions properly if the input set mask is at the default
9628 * settings. It is safe to restore the default input set
9629 * because there are no active TCPv4 filter rules.
9630 */
9631 i40e_write_fd_input_set(pf, addr: LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP,
9632 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9633 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9634
9635 if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
9636 (I40E_DEBUG_FD & pf->hw.debug_mask))
9637 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9638 }
9639}
9640
9641/**
9642 * i40e_delete_invalid_filter - Delete an invalid FDIR filter
9643 * @pf: board private structure
9644 * @filter: FDir filter to remove
9645 */
9646static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9647 struct i40e_fdir_filter *filter)
9648{
9649 /* Update counters */
9650 pf->fdir_pf_active_filters--;
9651 pf->fd_inv = 0;
9652
9653 switch (filter->flow_type) {
9654 case TCP_V4_FLOW:
9655 pf->fd_tcp4_filter_cnt--;
9656 break;
9657 case UDP_V4_FLOW:
9658 pf->fd_udp4_filter_cnt--;
9659 break;
9660 case SCTP_V4_FLOW:
9661 pf->fd_sctp4_filter_cnt--;
9662 break;
9663 case TCP_V6_FLOW:
9664 pf->fd_tcp6_filter_cnt--;
9665 break;
9666 case UDP_V6_FLOW:
9667 pf->fd_udp6_filter_cnt--;
9668 break;
9669 case SCTP_V6_FLOW:
9670 pf->fd_udp6_filter_cnt--;
9671 break;
9672 case IP_USER_FLOW:
9673 switch (filter->ipl4_proto) {
9674 case IPPROTO_TCP:
9675 pf->fd_tcp4_filter_cnt--;
9676 break;
9677 case IPPROTO_UDP:
9678 pf->fd_udp4_filter_cnt--;
9679 break;
9680 case IPPROTO_SCTP:
9681 pf->fd_sctp4_filter_cnt--;
9682 break;
9683 case IPPROTO_IP:
9684 pf->fd_ip4_filter_cnt--;
9685 break;
9686 }
9687 break;
9688 case IPV6_USER_FLOW:
9689 switch (filter->ipl4_proto) {
9690 case IPPROTO_TCP:
9691 pf->fd_tcp6_filter_cnt--;
9692 break;
9693 case IPPROTO_UDP:
9694 pf->fd_udp6_filter_cnt--;
9695 break;
9696 case IPPROTO_SCTP:
9697 pf->fd_sctp6_filter_cnt--;
9698 break;
9699 case IPPROTO_IP:
9700 pf->fd_ip6_filter_cnt--;
9701 break;
9702 }
9703 break;
9704 }
9705
9706 /* Remove the filter from the list and free memory */
9707 hlist_del(n: &filter->fdir_node);
9708 kfree(objp: filter);
9709}
9710
9711/**
9712 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
9713 * @pf: board private structure
9714 **/
9715void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9716{
9717 struct i40e_fdir_filter *filter;
9718 u32 fcnt_prog, fcnt_avail;
9719 struct hlist_node *node;
9720
9721 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9722 return;
9723
9724 /* Check if we have enough room to re-enable FDir SB capability. */
9725 fcnt_prog = i40e_get_global_fd_count(pf);
9726 fcnt_avail = pf->fdir_pf_filter_count;
9727 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
9728 (pf->fd_add_err == 0) ||
9729 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9730 i40e_reenable_fdir_sb(pf);
9731
9732 /* We should wait for even more space before re-enabling ATR.
9733 * Additionally, we cannot enable ATR as long as we still have TCP SB
9734 * rules active.
9735 */
9736 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
9737 pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9738 i40e_reenable_fdir_atr(pf);
9739
9740 /* if hw had a problem adding a filter, delete it */
9741 if (pf->fd_inv > 0) {
9742 hlist_for_each_entry_safe(filter, node,
9743 &pf->fdir_filter_list, fdir_node)
9744 if (filter->fd_id == pf->fd_inv)
9745 i40e_delete_invalid_filter(pf, filter);
9746 }
9747}
9748
9749#define I40E_MIN_FD_FLUSH_INTERVAL 10
9750#define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
9751/**
9752 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
9753 * @pf: board private structure
9754 **/
9755static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9756{
9757 unsigned long min_flush_time;
9758 int flush_wait_retry = 50;
9759 bool disable_atr = false;
9760 int fd_room;
9761 int reg;
9762
9763 if (!time_after(jiffies, pf->fd_flush_timestamp +
9764 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
9765 return;
9766
9767 /* If the flush is happening too quick and we have mostly SB rules we
9768 * should not re-enable ATR for some time.
9769 */
9770 min_flush_time = pf->fd_flush_timestamp +
9771 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
9772 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9773
9774 if (!(time_after(jiffies, min_flush_time)) &&
9775 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
9776 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9777 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9778 disable_atr = true;
9779 }
9780
9781 pf->fd_flush_timestamp = jiffies;
9782 set_bit(nr: __I40E_FD_ATR_AUTO_DISABLED, addr: pf->state);
9783 /* flush all filters */
9784 wr32(&pf->hw, I40E_PFQF_CTL_1,
9785 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
9786 i40e_flush(&pf->hw);
9787 pf->fd_flush_cnt++;
9788 pf->fd_add_err = 0;
9789 do {
9790 /* Check FD flush status every 5-6msec */
9791 usleep_range(min: 5000, max: 6000);
9792 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9793 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
9794 break;
9795 } while (flush_wait_retry--);
9796 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
9797 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9798 } else {
9799 /* replay sideband filters */
9800 i40e_fdir_filter_restore(vsi: i40e_pf_get_main_vsi(pf));
9801 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9802 clear_bit(nr: __I40E_FD_ATR_AUTO_DISABLED, addr: pf->state);
9803 clear_bit(nr: __I40E_FD_FLUSH_REQUESTED, addr: pf->state);
9804 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9805 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9806 }
9807}
9808
9809/**
9810 * i40e_get_current_atr_cnt - Get the count of total FD ATR filters programmed
9811 * @pf: board private structure
9812 **/
9813u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9814{
9815 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9816}
9817
9818/**
9819 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
9820 * @pf: board private structure
9821 **/
9822static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9823{
9824
9825 /* if interface is down do nothing */
9826 if (test_bit(__I40E_DOWN, pf->state))
9827 return;
9828
9829 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9830 i40e_fdir_flush_and_replay(pf);
9831
9832 i40e_fdir_check_and_reenable(pf);
9833
9834}
9835
9836/**
9837 * i40e_vsi_link_event - notify VSI of a link event
9838 * @vsi: vsi to be notified
9839 * @link_up: link up or down
9840 **/
9841static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
9842{
9843 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
9844 return;
9845
9846 switch (vsi->type) {
9847 case I40E_VSI_MAIN:
9848 if (!vsi->netdev || !vsi->netdev_registered)
9849 break;
9850
9851 if (link_up) {
9852 netif_carrier_on(dev: vsi->netdev);
9853 netif_tx_wake_all_queues(dev: vsi->netdev);
9854 } else {
9855 netif_carrier_off(dev: vsi->netdev);
9856 netif_tx_stop_all_queues(dev: vsi->netdev);
9857 }
9858 break;
9859
9860 case I40E_VSI_SRIOV:
9861 case I40E_VSI_VMDQ2:
9862 case I40E_VSI_CTRL:
9863 case I40E_VSI_IWARP:
9864 case I40E_VSI_MIRROR:
9865 default:
9866 /* there is no notification for other VSIs */
9867 break;
9868 }
9869}
9870
9871/**
9872 * i40e_veb_link_event - notify elements on the veb of a link event
9873 * @veb: veb to be notified
9874 * @link_up: link up or down
9875 **/
9876static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9877{
9878 struct i40e_vsi *vsi;
9879 struct i40e_pf *pf;
9880 int i;
9881
9882 if (!veb || !veb->pf)
9883 return;
9884 pf = veb->pf;
9885
9886 /* Send link event to contained VSIs */
9887 i40e_pf_for_each_vsi(pf, i, vsi)
9888 if (vsi->uplink_seid == veb->seid)
9889 i40e_vsi_link_event(vsi, link_up);
9890}
9891
9892/**
9893 * i40e_link_event - Update netif_carrier status
9894 * @pf: board private structure
9895 **/
9896static void i40e_link_event(struct i40e_pf *pf)
9897{
9898 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
9899 struct i40e_veb *veb = i40e_pf_get_main_veb(pf);
9900 u8 new_link_speed, old_link_speed;
9901 bool new_link, old_link;
9902 int status;
9903#ifdef CONFIG_I40E_DCB
9904 int err;
9905#endif /* CONFIG_I40E_DCB */
9906
9907 /* set this to force the get_link_status call to refresh state */
9908 pf->hw.phy.get_link_info = true;
9909 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9910 status = i40e_get_link_status(hw: &pf->hw, link_up: &new_link);
9911
9912 /* On success, disable temp link polling */
9913 if (status == 0) {
9914 clear_bit(nr: __I40E_TEMP_LINK_POLLING, addr: pf->state);
9915 } else {
9916 /* Enable link polling temporarily until i40e_get_link_status
9917 * returns 0
9918 */
9919 set_bit(nr: __I40E_TEMP_LINK_POLLING, addr: pf->state);
9920 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9921 status);
9922 return;
9923 }
9924
9925 old_link_speed = pf->hw.phy.link_info_old.link_speed;
9926 new_link_speed = pf->hw.phy.link_info.link_speed;
9927
9928 if (new_link == old_link &&
9929 new_link_speed == old_link_speed &&
9930 (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9931 new_link == netif_carrier_ok(dev: vsi->netdev)))
9932 return;
9933
9934 if (!new_link && old_link)
9935 pf->link_down_events++;
9936
9937 i40e_print_link_message(vsi, isup: new_link);
9938
9939 /* Notify the base of the switch tree connected to
9940 * the link. Floating VEBs are not notified.
9941 */
9942 if (veb)
9943 i40e_veb_link_event(veb, link_up: new_link);
9944 else
9945 i40e_vsi_link_event(vsi, link_up: new_link);
9946
9947 if (pf->vf)
9948 i40e_vc_notify_link_state(pf);
9949
9950 if (test_bit(I40E_FLAG_PTP_ENA, pf->flags))
9951 i40e_ptp_set_increment(pf);
9952#ifdef CONFIG_I40E_DCB
9953 if (new_link == old_link)
9954 return;
9955 /* Not SW DCB so firmware will take care of default settings */
9956 if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9957 return;
9958
9959 /* We cover here only link down, as after link up in case of SW DCB
9960 * SW LLDP agent will take care of setting it up
9961 */
9962 if (!new_link) {
9963 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
9964 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
9965 err = i40e_dcb_sw_default_config(pf);
9966 if (err) {
9967 clear_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
9968 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
9969 } else {
9970 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
9971 DCB_CAP_DCBX_VER_IEEE;
9972 set_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
9973 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
9974 }
9975 }
9976#endif /* CONFIG_I40E_DCB */
9977}
9978
9979/**
9980 * i40e_watchdog_subtask - periodic checks not using event driven response
9981 * @pf: board private structure
9982 **/
9983static void i40e_watchdog_subtask(struct i40e_pf *pf)
9984{
9985 struct i40e_vsi *vsi;
9986 struct i40e_veb *veb;
9987 int i;
9988
9989 /* if interface is down do nothing */
9990 if (test_bit(__I40E_DOWN, pf->state) ||
9991 test_bit(__I40E_CONFIG_BUSY, pf->state))
9992 return;
9993
9994 /* make sure we don't do these things too often */
9995 if (time_before(jiffies, (pf->service_timer_previous +
9996 pf->service_timer_period)))
9997 return;
9998 pf->service_timer_previous = jiffies;
9999
10000 if (test_bit(I40E_FLAG_LINK_POLLING_ENA, pf->flags) ||
10001 test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
10002 i40e_link_event(pf);
10003
10004 /* Update the stats for active netdevs so the network stack
10005 * can look at updated numbers whenever it cares to
10006 */
10007 i40e_pf_for_each_vsi(pf, i, vsi)
10008 if (vsi->netdev)
10009 i40e_update_stats(vsi);
10010
10011 if (test_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags)) {
10012 /* Update the stats for the active switching components */
10013 i40e_pf_for_each_veb(pf, i, veb)
10014 i40e_update_veb_stats(veb);
10015 }
10016
10017 i40e_ptp_rx_hang(pf);
10018 i40e_ptp_tx_hang(pf);
10019}
10020
10021/**
10022 * i40e_reset_subtask - Set up for resetting the device and driver
10023 * @pf: board private structure
10024 **/
10025static void i40e_reset_subtask(struct i40e_pf *pf)
10026{
10027 u32 reset_flags = 0;
10028
10029 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
10030 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
10031 clear_bit(nr: __I40E_REINIT_REQUESTED, addr: pf->state);
10032 }
10033 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
10034 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
10035 clear_bit(nr: __I40E_PF_RESET_REQUESTED, addr: pf->state);
10036 }
10037 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
10038 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
10039 clear_bit(nr: __I40E_CORE_RESET_REQUESTED, addr: pf->state);
10040 }
10041 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
10042 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
10043 clear_bit(nr: __I40E_GLOBAL_RESET_REQUESTED, addr: pf->state);
10044 }
10045 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
10046 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
10047 clear_bit(nr: __I40E_DOWN_REQUESTED, addr: pf->state);
10048 }
10049
10050 /* If there's a recovery already waiting, it takes
10051 * precedence before starting a new reset sequence.
10052 */
10053 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
10054 i40e_prep_for_reset(pf);
10055 i40e_reset(pf);
10056 i40e_rebuild(pf, reinit: false, lock_acquired: false);
10057 }
10058
10059 /* If we're already down or resetting, just bail */
10060 if (reset_flags &&
10061 !test_bit(__I40E_DOWN, pf->state) &&
10062 !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
10063 i40e_do_reset(pf, reset_flags, lock_acquired: false);
10064 }
10065}
10066
10067/**
10068 * i40e_handle_link_event - Handle link event
10069 * @pf: board private structure
10070 * @e: event info posted on ARQ
10071 **/
10072static void i40e_handle_link_event(struct i40e_pf *pf,
10073 struct i40e_arq_event_info *e)
10074{
10075 struct i40e_aqc_get_link_status *status = libie_aq_raw(desc: &e->desc);
10076
10077 /* Do a new status request to re-enable LSE reporting
10078 * and load new status information into the hw struct
10079 * This completely ignores any state information
10080 * in the ARQ event info, instead choosing to always
10081 * issue the AQ update link status command.
10082 */
10083 i40e_link_event(pf);
10084
10085 /* Check if module meets thermal requirements */
10086 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
10087 dev_err(&pf->pdev->dev,
10088 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
10089 dev_err(&pf->pdev->dev,
10090 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
10091 } else {
10092 /* check for unqualified module, if link is down, suppress
10093 * the message if link was forced to be down.
10094 */
10095 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
10096 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
10097 (!(status->link_info & I40E_AQ_LINK_UP)) &&
10098 (!test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, pf->flags))) {
10099 dev_err(&pf->pdev->dev,
10100 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
10101 dev_err(&pf->pdev->dev,
10102 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
10103 }
10104 }
10105}
10106
10107/**
10108 * i40e_clean_adminq_subtask - Clean the AdminQ rings
10109 * @pf: board private structure
10110 **/
10111static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
10112{
10113 struct i40e_arq_event_info event;
10114 struct i40e_hw *hw = &pf->hw;
10115 u16 pending, i = 0;
10116 u16 opcode;
10117 u32 oldval;
10118 int ret;
10119 u32 val;
10120
10121 /* Do not run clean AQ when PF reset fails */
10122 if (test_bit(__I40E_RESET_FAILED, pf->state))
10123 return;
10124
10125 /* check for error indications */
10126 val = rd32(&pf->hw, I40E_PF_ARQLEN);
10127 oldval = val;
10128 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
10129 if (hw->debug_mask & I40E_DEBUG_AQ)
10130 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
10131 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
10132 }
10133 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
10134 if (hw->debug_mask & I40E_DEBUG_AQ)
10135 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
10136 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
10137 pf->arq_overflows++;
10138 }
10139 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
10140 if (hw->debug_mask & I40E_DEBUG_AQ)
10141 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
10142 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
10143 }
10144 if (oldval != val)
10145 wr32(&pf->hw, I40E_PF_ARQLEN, val);
10146
10147 val = rd32(&pf->hw, I40E_PF_ATQLEN);
10148 oldval = val;
10149 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
10150 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10151 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
10152 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
10153 }
10154 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
10155 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10156 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
10157 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
10158 }
10159 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
10160 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10161 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
10162 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
10163 }
10164 if (oldval != val)
10165 wr32(&pf->hw, I40E_PF_ATQLEN, val);
10166
10167 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
10168 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
10169 if (!event.msg_buf)
10170 return;
10171
10172 do {
10173 ret = i40e_clean_arq_element(hw, e: &event, events_pending: &pending);
10174 if (ret == -EALREADY)
10175 break;
10176 else if (ret) {
10177 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
10178 break;
10179 }
10180
10181 opcode = le16_to_cpu(event.desc.opcode);
10182 switch (opcode) {
10183
10184 case i40e_aqc_opc_get_link_status:
10185 rtnl_lock();
10186 i40e_handle_link_event(pf, e: &event);
10187 rtnl_unlock();
10188 break;
10189 case i40e_aqc_opc_send_msg_to_pf:
10190 ret = i40e_vc_process_vf_msg(pf,
10191 le16_to_cpu(event.desc.retval),
10192 le32_to_cpu(event.desc.cookie_high),
10193 le32_to_cpu(event.desc.cookie_low),
10194 msg: event.msg_buf,
10195 msglen: event.msg_len);
10196 break;
10197 case i40e_aqc_opc_lldp_update_mib:
10198 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
10199#ifdef CONFIG_I40E_DCB
10200 rtnl_lock();
10201 i40e_handle_lldp_event(pf, e: &event);
10202 rtnl_unlock();
10203#endif /* CONFIG_I40E_DCB */
10204 break;
10205 case i40e_aqc_opc_event_lan_overflow:
10206 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
10207 i40e_handle_lan_overflow_event(pf, e: &event);
10208 break;
10209 case i40e_aqc_opc_send_msg_to_peer:
10210 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
10211 break;
10212 case i40e_aqc_opc_nvm_erase:
10213 case i40e_aqc_opc_nvm_update:
10214 case i40e_aqc_opc_oem_post_update:
10215 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
10216 "ARQ NVM operation 0x%04x completed\n",
10217 opcode);
10218 break;
10219 default:
10220 dev_info(&pf->pdev->dev,
10221 "ARQ: Unknown event 0x%04x ignored\n",
10222 opcode);
10223 break;
10224 }
10225 } while (i++ < I40E_AQ_WORK_LIMIT);
10226
10227 if (i < I40E_AQ_WORK_LIMIT)
10228 clear_bit(nr: __I40E_ADMINQ_EVENT_PENDING, addr: pf->state);
10229
10230 /* re-enable Admin queue interrupt cause */
10231 val = rd32(hw, I40E_PFINT_ICR0_ENA);
10232 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
10233 wr32(hw, I40E_PFINT_ICR0_ENA, val);
10234 i40e_flush(hw);
10235
10236 kfree(objp: event.msg_buf);
10237}
10238
10239/**
10240 * i40e_verify_eeprom - make sure eeprom is good to use
10241 * @pf: board private structure
10242 **/
10243static void i40e_verify_eeprom(struct i40e_pf *pf)
10244{
10245 int err;
10246
10247 err = i40e_diag_eeprom_test(hw: &pf->hw);
10248 if (err) {
10249 /* retry in case of garbage read */
10250 err = i40e_diag_eeprom_test(hw: &pf->hw);
10251 if (err) {
10252 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
10253 err);
10254 set_bit(nr: __I40E_BAD_EEPROM, addr: pf->state);
10255 }
10256 }
10257
10258 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
10259 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
10260 clear_bit(nr: __I40E_BAD_EEPROM, addr: pf->state);
10261 }
10262}
10263
10264/**
10265 * i40e_enable_pf_switch_lb
10266 * @pf: pointer to the PF structure
10267 *
10268 * enable switch loop back or die - no point in a return value
10269 **/
10270static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
10271{
10272 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
10273 struct i40e_vsi_context ctxt;
10274 int ret;
10275
10276 ctxt.seid = pf->main_vsi_seid;
10277 ctxt.pf_num = pf->hw.pf_id;
10278 ctxt.vf_num = 0;
10279 ret = i40e_aq_get_vsi_params(hw: &pf->hw, vsi_ctx: &ctxt, NULL);
10280 if (ret) {
10281 dev_info(&pf->pdev->dev,
10282 "couldn't get PF vsi config, err %pe aq_err %s\n",
10283 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
10284 return;
10285 }
10286 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10287 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10288 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10289
10290 ret = i40e_aq_update_vsi_params(hw: &vsi->back->hw, vsi_ctx: &ctxt, NULL);
10291 if (ret) {
10292 dev_info(&pf->pdev->dev,
10293 "update vsi switch failed, err %pe aq_err %s\n",
10294 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
10295 }
10296}
10297
10298/**
10299 * i40e_disable_pf_switch_lb
10300 * @pf: pointer to the PF structure
10301 *
10302 * disable switch loop back or die - no point in a return value
10303 **/
10304static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
10305{
10306 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
10307 struct i40e_vsi_context ctxt;
10308 int ret;
10309
10310 ctxt.seid = pf->main_vsi_seid;
10311 ctxt.pf_num = pf->hw.pf_id;
10312 ctxt.vf_num = 0;
10313 ret = i40e_aq_get_vsi_params(hw: &pf->hw, vsi_ctx: &ctxt, NULL);
10314 if (ret) {
10315 dev_info(&pf->pdev->dev,
10316 "couldn't get PF vsi config, err %pe aq_err %s\n",
10317 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
10318 return;
10319 }
10320 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10321 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10322 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10323
10324 ret = i40e_aq_update_vsi_params(hw: &vsi->back->hw, vsi_ctx: &ctxt, NULL);
10325 if (ret) {
10326 dev_info(&pf->pdev->dev,
10327 "update vsi switch failed, err %pe aq_err %s\n",
10328 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
10329 }
10330}
10331
10332/**
10333 * i40e_config_bridge_mode - Configure the HW bridge mode
10334 * @veb: pointer to the bridge instance
10335 *
10336 * Configure the loop back mode for the LAN VSI that is downlink to the
10337 * specified HW bridge instance. It is expected this function is called
10338 * when a new HW bridge is instantiated.
10339 **/
10340static void i40e_config_bridge_mode(struct i40e_veb *veb)
10341{
10342 struct i40e_pf *pf = veb->pf;
10343
10344 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
10345 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
10346 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10347 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
10348 i40e_disable_pf_switch_lb(pf);
10349 else
10350 i40e_enable_pf_switch_lb(pf);
10351}
10352
10353/**
10354 * i40e_reconstitute_veb - rebuild the VEB and VSIs connected to it
10355 * @veb: pointer to the VEB instance
10356 *
10357 * This is a function that builds the attached VSIs. We track the connections
10358 * through our own index numbers because the seid's from the HW could change
10359 * across the reset.
10360 **/
10361static int i40e_reconstitute_veb(struct i40e_veb *veb)
10362{
10363 struct i40e_vsi *ctl_vsi = NULL;
10364 struct i40e_pf *pf = veb->pf;
10365 struct i40e_vsi *vsi;
10366 int v, ret;
10367
10368 /* As we do not maintain PV (port virtualizer) switch element then
10369 * there can be only one non-floating VEB that have uplink to MAC SEID
10370 * and its control VSI is the main one.
10371 */
10372 if (WARN_ON(veb->uplink_seid && veb->uplink_seid != pf->mac_seid)) {
10373 dev_err(&pf->pdev->dev,
10374 "Invalid uplink SEID for VEB %d\n", veb->idx);
10375 return -ENOENT;
10376 }
10377
10378 if (veb->uplink_seid == pf->mac_seid) {
10379 /* Check that the LAN VSI has VEB owning flag set */
10380 ctl_vsi = i40e_pf_get_main_vsi(pf);
10381
10382 if (WARN_ON(ctl_vsi->veb_idx != veb->idx ||
10383 !(ctl_vsi->flags & I40E_VSI_FLAG_VEB_OWNER))) {
10384 dev_err(&pf->pdev->dev,
10385 "Invalid control VSI for VEB %d\n", veb->idx);
10386 return -ENOENT;
10387 }
10388
10389 /* Add the control VSI to switch */
10390 ret = i40e_add_vsi(vsi: ctl_vsi);
10391 if (ret) {
10392 dev_err(&pf->pdev->dev,
10393 "Rebuild of owner VSI for VEB %d failed: %d\n",
10394 veb->idx, ret);
10395 return ret;
10396 }
10397
10398 i40e_vsi_reset_stats(vsi: ctl_vsi);
10399 }
10400
10401 /* create the VEB in the switch and move the VSI onto the VEB */
10402 ret = i40e_add_veb(veb, vsi: ctl_vsi);
10403 if (ret)
10404 return ret;
10405
10406 if (veb->uplink_seid) {
10407 if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags))
10408 veb->bridge_mode = BRIDGE_MODE_VEB;
10409 else
10410 veb->bridge_mode = BRIDGE_MODE_VEPA;
10411 i40e_config_bridge_mode(veb);
10412 }
10413
10414 /* create the remaining VSIs attached to this VEB */
10415 i40e_pf_for_each_vsi(pf, v, vsi) {
10416 if (vsi == ctl_vsi)
10417 continue;
10418
10419 if (vsi->veb_idx == veb->idx) {
10420 vsi->uplink_seid = veb->seid;
10421 ret = i40e_add_vsi(vsi);
10422 if (ret) {
10423 dev_info(&pf->pdev->dev,
10424 "rebuild of vsi_idx %d failed: %d\n",
10425 v, ret);
10426 return ret;
10427 }
10428 i40e_vsi_reset_stats(vsi);
10429 }
10430 }
10431
10432 return ret;
10433}
10434
10435/**
10436 * i40e_get_capabilities - get info about the HW
10437 * @pf: the PF struct
10438 * @list_type: AQ capability to be queried
10439 **/
10440static int i40e_get_capabilities(struct i40e_pf *pf,
10441 enum i40e_admin_queue_opc list_type)
10442{
10443 struct libie_aqc_list_caps_elem *cap_buf;
10444 u16 data_size;
10445 int buf_len;
10446 int err;
10447
10448 buf_len = 40 * sizeof(struct libie_aqc_list_caps_elem);
10449 do {
10450 cap_buf = kzalloc(buf_len, GFP_KERNEL);
10451 if (!cap_buf)
10452 return -ENOMEM;
10453
10454 /* this loads the data into the hw struct for us */
10455 err = i40e_aq_discover_capabilities(hw: &pf->hw, buff: cap_buf, buff_size: buf_len,
10456 data_size: &data_size, list_type_opc: list_type,
10457 NULL);
10458 /* data loaded, buffer no longer needed */
10459 kfree(objp: cap_buf);
10460
10461 if (pf->hw.aq.asq_last_status == LIBIE_AQ_RC_ENOMEM) {
10462 /* retry with a larger buffer */
10463 buf_len = data_size;
10464 } else if (pf->hw.aq.asq_last_status != LIBIE_AQ_RC_OK || err) {
10465 dev_info(&pf->pdev->dev,
10466 "capability discovery failed, err %pe aq_err %s\n",
10467 ERR_PTR(err),
10468 libie_aq_str(pf->hw.aq.asq_last_status));
10469 return -ENODEV;
10470 }
10471 } while (err);
10472
10473 if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10474 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10475 dev_info(&pf->pdev->dev,
10476 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10477 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10478 pf->hw.func_caps.num_msix_vectors,
10479 pf->hw.func_caps.num_msix_vectors_vf,
10480 pf->hw.func_caps.fd_filters_guaranteed,
10481 pf->hw.func_caps.fd_filters_best_effort,
10482 pf->hw.func_caps.num_tx_qp,
10483 pf->hw.func_caps.num_vsis);
10484 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
10485 dev_info(&pf->pdev->dev,
10486 "switch_mode=0x%04x, function_valid=0x%08x\n",
10487 pf->hw.dev_caps.switch_mode,
10488 pf->hw.dev_caps.valid_functions);
10489 dev_info(&pf->pdev->dev,
10490 "SR-IOV=%d, num_vfs for all function=%u\n",
10491 pf->hw.dev_caps.sr_iov_1_1,
10492 pf->hw.dev_caps.num_vfs);
10493 dev_info(&pf->pdev->dev,
10494 "num_vsis=%u, num_rx:%u, num_tx=%u\n",
10495 pf->hw.dev_caps.num_vsis,
10496 pf->hw.dev_caps.num_rx_qp,
10497 pf->hw.dev_caps.num_tx_qp);
10498 }
10499 }
10500 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10501#define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10502 + pf->hw.func_caps.num_vfs)
10503 if (pf->hw.revision_id == 0 &&
10504 pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10505 dev_info(&pf->pdev->dev,
10506 "got num_vsis %d, setting num_vsis to %d\n",
10507 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10508 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10509 }
10510 }
10511 return 0;
10512}
10513
10514static int i40e_vsi_clear(struct i40e_vsi *vsi);
10515
10516/**
10517 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
10518 * @pf: board private structure
10519 **/
10520static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10521{
10522 struct i40e_vsi *main_vsi, *vsi;
10523
10524 /* quick workaround for an NVM issue that leaves a critical register
10525 * uninitialized
10526 */
10527 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10528 static const u32 hkey[] = {
10529 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
10530 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
10531 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
10532 0x95b3a76d};
10533 int i;
10534
10535 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
10536 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10537 }
10538
10539 if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
10540 return;
10541
10542 /* find existing VSI and see if it needs configuring */
10543 vsi = i40e_find_vsi_by_type(pf, type: I40E_VSI_FDIR);
10544
10545 /* create a new VSI if none exists */
10546 if (!vsi) {
10547 main_vsi = i40e_pf_get_main_vsi(pf);
10548 vsi = i40e_vsi_setup(pf, type: I40E_VSI_FDIR, uplink: main_vsi->seid, param1: 0);
10549 if (!vsi) {
10550 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10551 clear_bit(nr: I40E_FLAG_FD_SB_ENA, addr: pf->flags);
10552 set_bit(nr: I40E_FLAG_FD_SB_INACTIVE, addr: pf->flags);
10553 return;
10554 }
10555 }
10556
10557 i40e_vsi_setup_irqhandler(vsi, irq_handler: i40e_fdir_clean_ring);
10558}
10559
10560/**
10561 * i40e_fdir_teardown - release the Flow Director resources
10562 * @pf: board private structure
10563 **/
10564static void i40e_fdir_teardown(struct i40e_pf *pf)
10565{
10566 struct i40e_vsi *vsi;
10567
10568 i40e_fdir_filter_exit(pf);
10569 vsi = i40e_find_vsi_by_type(pf, type: I40E_VSI_FDIR);
10570 if (vsi)
10571 i40e_vsi_release(vsi);
10572}
10573
10574/**
10575 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
10576 * @vsi: PF main vsi
10577 * @seid: seid of main or channel VSIs
10578 *
10579 * Rebuilds cloud filters associated with main VSI and channel VSIs if they
10580 * existed before reset
10581 **/
10582static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
10583{
10584 struct i40e_cloud_filter *cfilter;
10585 struct i40e_pf *pf = vsi->back;
10586 struct hlist_node *node;
10587 int ret;
10588
10589 /* Add cloud filters back if they exist */
10590 hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10591 cloud_node) {
10592 if (cfilter->seid != seid)
10593 continue;
10594
10595 if (cfilter->dst_port)
10596 ret = i40e_add_del_cloud_filter_big_buf(vsi, filter: cfilter,
10597 add: true);
10598 else
10599 ret = i40e_add_del_cloud_filter(vsi, filter: cfilter, add: true);
10600
10601 if (ret) {
10602 dev_dbg(&pf->pdev->dev,
10603 "Failed to rebuild cloud filter, err %pe aq_err %s\n",
10604 ERR_PTR(ret),
10605 libie_aq_str(pf->hw.aq.asq_last_status));
10606 return ret;
10607 }
10608 }
10609 return 0;
10610}
10611
10612/**
10613 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
10614 * @vsi: PF main vsi
10615 *
10616 * Rebuilds channel VSIs if they existed before reset
10617 **/
10618static int i40e_rebuild_channels(struct i40e_vsi *vsi)
10619{
10620 struct i40e_channel *ch, *ch_tmp;
10621 int ret;
10622
10623 if (list_empty(head: &vsi->ch_list))
10624 return 0;
10625
10626 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
10627 if (!ch->initialized)
10628 break;
10629 /* Proceed with creation of channel (VMDq2) VSI */
10630 ret = i40e_add_channel(pf: vsi->back, uplink_seid: vsi->uplink_seid, ch);
10631 if (ret) {
10632 dev_info(&vsi->back->pdev->dev,
10633 "failed to rebuild channels using uplink_seid %u\n",
10634 vsi->uplink_seid);
10635 return ret;
10636 }
10637 /* Reconfigure TX queues using QTX_CTL register */
10638 ret = i40e_channel_config_tx_ring(pf: vsi->back, vsi, ch);
10639 if (ret) {
10640 dev_info(&vsi->back->pdev->dev,
10641 "failed to configure TX rings for channel %u\n",
10642 ch->seid);
10643 return ret;
10644 }
10645 /* update 'next_base_queue' */
10646 vsi->next_base_queue = vsi->next_base_queue +
10647 ch->num_queue_pairs;
10648 if (ch->max_tx_rate) {
10649 u64 credits = ch->max_tx_rate;
10650
10651 if (i40e_set_bw_limit(vsi, seid: ch->seid,
10652 max_tx_rate: ch->max_tx_rate))
10653 return -EINVAL;
10654
10655 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10656 dev_dbg(&vsi->back->pdev->dev,
10657 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10658 ch->max_tx_rate,
10659 credits,
10660 ch->seid);
10661 }
10662 ret = i40e_rebuild_cloud_filters(vsi, seid: ch->seid);
10663 if (ret) {
10664 dev_dbg(&vsi->back->pdev->dev,
10665 "Failed to rebuild cloud filters for channel VSI %u\n",
10666 ch->seid);
10667 return ret;
10668 }
10669 }
10670 return 0;
10671}
10672
10673/**
10674 * i40e_clean_xps_state - clean xps state for every tx_ring
10675 * @vsi: ptr to the VSI
10676 **/
10677static void i40e_clean_xps_state(struct i40e_vsi *vsi)
10678{
10679 int i;
10680
10681 if (vsi->tx_rings)
10682 for (i = 0; i < vsi->num_queue_pairs; i++)
10683 if (vsi->tx_rings[i])
10684 clear_bit(nr: __I40E_TX_XPS_INIT_DONE,
10685 addr: vsi->tx_rings[i]->state);
10686}
10687
10688/**
10689 * i40e_prep_for_reset - prep for the core to reset
10690 * @pf: board private structure
10691 *
10692 * Close up the VFs and other things in prep for PF Reset.
10693 **/
10694static void i40e_prep_for_reset(struct i40e_pf *pf)
10695{
10696 struct i40e_hw *hw = &pf->hw;
10697 struct i40e_vsi *vsi;
10698 int ret = 0;
10699 u32 v;
10700
10701 clear_bit(nr: __I40E_RESET_INTR_RECEIVED, addr: pf->state);
10702 if (test_and_set_bit(nr: __I40E_RESET_RECOVERY_PENDING, addr: pf->state))
10703 return;
10704 if (i40e_check_asq_alive(hw: &pf->hw))
10705 i40e_vc_notify_reset(pf);
10706
10707 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10708
10709 /* quiesce the VSIs and their queues that are not already DOWN */
10710 i40e_pf_quiesce_all_vsi(pf);
10711
10712 i40e_pf_for_each_vsi(pf, v, vsi) {
10713 i40e_clean_xps_state(vsi);
10714 vsi->seid = 0;
10715 }
10716
10717 i40e_shutdown_adminq(hw: &pf->hw);
10718
10719 /* call shutdown HMC */
10720 if (hw->hmc.hmc_obj) {
10721 ret = i40e_shutdown_lan_hmc(hw);
10722 if (ret)
10723 dev_warn(&pf->pdev->dev,
10724 "shutdown_lan_hmc failed: %d\n", ret);
10725 }
10726
10727 /* Save the current PTP time so that we can restore the time after the
10728 * reset completes.
10729 */
10730 i40e_ptp_save_hw_time(pf);
10731}
10732
10733/**
10734 * i40e_send_version - update firmware with driver version
10735 * @pf: PF struct
10736 */
10737static void i40e_send_version(struct i40e_pf *pf)
10738{
10739 struct i40e_driver_version dv;
10740
10741 dv.major_version = 0xff;
10742 dv.minor_version = 0xff;
10743 dv.build_version = 0xff;
10744 dv.subbuild_version = 0;
10745 strscpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string));
10746 i40e_aq_send_driver_version(hw: &pf->hw, dv: &dv, NULL);
10747}
10748
10749/**
10750 * i40e_get_oem_version - get OEM specific version information
10751 * @hw: pointer to the hardware structure
10752 **/
10753static void i40e_get_oem_version(struct i40e_hw *hw)
10754{
10755 u16 block_offset = 0xffff;
10756 u16 block_length = 0;
10757 u16 capabilities = 0;
10758 u16 gen_snap = 0;
10759 u16 release = 0;
10760
10761#define I40E_SR_NVM_OEM_VERSION_PTR 0x1B
10762#define I40E_NVM_OEM_LENGTH_OFFSET 0x00
10763#define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01
10764#define I40E_NVM_OEM_GEN_OFFSET 0x02
10765#define I40E_NVM_OEM_RELEASE_OFFSET 0x03
10766#define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F
10767#define I40E_NVM_OEM_LENGTH 3
10768
10769 /* Check if pointer to OEM version block is valid. */
10770 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, data: &block_offset);
10771 if (block_offset == 0xffff)
10772 return;
10773
10774 /* Check if OEM version block has correct length. */
10775 i40e_read_nvm_word(hw, offset: block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
10776 data: &block_length);
10777 if (block_length < I40E_NVM_OEM_LENGTH)
10778 return;
10779
10780 /* Check if OEM version format is as expected. */
10781 i40e_read_nvm_word(hw, offset: block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
10782 data: &capabilities);
10783 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
10784 return;
10785
10786 i40e_read_nvm_word(hw, offset: block_offset + I40E_NVM_OEM_GEN_OFFSET,
10787 data: &gen_snap);
10788 i40e_read_nvm_word(hw, offset: block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
10789 data: &release);
10790 hw->nvm.oem_ver =
10791 FIELD_PREP(I40E_OEM_GEN_MASK | I40E_OEM_SNAP_MASK, gen_snap) |
10792 FIELD_PREP(I40E_OEM_RELEASE_MASK, release);
10793 hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
10794}
10795
10796/**
10797 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10798 * @pf: board private structure
10799 **/
10800static int i40e_reset(struct i40e_pf *pf)
10801{
10802 struct i40e_hw *hw = &pf->hw;
10803 int ret;
10804
10805 ret = i40e_pf_reset(hw);
10806 if (ret) {
10807 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10808 set_bit(nr: __I40E_RESET_FAILED, addr: pf->state);
10809 clear_bit(nr: __I40E_RESET_RECOVERY_PENDING, addr: pf->state);
10810 } else {
10811 pf->pfr_count++;
10812 }
10813 return ret;
10814}
10815
10816/**
10817 * i40e_rebuild - rebuild using a saved config
10818 * @pf: board private structure
10819 * @reinit: if the Main VSI needs to re-initialized.
10820 * @lock_acquired: indicates whether or not the lock has been acquired
10821 * before this function was called.
10822 **/
10823static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10824{
10825 const bool is_recovery_mode_reported = i40e_check_recovery_mode(pf);
10826 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
10827 struct i40e_hw *hw = &pf->hw;
10828 struct i40e_veb *veb;
10829 int ret;
10830 u32 val;
10831 int v;
10832
10833 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10834 is_recovery_mode_reported)
10835 i40e_set_ethtool_ops(netdev: vsi->netdev);
10836
10837 if (test_bit(__I40E_DOWN, pf->state) &&
10838 !test_bit(__I40E_RECOVERY_MODE, pf->state))
10839 goto clear_recovery;
10840 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10841
10842 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
10843 ret = i40e_init_adminq(hw: &pf->hw);
10844 if (ret) {
10845 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %pe aq_err %s\n",
10846 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
10847 goto clear_recovery;
10848 }
10849 i40e_get_oem_version(hw: &pf->hw);
10850
10851 if (test_and_clear_bit(nr: __I40E_EMP_RESET_INTR_RECEIVED, addr: pf->state)) {
10852 /* The following delay is necessary for firmware update. */
10853 mdelay(1000);
10854 }
10855
10856 /* re-verify the eeprom if we just had an EMP reset */
10857 if (test_and_clear_bit(nr: __I40E_EMP_RESET_INTR_RECEIVED, addr: pf->state))
10858 i40e_verify_eeprom(pf);
10859
10860 /* if we are going out of or into recovery mode we have to act
10861 * accordingly with regard to resources initialization
10862 * and deinitialization
10863 */
10864 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10865 if (i40e_get_capabilities(pf,
10866 list_type: i40e_aqc_opc_list_func_capabilities))
10867 goto end_unlock;
10868
10869 if (is_recovery_mode_reported) {
10870 /* we're staying in recovery mode so we'll reinitialize
10871 * misc vector here
10872 */
10873 if (i40e_setup_misc_vector_for_recovery_mode(pf))
10874 goto end_unlock;
10875 } else {
10876 if (!lock_acquired)
10877 rtnl_lock();
10878 /* we're going out of recovery mode so we'll free
10879 * the IRQ allocated specifically for recovery mode
10880 * and restore the interrupt scheme
10881 */
10882 free_irq(pf->pdev->irq, pf);
10883 i40e_clear_interrupt_scheme(pf);
10884 if (i40e_restore_interrupt_scheme(pf))
10885 goto end_unlock;
10886 }
10887
10888 /* tell the firmware that we're starting */
10889 i40e_send_version(pf);
10890
10891 /* bail out in case recovery mode was detected, as there is
10892 * no need for further configuration.
10893 */
10894 goto end_unlock;
10895 }
10896
10897 i40e_clear_pxe_mode(hw);
10898 ret = i40e_get_capabilities(pf, list_type: i40e_aqc_opc_list_func_capabilities);
10899 if (ret)
10900 goto end_core_reset;
10901
10902 ret = i40e_init_lan_hmc(hw, txq_num: hw->func_caps.num_tx_qp,
10903 rxq_num: hw->func_caps.num_rx_qp, fcoe_cntx_num: 0, fcoe_filt_num: 0);
10904 if (ret) {
10905 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10906 goto end_core_reset;
10907 }
10908 ret = i40e_configure_lan_hmc(hw, model: I40E_HMC_MODEL_DIRECT_ONLY);
10909 if (ret) {
10910 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10911 goto end_core_reset;
10912 }
10913
10914#ifdef CONFIG_I40E_DCB
10915 /* Enable FW to write a default DCB config on link-up
10916 * unless I40E_FLAG_TC_MQPRIO was enabled or DCB
10917 * is not supported with new link speed
10918 */
10919 if (i40e_is_tc_mqprio_enabled(pf)) {
10920 i40e_aq_set_dcb_parameters(hw, dcb_enable: false, NULL);
10921 } else {
10922 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
10923 (hw->phy.link_info.link_speed &
10924 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
10925 i40e_aq_set_dcb_parameters(hw, dcb_enable: false, NULL);
10926 dev_warn(&pf->pdev->dev,
10927 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
10928 clear_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
10929 } else {
10930 i40e_aq_set_dcb_parameters(hw, dcb_enable: true, NULL);
10931 ret = i40e_init_pf_dcb(pf);
10932 if (ret) {
10933 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10934 ret);
10935 clear_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
10936 /* Continue without DCB enabled */
10937 }
10938 }
10939 }
10940
10941#endif /* CONFIG_I40E_DCB */
10942 if (!lock_acquired)
10943 rtnl_lock();
10944 ret = i40e_setup_pf_switch(pf, reinit, lock_acquired: true);
10945 if (ret)
10946 goto end_unlock;
10947
10948 /* The driver only wants link up/down and module qualification
10949 * reports from firmware. Note the negative logic.
10950 */
10951 ret = i40e_aq_set_phy_int_mask(hw: &pf->hw,
10952 mask: ~(I40E_AQ_EVENT_LINK_UPDOWN |
10953 I40E_AQ_EVENT_MEDIA_NA |
10954 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10955 if (ret)
10956 dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
10957 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
10958
10959 /* Rebuild the VSIs and VEBs that existed before reset.
10960 * They are still in our local switch element arrays, so only
10961 * need to rebuild the switch model in the HW.
10962 *
10963 * If there were VEBs but the reconstitution failed, we'll try
10964 * to recover minimal use by getting the basic PF VSI working.
10965 */
10966 if (vsi->uplink_seid != pf->mac_seid) {
10967 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
10968
10969 /* Rebuild VEBs */
10970 i40e_pf_for_each_veb(pf, v, veb) {
10971 ret = i40e_reconstitute_veb(veb);
10972 if (!ret)
10973 continue;
10974
10975 /* If Main VEB failed, we're in deep doodoo,
10976 * so give up rebuilding the switch and set up
10977 * for minimal rebuild of PF VSI.
10978 * If orphan failed, we'll report the error
10979 * but try to keep going.
10980 */
10981 if (veb->uplink_seid == pf->mac_seid) {
10982 dev_info(&pf->pdev->dev,
10983 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
10984 ret);
10985 vsi->uplink_seid = pf->mac_seid;
10986 break;
10987 } else if (veb->uplink_seid == 0) {
10988 dev_info(&pf->pdev->dev,
10989 "rebuild of orphan VEB failed: %d\n",
10990 ret);
10991 }
10992 }
10993 }
10994
10995 if (vsi->uplink_seid == pf->mac_seid) {
10996 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
10997 /* no VEB, so rebuild only the Main VSI */
10998 ret = i40e_add_vsi(vsi);
10999 if (ret) {
11000 dev_info(&pf->pdev->dev,
11001 "rebuild of Main VSI failed: %d\n", ret);
11002 goto end_unlock;
11003 }
11004 }
11005
11006 if (vsi->mqprio_qopt.max_rate[0]) {
11007 u64 max_tx_rate = i40e_bw_bytes_to_mbits(vsi,
11008 max_tx_rate: vsi->mqprio_qopt.max_rate[0]);
11009 u64 credits = 0;
11010
11011 ret = i40e_set_bw_limit(vsi, seid: vsi->seid, max_tx_rate);
11012 if (ret)
11013 goto end_unlock;
11014
11015 credits = max_tx_rate;
11016 do_div(credits, I40E_BW_CREDIT_DIVISOR);
11017 dev_dbg(&vsi->back->pdev->dev,
11018 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
11019 max_tx_rate,
11020 credits,
11021 vsi->seid);
11022 }
11023
11024 ret = i40e_rebuild_cloud_filters(vsi, seid: vsi->seid);
11025 if (ret)
11026 goto end_unlock;
11027
11028 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
11029 * for this main VSI if they exist
11030 */
11031 ret = i40e_rebuild_channels(vsi);
11032 if (ret)
11033 goto end_unlock;
11034
11035 /* Reconfigure hardware for allowing smaller MSS in the case
11036 * of TSO, so that we avoid the MDD being fired and causing
11037 * a reset in the case of small MSS+TSO.
11038 */
11039#define I40E_REG_MSS 0x000E64DC
11040#define I40E_REG_MSS_MIN_MASK 0x3FF0000
11041#define I40E_64BYTE_MSS 0x400000
11042 val = rd32(hw, I40E_REG_MSS);
11043 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11044 val &= ~I40E_REG_MSS_MIN_MASK;
11045 val |= I40E_64BYTE_MSS;
11046 wr32(hw, I40E_REG_MSS, val);
11047 }
11048
11049 if (test_bit(I40E_HW_CAP_RESTART_AUTONEG, pf->hw.caps)) {
11050 msleep(msecs: 75);
11051 ret = i40e_aq_set_link_restart_an(hw: &pf->hw, enable_link: true, NULL);
11052 if (ret)
11053 dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
11054 ERR_PTR(ret),
11055 libie_aq_str(pf->hw.aq.asq_last_status));
11056 }
11057 /* reinit the misc interrupt */
11058 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
11059 ret = i40e_setup_misc_vector(pf);
11060 if (ret)
11061 goto end_unlock;
11062 }
11063
11064 /* Add a filter to drop all Flow control frames from any VSI from being
11065 * transmitted. By doing so we stop a malicious VF from sending out
11066 * PAUSE or PFC frames and potentially controlling traffic for other
11067 * PF/VF VSIs.
11068 * The FW can still send Flow control frames if enabled.
11069 */
11070 i40e_add_filter_to_drop_tx_flow_control_frames(hw: &pf->hw,
11071 vsi_seid: pf->main_vsi_seid);
11072
11073 /* restart the VSIs that were rebuilt and running before the reset */
11074 i40e_pf_unquiesce_all_vsi(pf);
11075
11076 /* Release the RTNL lock before we start resetting VFs */
11077 if (!lock_acquired)
11078 rtnl_unlock();
11079
11080 /* Restore promiscuous settings */
11081 ret = i40e_set_promiscuous(pf, promisc: pf->cur_promisc);
11082 if (ret)
11083 dev_warn(&pf->pdev->dev,
11084 "Failed to restore promiscuous setting: %s, err %pe aq_err %s\n",
11085 pf->cur_promisc ? "on" : "off",
11086 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
11087
11088 i40e_reset_all_vfs(pf, flr: true);
11089
11090 /* tell the firmware that we're starting */
11091 i40e_send_version(pf);
11092
11093 /* We've already released the lock, so don't do it again */
11094 goto end_core_reset;
11095
11096end_unlock:
11097 if (!lock_acquired)
11098 rtnl_unlock();
11099end_core_reset:
11100 clear_bit(nr: __I40E_RESET_FAILED, addr: pf->state);
11101clear_recovery:
11102 clear_bit(nr: __I40E_RESET_RECOVERY_PENDING, addr: pf->state);
11103 clear_bit(nr: __I40E_TIMEOUT_RECOVERY_PENDING, addr: pf->state);
11104}
11105
11106/**
11107 * i40e_reset_and_rebuild - reset and rebuild using a saved config
11108 * @pf: board private structure
11109 * @reinit: if the Main VSI needs to re-initialized.
11110 * @lock_acquired: indicates whether or not the lock has been acquired
11111 * before this function was called.
11112 **/
11113static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
11114 bool lock_acquired)
11115{
11116 int ret;
11117
11118 if (test_bit(__I40E_IN_REMOVE, pf->state))
11119 return;
11120 /* Now we wait for GRST to settle out.
11121 * We don't have to delete the VEBs or VSIs from the hw switch
11122 * because the reset will make them disappear.
11123 */
11124 ret = i40e_reset(pf);
11125 if (!ret)
11126 i40e_rebuild(pf, reinit, lock_acquired);
11127 else
11128 dev_err(&pf->pdev->dev, "%s: i40e_reset() FAILED", __func__);
11129}
11130
11131/**
11132 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
11133 * @pf: board private structure
11134 *
11135 * Close up the VFs and other things in prep for a Core Reset,
11136 * then get ready to rebuild the world.
11137 * @lock_acquired: indicates whether or not the lock has been acquired
11138 * before this function was called.
11139 **/
11140static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
11141{
11142 i40e_prep_for_reset(pf);
11143 i40e_reset_and_rebuild(pf, reinit: false, lock_acquired);
11144}
11145
11146/**
11147 * i40e_print_vf_mdd_event - print VF Tx/Rx malicious driver detect event
11148 * @pf: board private structure
11149 * @vf: pointer to the VF structure
11150 * @is_tx: true - for Tx event, false - for Rx
11151 */
11152static void i40e_print_vf_mdd_event(struct i40e_pf *pf, struct i40e_vf *vf,
11153 bool is_tx)
11154{
11155 dev_err(&pf->pdev->dev, is_tx ?
11156 "%lld Tx Malicious Driver Detection events detected on PF %d VF %d MAC %pm. mdd-auto-reset-vfs=%s\n" :
11157 "%lld Rx Malicious Driver Detection events detected on PF %d VF %d MAC %pm. mdd-auto-reset-vfs=%s\n",
11158 is_tx ? vf->mdd_tx_events.count : vf->mdd_rx_events.count,
11159 pf->hw.pf_id,
11160 vf->vf_id,
11161 vf->default_lan_addr.addr,
11162 str_on_off(test_bit(I40E_FLAG_MDD_AUTO_RESET_VF, pf->flags)));
11163}
11164
11165/**
11166 * i40e_print_vfs_mdd_events - print VFs malicious driver detect event
11167 * @pf: pointer to the PF structure
11168 *
11169 * Called from i40e_handle_mdd_event to rate limit and print VFs MDD events.
11170 */
11171static void i40e_print_vfs_mdd_events(struct i40e_pf *pf)
11172{
11173 unsigned int i;
11174
11175 /* check that there are pending MDD events to print */
11176 if (!test_and_clear_bit(nr: __I40E_MDD_VF_PRINT_PENDING, addr: pf->state))
11177 return;
11178
11179 if (!__ratelimit(&pf->mdd_message_rate_limit))
11180 return;
11181
11182 for (i = 0; i < pf->num_alloc_vfs; i++) {
11183 struct i40e_vf *vf = &pf->vf[i];
11184 bool is_printed = false;
11185
11186 /* only print Rx MDD event message if there are new events */
11187 if (vf->mdd_rx_events.count != vf->mdd_rx_events.last_printed) {
11188 vf->mdd_rx_events.last_printed = vf->mdd_rx_events.count;
11189 i40e_print_vf_mdd_event(pf, vf, is_tx: false);
11190 is_printed = true;
11191 }
11192
11193 /* only print Tx MDD event message if there are new events */
11194 if (vf->mdd_tx_events.count != vf->mdd_tx_events.last_printed) {
11195 vf->mdd_tx_events.last_printed = vf->mdd_tx_events.count;
11196 i40e_print_vf_mdd_event(pf, vf, is_tx: true);
11197 is_printed = true;
11198 }
11199
11200 if (is_printed && !test_bit(I40E_FLAG_MDD_AUTO_RESET_VF, pf->flags))
11201 dev_info(&pf->pdev->dev,
11202 "Use PF Control I/F to re-enable the VF #%d\n",
11203 i);
11204 }
11205}
11206
11207/**
11208 * i40e_handle_mdd_event
11209 * @pf: pointer to the PF structure
11210 *
11211 * Called from the MDD irq handler to identify possibly malicious vfs
11212 **/
11213static void i40e_handle_mdd_event(struct i40e_pf *pf)
11214{
11215 struct i40e_hw *hw = &pf->hw;
11216 bool mdd_detected = false;
11217 struct i40e_vf *vf;
11218 u32 reg;
11219 int i;
11220
11221 if (!test_and_clear_bit(nr: __I40E_MDD_EVENT_PENDING, addr: pf->state)) {
11222 /* Since the VF MDD event logging is rate limited, check if
11223 * there are pending MDD events.
11224 */
11225 i40e_print_vfs_mdd_events(pf);
11226 return;
11227 }
11228
11229 /* find what triggered the MDD event */
11230 reg = rd32(hw, I40E_GL_MDET_TX);
11231 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
11232 u8 pf_num = FIELD_GET(I40E_GL_MDET_TX_PF_NUM_MASK, reg);
11233 u16 vf_num = FIELD_GET(I40E_GL_MDET_TX_VF_NUM_MASK, reg);
11234 u8 event = FIELD_GET(I40E_GL_MDET_TX_EVENT_MASK, reg);
11235 u16 queue = FIELD_GET(I40E_GL_MDET_TX_QUEUE_MASK, reg) -
11236 pf->hw.func_caps.base_queue;
11237 if (netif_msg_tx_err(pf))
11238 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
11239 event, queue, pf_num, vf_num);
11240 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
11241 mdd_detected = true;
11242 }
11243 reg = rd32(hw, I40E_GL_MDET_RX);
11244 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
11245 u8 func = FIELD_GET(I40E_GL_MDET_RX_FUNCTION_MASK, reg);
11246 u8 event = FIELD_GET(I40E_GL_MDET_RX_EVENT_MASK, reg);
11247 u16 queue = FIELD_GET(I40E_GL_MDET_RX_QUEUE_MASK, reg) -
11248 pf->hw.func_caps.base_queue;
11249 if (netif_msg_rx_err(pf))
11250 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
11251 event, queue, func);
11252 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
11253 mdd_detected = true;
11254 }
11255
11256 if (mdd_detected) {
11257 reg = rd32(hw, I40E_PF_MDET_TX);
11258 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
11259 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
11260 dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
11261 }
11262 reg = rd32(hw, I40E_PF_MDET_RX);
11263 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
11264 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
11265 dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
11266 }
11267 }
11268
11269 /* see if one of the VFs needs its hand slapped */
11270 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
11271 bool is_mdd_on_tx = false;
11272 bool is_mdd_on_rx = false;
11273
11274 vf = &(pf->vf[i]);
11275 reg = rd32(hw, I40E_VP_MDET_TX(i));
11276 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
11277 set_bit(nr: __I40E_MDD_VF_PRINT_PENDING, addr: pf->state);
11278 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
11279 vf->mdd_tx_events.count++;
11280 set_bit(nr: I40E_VF_STATE_DISABLED, addr: &vf->vf_states);
11281 is_mdd_on_tx = true;
11282 }
11283
11284 reg = rd32(hw, I40E_VP_MDET_RX(i));
11285 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
11286 set_bit(nr: __I40E_MDD_VF_PRINT_PENDING, addr: pf->state);
11287 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
11288 vf->mdd_rx_events.count++;
11289 set_bit(nr: I40E_VF_STATE_DISABLED, addr: &vf->vf_states);
11290 is_mdd_on_rx = true;
11291 }
11292
11293 if ((is_mdd_on_tx || is_mdd_on_rx) &&
11294 test_bit(I40E_FLAG_MDD_AUTO_RESET_VF, pf->flags)) {
11295 /* VF MDD event counters will be cleared by
11296 * reset, so print the event prior to reset.
11297 */
11298 if (is_mdd_on_rx)
11299 i40e_print_vf_mdd_event(pf, vf, is_tx: false);
11300 if (is_mdd_on_tx)
11301 i40e_print_vf_mdd_event(pf, vf, is_tx: true);
11302
11303 i40e_vc_reset_vf(vf, notify_vf: true);
11304 }
11305 }
11306
11307 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
11308 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
11309 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
11310 i40e_flush(hw);
11311
11312 i40e_print_vfs_mdd_events(pf);
11313}
11314
11315/**
11316 * i40e_service_task - Run the driver's async subtasks
11317 * @work: pointer to work_struct containing our data
11318 **/
11319static void i40e_service_task(struct work_struct *work)
11320{
11321 struct i40e_pf *pf = container_of(work,
11322 struct i40e_pf,
11323 service_task);
11324 unsigned long start_time = jiffies;
11325
11326 /* don't bother with service tasks if a reset is in progress */
11327 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
11328 test_bit(__I40E_SUSPENDED, pf->state))
11329 return;
11330
11331 if (test_and_set_bit(nr: __I40E_SERVICE_SCHED, addr: pf->state))
11332 return;
11333
11334 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
11335 i40e_detect_recover_hung(pf);
11336 i40e_sync_filters_subtask(pf);
11337 i40e_reset_subtask(pf);
11338 i40e_handle_mdd_event(pf);
11339 i40e_vc_process_vflr_event(pf);
11340 i40e_watchdog_subtask(pf);
11341 i40e_fdir_reinit_subtask(pf);
11342 if (test_and_clear_bit(nr: __I40E_CLIENT_RESET, addr: pf->state)) {
11343 /* Client subtask will reopen next time through. */
11344 i40e_notify_client_of_netdev_close(pf, reset: true);
11345 } else {
11346 i40e_client_subtask(pf);
11347 if (test_and_clear_bit(nr: __I40E_CLIENT_L2_CHANGE,
11348 addr: pf->state))
11349 i40e_notify_client_of_l2_param_changes(pf);
11350 }
11351 i40e_sync_filters_subtask(pf);
11352 } else {
11353 i40e_reset_subtask(pf);
11354 }
11355
11356 i40e_clean_adminq_subtask(pf);
11357
11358 /* flush memory to make sure state is correct before next watchdog */
11359 smp_mb__before_atomic();
11360 clear_bit(nr: __I40E_SERVICE_SCHED, addr: pf->state);
11361
11362 /* If the tasks have taken longer than one timer cycle or there
11363 * is more work to be done, reschedule the service task now
11364 * rather than wait for the timer to tick again.
11365 */
11366 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
11367 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) ||
11368 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) ||
11369 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
11370 i40e_service_event_schedule(pf);
11371}
11372
11373/**
11374 * i40e_service_timer - timer callback
11375 * @t: timer list pointer
11376 **/
11377static void i40e_service_timer(struct timer_list *t)
11378{
11379 struct i40e_pf *pf = timer_container_of(pf, t, service_timer);
11380
11381 mod_timer(timer: &pf->service_timer,
11382 expires: round_jiffies(j: jiffies + pf->service_timer_period));
11383 i40e_service_event_schedule(pf);
11384}
11385
11386/**
11387 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
11388 * @vsi: the VSI being configured
11389 **/
11390static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
11391{
11392 struct i40e_pf *pf = vsi->back;
11393
11394 switch (vsi->type) {
11395 case I40E_VSI_MAIN:
11396 vsi->alloc_queue_pairs = pf->num_lan_qps;
11397 if (!vsi->num_tx_desc)
11398 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11399 I40E_REQ_DESCRIPTOR_MULTIPLE);
11400 if (!vsi->num_rx_desc)
11401 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11402 I40E_REQ_DESCRIPTOR_MULTIPLE);
11403 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
11404 vsi->num_q_vectors = pf->num_lan_msix;
11405 else
11406 vsi->num_q_vectors = 1;
11407
11408 break;
11409
11410 case I40E_VSI_FDIR:
11411 vsi->alloc_queue_pairs = 1;
11412 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11413 I40E_REQ_DESCRIPTOR_MULTIPLE);
11414 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11415 I40E_REQ_DESCRIPTOR_MULTIPLE);
11416 vsi->num_q_vectors = pf->num_fdsb_msix;
11417 break;
11418
11419 case I40E_VSI_VMDQ2:
11420 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
11421 if (!vsi->num_tx_desc)
11422 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11423 I40E_REQ_DESCRIPTOR_MULTIPLE);
11424 if (!vsi->num_rx_desc)
11425 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11426 I40E_REQ_DESCRIPTOR_MULTIPLE);
11427 vsi->num_q_vectors = pf->num_vmdq_msix;
11428 break;
11429
11430 case I40E_VSI_SRIOV:
11431 vsi->alloc_queue_pairs = pf->num_vf_qps;
11432 if (!vsi->num_tx_desc)
11433 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11434 I40E_REQ_DESCRIPTOR_MULTIPLE);
11435 if (!vsi->num_rx_desc)
11436 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11437 I40E_REQ_DESCRIPTOR_MULTIPLE);
11438 break;
11439
11440 default:
11441 WARN_ON(1);
11442 return -ENODATA;
11443 }
11444
11445 if (is_kdump_kernel()) {
11446 vsi->num_tx_desc = I40E_MIN_NUM_DESCRIPTORS;
11447 vsi->num_rx_desc = I40E_MIN_NUM_DESCRIPTORS;
11448 }
11449
11450 return 0;
11451}
11452
11453/**
11454 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
11455 * @vsi: VSI pointer
11456 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
11457 *
11458 * On error: returns error code (negative)
11459 * On success: returns 0
11460 **/
11461static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
11462{
11463 struct i40e_ring **next_rings;
11464 int size;
11465 int ret = 0;
11466
11467 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
11468 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
11469 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
11470 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
11471 if (!vsi->tx_rings)
11472 return -ENOMEM;
11473 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
11474 if (i40e_enabled_xdp_vsi(vsi)) {
11475 vsi->xdp_rings = next_rings;
11476 next_rings += vsi->alloc_queue_pairs;
11477 }
11478 vsi->rx_rings = next_rings;
11479
11480 if (alloc_qvectors) {
11481 /* allocate memory for q_vector pointers */
11482 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
11483 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
11484 if (!vsi->q_vectors) {
11485 ret = -ENOMEM;
11486 goto err_vectors;
11487 }
11488 }
11489 return ret;
11490
11491err_vectors:
11492 kfree(objp: vsi->tx_rings);
11493 return ret;
11494}
11495
11496/**
11497 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
11498 * @pf: board private structure
11499 * @type: type of VSI
11500 *
11501 * On error: returns error code (negative)
11502 * On success: returns vsi index in PF (positive)
11503 **/
11504static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11505{
11506 int ret = -ENODEV;
11507 struct i40e_vsi *vsi;
11508 int vsi_idx;
11509 int i;
11510
11511 /* Need to protect the allocation of the VSIs at the PF level */
11512 mutex_lock(&pf->switch_mutex);
11513
11514 /* VSI list may be fragmented if VSI creation/destruction has
11515 * been happening. We can afford to do a quick scan to look
11516 * for any free VSIs in the list.
11517 *
11518 * find next empty vsi slot, looping back around if necessary
11519 */
11520 i = pf->next_vsi;
11521 while (i < pf->num_alloc_vsi && pf->vsi[i])
11522 i++;
11523 if (i >= pf->num_alloc_vsi) {
11524 i = 0;
11525 while (i < pf->next_vsi && pf->vsi[i])
11526 i++;
11527 }
11528
11529 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11530 vsi_idx = i; /* Found one! */
11531 } else {
11532 ret = -ENODEV;
11533 goto unlock_pf; /* out of VSI slots! */
11534 }
11535 pf->next_vsi = ++i;
11536
11537 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
11538 if (!vsi) {
11539 ret = -ENOMEM;
11540 goto unlock_pf;
11541 }
11542 vsi->type = type;
11543 vsi->back = pf;
11544 set_bit(nr: __I40E_VSI_DOWN, addr: vsi->state);
11545 vsi->flags = 0;
11546 vsi->idx = vsi_idx;
11547 vsi->int_rate_limit = 0;
11548 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
11549 pf->rss_table_size : 64;
11550 vsi->netdev_registered = false;
11551 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
11552 hash_init(vsi->mac_filter_hash);
11553 vsi->irqs_ready = false;
11554
11555 if (type == I40E_VSI_MAIN) {
11556 vsi->af_xdp_zc_qps = bitmap_zalloc(nbits: pf->num_lan_qps, GFP_KERNEL);
11557 if (!vsi->af_xdp_zc_qps)
11558 goto err_rings;
11559 }
11560
11561 ret = i40e_set_num_rings_in_vsi(vsi);
11562 if (ret)
11563 goto err_rings;
11564
11565 ret = i40e_vsi_alloc_arrays(vsi, alloc_qvectors: true);
11566 if (ret)
11567 goto err_rings;
11568
11569 /* Setup default MSIX irq handler for VSI */
11570 i40e_vsi_setup_irqhandler(vsi, irq_handler: i40e_msix_clean_rings);
11571
11572 /* Initialize VSI lock */
11573 spin_lock_init(&vsi->mac_filter_hash_lock);
11574 pf->vsi[vsi_idx] = vsi;
11575 ret = vsi_idx;
11576 goto unlock_pf;
11577
11578err_rings:
11579 bitmap_free(bitmap: vsi->af_xdp_zc_qps);
11580 pf->next_vsi = i - 1;
11581 kfree(objp: vsi);
11582unlock_pf:
11583 mutex_unlock(lock: &pf->switch_mutex);
11584 return ret;
11585}
11586
11587/**
11588 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
11589 * @vsi: VSI pointer
11590 * @free_qvectors: a bool to specify if q_vectors need to be freed.
11591 *
11592 * On error: returns error code (negative)
11593 * On success: returns 0
11594 **/
11595static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
11596{
11597 /* free the ring and vector containers */
11598 if (free_qvectors) {
11599 kfree(objp: vsi->q_vectors);
11600 vsi->q_vectors = NULL;
11601 }
11602 kfree(objp: vsi->tx_rings);
11603 vsi->tx_rings = NULL;
11604 vsi->rx_rings = NULL;
11605 vsi->xdp_rings = NULL;
11606}
11607
11608/**
11609 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
11610 * and lookup table
11611 * @vsi: Pointer to VSI structure
11612 */
11613static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
11614{
11615 if (!vsi)
11616 return;
11617
11618 kfree(objp: vsi->rss_hkey_user);
11619 vsi->rss_hkey_user = NULL;
11620
11621 kfree(objp: vsi->rss_lut_user);
11622 vsi->rss_lut_user = NULL;
11623}
11624
11625/**
11626 * i40e_vsi_clear - Deallocate the VSI provided
11627 * @vsi: the VSI being un-configured
11628 **/
11629static int i40e_vsi_clear(struct i40e_vsi *vsi)
11630{
11631 struct i40e_pf *pf;
11632
11633 if (!vsi)
11634 return 0;
11635
11636 if (!vsi->back)
11637 goto free_vsi;
11638 pf = vsi->back;
11639
11640 mutex_lock(&pf->switch_mutex);
11641 if (!pf->vsi[vsi->idx]) {
11642 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11643 vsi->idx, vsi->idx, vsi->type);
11644 goto unlock_vsi;
11645 }
11646
11647 if (pf->vsi[vsi->idx] != vsi) {
11648 dev_err(&pf->pdev->dev,
11649 "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11650 pf->vsi[vsi->idx]->idx,
11651 pf->vsi[vsi->idx]->type,
11652 vsi->idx, vsi->type);
11653 goto unlock_vsi;
11654 }
11655
11656 /* updates the PF for this cleared vsi */
11657 i40e_put_lump(pile: pf->qp_pile, index: vsi->base_queue, id: vsi->idx);
11658 i40e_put_lump(pile: pf->irq_pile, index: vsi->base_vector, id: vsi->idx);
11659
11660 bitmap_free(bitmap: vsi->af_xdp_zc_qps);
11661 i40e_vsi_free_arrays(vsi, free_qvectors: true);
11662 i40e_clear_rss_config_user(vsi);
11663
11664 pf->vsi[vsi->idx] = NULL;
11665 if (vsi->idx < pf->next_vsi)
11666 pf->next_vsi = vsi->idx;
11667
11668unlock_vsi:
11669 mutex_unlock(lock: &pf->switch_mutex);
11670free_vsi:
11671 kfree(objp: vsi);
11672
11673 return 0;
11674}
11675
11676/**
11677 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
11678 * @vsi: the VSI being cleaned
11679 **/
11680static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
11681{
11682 int i;
11683
11684 if (vsi->tx_rings && vsi->tx_rings[0]) {
11685 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11686 kfree_rcu(vsi->tx_rings[i], rcu);
11687 WRITE_ONCE(vsi->tx_rings[i], NULL);
11688 WRITE_ONCE(vsi->rx_rings[i], NULL);
11689 if (vsi->xdp_rings)
11690 WRITE_ONCE(vsi->xdp_rings[i], NULL);
11691 }
11692 }
11693}
11694
11695/**
11696 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
11697 * @vsi: the VSI being configured
11698 **/
11699static int i40e_alloc_rings(struct i40e_vsi *vsi)
11700{
11701 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
11702 struct i40e_pf *pf = vsi->back;
11703 struct i40e_ring *ring;
11704
11705 /* Set basic values in the rings to be used later during open() */
11706 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11707 /* allocate space for both Tx and Rx in one shot */
11708 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
11709 if (!ring)
11710 goto err_out;
11711
11712 ring->queue_index = i;
11713 ring->reg_idx = vsi->base_queue + i;
11714 ring->ring_active = false;
11715 ring->vsi = vsi;
11716 ring->netdev = vsi->netdev;
11717 ring->dev = &pf->pdev->dev;
11718 ring->count = vsi->num_tx_desc;
11719 ring->size = 0;
11720 ring->dcb_tc = 0;
11721 if (test_bit(I40E_HW_CAP_WB_ON_ITR, vsi->back->hw.caps))
11722 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11723 ring->itr_setting = pf->tx_itr_default;
11724 WRITE_ONCE(vsi->tx_rings[i], ring++);
11725
11726 if (!i40e_enabled_xdp_vsi(vsi))
11727 goto setup_rx;
11728
11729 ring->queue_index = vsi->alloc_queue_pairs + i;
11730 ring->reg_idx = vsi->base_queue + ring->queue_index;
11731 ring->ring_active = false;
11732 ring->vsi = vsi;
11733 ring->netdev = NULL;
11734 ring->dev = &pf->pdev->dev;
11735 ring->count = vsi->num_tx_desc;
11736 ring->size = 0;
11737 ring->dcb_tc = 0;
11738 if (test_bit(I40E_HW_CAP_WB_ON_ITR, vsi->back->hw.caps))
11739 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11740 set_ring_xdp(ring);
11741 ring->itr_setting = pf->tx_itr_default;
11742 WRITE_ONCE(vsi->xdp_rings[i], ring++);
11743
11744setup_rx:
11745 ring->queue_index = i;
11746 ring->reg_idx = vsi->base_queue + i;
11747 ring->ring_active = false;
11748 ring->vsi = vsi;
11749 ring->netdev = vsi->netdev;
11750 ring->dev = &pf->pdev->dev;
11751 ring->count = vsi->num_rx_desc;
11752 ring->size = 0;
11753 ring->dcb_tc = 0;
11754 ring->itr_setting = pf->rx_itr_default;
11755 WRITE_ONCE(vsi->rx_rings[i], ring);
11756 }
11757
11758 return 0;
11759
11760err_out:
11761 i40e_vsi_clear_rings(vsi);
11762 return -ENOMEM;
11763}
11764
11765/**
11766 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
11767 * @pf: board private structure
11768 * @vectors: the number of MSI-X vectors to request
11769 *
11770 * Returns the number of vectors reserved, or error
11771 **/
11772static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11773{
11774 vectors = pci_enable_msix_range(dev: pf->pdev, entries: pf->msix_entries,
11775 I40E_MIN_MSIX, maxvec: vectors);
11776 if (vectors < 0) {
11777 dev_info(&pf->pdev->dev,
11778 "MSI-X vector reservation failed: %d\n", vectors);
11779 vectors = 0;
11780 }
11781
11782 return vectors;
11783}
11784
11785/**
11786 * i40e_init_msix - Setup the MSIX capability
11787 * @pf: board private structure
11788 *
11789 * Work with the OS to set up the MSIX vectors needed.
11790 *
11791 * Returns the number of vectors reserved or negative on failure
11792 **/
11793static int i40e_init_msix(struct i40e_pf *pf)
11794{
11795 struct i40e_hw *hw = &pf->hw;
11796 int cpus, extra_vectors;
11797 int vectors_left;
11798 int v_budget, i;
11799 int v_actual;
11800 int iwarp_requested = 0;
11801
11802 if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
11803 return -ENODEV;
11804
11805 /* The number of vectors we'll request will be comprised of:
11806 * - Add 1 for "other" cause for Admin Queue events, etc.
11807 * - The number of LAN queue pairs
11808 * - Queues being used for RSS.
11809 * We don't need as many as max_rss_size vectors.
11810 * use rss_size instead in the calculation since that
11811 * is governed by number of cpus in the system.
11812 * - assumes symmetric Tx/Rx pairing
11813 * - The number of VMDq pairs
11814 * - The CPU count within the NUMA node if iWARP is enabled
11815 * Once we count this up, try the request.
11816 *
11817 * If we can't get what we want, we'll simplify to nearly nothing
11818 * and try again. If that still fails, we punt.
11819 */
11820 vectors_left = hw->func_caps.num_msix_vectors;
11821 v_budget = 0;
11822
11823 /* reserve one vector for miscellaneous handler */
11824 if (vectors_left) {
11825 v_budget++;
11826 vectors_left--;
11827 }
11828
11829 /* reserve some vectors for the main PF traffic queues. Initially we
11830 * only reserve at most 50% of the available vectors, in the case that
11831 * the number of online CPUs is large. This ensures that we can enable
11832 * extra features as well. Once we've enabled the other features, we
11833 * will use any remaining vectors to reach as close as we can to the
11834 * number of online CPUs.
11835 */
11836 cpus = num_online_cpus();
11837 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11838 vectors_left -= pf->num_lan_msix;
11839
11840 /* reserve one vector for sideband flow director */
11841 if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
11842 if (vectors_left) {
11843 pf->num_fdsb_msix = 1;
11844 v_budget++;
11845 vectors_left--;
11846 } else {
11847 pf->num_fdsb_msix = 0;
11848 }
11849 }
11850
11851 /* can we reserve enough for iWARP? */
11852 if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
11853 iwarp_requested = pf->num_iwarp_msix;
11854
11855 if (!vectors_left)
11856 pf->num_iwarp_msix = 0;
11857 else if (vectors_left < pf->num_iwarp_msix)
11858 pf->num_iwarp_msix = 1;
11859 v_budget += pf->num_iwarp_msix;
11860 vectors_left -= pf->num_iwarp_msix;
11861 }
11862
11863 /* any vectors left over go for VMDq support */
11864 if (test_bit(I40E_FLAG_VMDQ_ENA, pf->flags)) {
11865 if (!vectors_left) {
11866 pf->num_vmdq_msix = 0;
11867 pf->num_vmdq_qps = 0;
11868 } else {
11869 int vmdq_vecs_wanted =
11870 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11871 int vmdq_vecs =
11872 min_t(int, vectors_left, vmdq_vecs_wanted);
11873
11874 /* if we're short on vectors for what's desired, we limit
11875 * the queues per vmdq. If this is still more than are
11876 * available, the user will need to change the number of
11877 * queues/vectors used by the PF later with the ethtool
11878 * channels command
11879 */
11880 if (vectors_left < vmdq_vecs_wanted) {
11881 pf->num_vmdq_qps = 1;
11882 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11883 vmdq_vecs = min_t(int,
11884 vectors_left,
11885 vmdq_vecs_wanted);
11886 }
11887 pf->num_vmdq_msix = pf->num_vmdq_qps;
11888
11889 v_budget += vmdq_vecs;
11890 vectors_left -= vmdq_vecs;
11891 }
11892 }
11893
11894 /* On systems with a large number of SMP cores, we previously limited
11895 * the number of vectors for num_lan_msix to be at most 50% of the
11896 * available vectors, to allow for other features. Now, we add back
11897 * the remaining vectors. However, we ensure that the total
11898 * num_lan_msix will not exceed num_online_cpus(). To do this, we
11899 * calculate the number of vectors we can add without going over the
11900 * cap of CPUs. For systems with a small number of CPUs this will be
11901 * zero.
11902 */
11903 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11904 pf->num_lan_msix += extra_vectors;
11905 vectors_left -= extra_vectors;
11906
11907 WARN(vectors_left < 0,
11908 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11909
11910 v_budget += pf->num_lan_msix;
11911 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11912 GFP_KERNEL);
11913 if (!pf->msix_entries)
11914 return -ENOMEM;
11915
11916 for (i = 0; i < v_budget; i++)
11917 pf->msix_entries[i].entry = i;
11918 v_actual = i40e_reserve_msix_vectors(pf, vectors: v_budget);
11919
11920 if (v_actual < I40E_MIN_MSIX) {
11921 clear_bit(nr: I40E_FLAG_MSIX_ENA, addr: pf->flags);
11922 kfree(objp: pf->msix_entries);
11923 pf->msix_entries = NULL;
11924 pci_disable_msix(dev: pf->pdev);
11925 return -ENODEV;
11926
11927 } else if (v_actual == I40E_MIN_MSIX) {
11928 /* Adjust for minimal MSIX use */
11929 pf->num_vmdq_vsis = 0;
11930 pf->num_vmdq_qps = 0;
11931 pf->num_lan_qps = 1;
11932 pf->num_lan_msix = 1;
11933
11934 } else if (v_actual != v_budget) {
11935 /* If we have limited resources, we will start with no vectors
11936 * for the special features and then allocate vectors to some
11937 * of these features based on the policy and at the end disable
11938 * the features that did not get any vectors.
11939 */
11940 int vec;
11941
11942 dev_info(&pf->pdev->dev,
11943 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11944 v_actual, v_budget);
11945 /* reserve the misc vector */
11946 vec = v_actual - 1;
11947
11948 /* Scale vector usage down */
11949 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
11950 pf->num_vmdq_vsis = 1;
11951 pf->num_vmdq_qps = 1;
11952
11953 /* partition out the remaining vectors */
11954 switch (vec) {
11955 case 2:
11956 pf->num_lan_msix = 1;
11957 break;
11958 case 3:
11959 if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
11960 pf->num_lan_msix = 1;
11961 pf->num_iwarp_msix = 1;
11962 } else {
11963 pf->num_lan_msix = 2;
11964 }
11965 break;
11966 default:
11967 if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
11968 pf->num_iwarp_msix = min_t(int, (vec / 3),
11969 iwarp_requested);
11970 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11971 I40E_DEFAULT_NUM_VMDQ_VSI);
11972 } else {
11973 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11974 I40E_DEFAULT_NUM_VMDQ_VSI);
11975 }
11976 if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
11977 pf->num_fdsb_msix = 1;
11978 vec--;
11979 }
11980 pf->num_lan_msix = min_t(int,
11981 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11982 pf->num_lan_msix);
11983 pf->num_lan_qps = pf->num_lan_msix;
11984 break;
11985 }
11986 }
11987
11988 if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) && pf->num_fdsb_msix == 0) {
11989 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11990 clear_bit(nr: I40E_FLAG_FD_SB_ENA, addr: pf->flags);
11991 set_bit(nr: I40E_FLAG_FD_SB_INACTIVE, addr: pf->flags);
11992 }
11993 if (test_bit(I40E_FLAG_VMDQ_ENA, pf->flags) && pf->num_vmdq_msix == 0) {
11994 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11995 clear_bit(nr: I40E_FLAG_VMDQ_ENA, addr: pf->flags);
11996 }
11997
11998 if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags) &&
11999 pf->num_iwarp_msix == 0) {
12000 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
12001 clear_bit(nr: I40E_FLAG_IWARP_ENA, addr: pf->flags);
12002 }
12003 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
12004 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
12005 pf->num_lan_msix,
12006 pf->num_vmdq_msix * pf->num_vmdq_vsis,
12007 pf->num_fdsb_msix,
12008 pf->num_iwarp_msix);
12009
12010 return v_actual;
12011}
12012
12013/**
12014 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
12015 * @vsi: the VSI being configured
12016 * @v_idx: index of the vector in the vsi struct
12017 *
12018 * We allocate one q_vector. If allocation fails we return -ENOMEM.
12019 **/
12020static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
12021{
12022 struct i40e_q_vector *q_vector;
12023
12024 /* allocate q_vector */
12025 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
12026 if (!q_vector)
12027 return -ENOMEM;
12028
12029 q_vector->vsi = vsi;
12030 q_vector->v_idx = v_idx;
12031 cpumask_copy(dstp: &q_vector->affinity_mask, cpu_possible_mask);
12032
12033 if (vsi->netdev)
12034 netif_napi_add(dev: vsi->netdev, napi: &q_vector->napi, poll: i40e_napi_poll);
12035
12036 /* tie q_vector and vsi together */
12037 vsi->q_vectors[v_idx] = q_vector;
12038
12039 return 0;
12040}
12041
12042/**
12043 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
12044 * @vsi: the VSI being configured
12045 *
12046 * We allocate one q_vector per queue interrupt. If allocation fails we
12047 * return -ENOMEM.
12048 **/
12049static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
12050{
12051 struct i40e_pf *pf = vsi->back;
12052 int err, v_idx, num_q_vectors;
12053
12054 /* if not MSIX, give the one vector only to the LAN VSI */
12055 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
12056 num_q_vectors = vsi->num_q_vectors;
12057 else if (vsi->type == I40E_VSI_MAIN)
12058 num_q_vectors = 1;
12059 else
12060 return -EINVAL;
12061
12062 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
12063 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
12064 if (err)
12065 goto err_out;
12066 }
12067
12068 return 0;
12069
12070err_out:
12071 while (v_idx--)
12072 i40e_free_q_vector(vsi, v_idx);
12073
12074 return err;
12075}
12076
12077/**
12078 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
12079 * @pf: board private structure to initialize
12080 **/
12081static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
12082{
12083 int vectors = 0;
12084 ssize_t size;
12085
12086 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
12087 vectors = i40e_init_msix(pf);
12088 if (vectors < 0) {
12089 clear_bit(nr: I40E_FLAG_MSIX_ENA, addr: pf->flags);
12090 clear_bit(nr: I40E_FLAG_IWARP_ENA, addr: pf->flags);
12091 clear_bit(nr: I40E_FLAG_RSS_ENA, addr: pf->flags);
12092 clear_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
12093 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
12094 clear_bit(nr: I40E_FLAG_SRIOV_ENA, addr: pf->flags);
12095 clear_bit(nr: I40E_FLAG_FD_SB_ENA, addr: pf->flags);
12096 clear_bit(nr: I40E_FLAG_FD_ATR_ENA, addr: pf->flags);
12097 clear_bit(nr: I40E_FLAG_VMDQ_ENA, addr: pf->flags);
12098 set_bit(nr: I40E_FLAG_FD_SB_INACTIVE, addr: pf->flags);
12099
12100 /* rework the queue expectations without MSIX */
12101 i40e_determine_queue_usage(pf);
12102 }
12103 }
12104
12105 if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags) &&
12106 test_bit(I40E_FLAG_MSI_ENA, pf->flags)) {
12107 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
12108 vectors = pci_enable_msi(dev: pf->pdev);
12109 if (vectors < 0) {
12110 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
12111 vectors);
12112 clear_bit(nr: I40E_FLAG_MSI_ENA, addr: pf->flags);
12113 }
12114 vectors = 1; /* one MSI or Legacy vector */
12115 }
12116
12117 if (!test_bit(I40E_FLAG_MSI_ENA, pf->flags) &&
12118 !test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
12119 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
12120
12121 /* set up vector assignment tracking */
12122 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
12123 pf->irq_pile = kzalloc(size, GFP_KERNEL);
12124 if (!pf->irq_pile)
12125 return -ENOMEM;
12126
12127 pf->irq_pile->num_entries = vectors;
12128
12129 /* track first vector for misc interrupts, ignore return */
12130 (void)i40e_get_lump(pf, pile: pf->irq_pile, needed: 1, I40E_PILE_VALID_BIT - 1);
12131
12132 return 0;
12133}
12134
12135/**
12136 * i40e_restore_interrupt_scheme - Restore the interrupt scheme
12137 * @pf: private board data structure
12138 *
12139 * Restore the interrupt scheme that was cleared when we suspended the
12140 * device. This should be called during resume to re-allocate the q_vectors
12141 * and reacquire IRQs.
12142 */
12143static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
12144{
12145 struct i40e_vsi *vsi;
12146 int err, i;
12147
12148 /* We cleared the MSI and MSI-X flags when disabling the old interrupt
12149 * scheme. We need to re-enabled them here in order to attempt to
12150 * re-acquire the MSI or MSI-X vectors
12151 */
12152 set_bit(nr: I40E_FLAG_MSI_ENA, addr: pf->flags);
12153 set_bit(nr: I40E_FLAG_MSIX_ENA, addr: pf->flags);
12154
12155 err = i40e_init_interrupt_scheme(pf);
12156 if (err)
12157 return err;
12158
12159 /* Now that we've re-acquired IRQs, we need to remap the vectors and
12160 * rings together again.
12161 */
12162 i40e_pf_for_each_vsi(pf, i, vsi) {
12163 err = i40e_vsi_alloc_q_vectors(vsi);
12164 if (err)
12165 goto err_unwind;
12166
12167 i40e_vsi_map_rings_to_vectors(vsi);
12168 }
12169
12170 err = i40e_setup_misc_vector(pf);
12171 if (err)
12172 goto err_unwind;
12173
12174 if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags))
12175 i40e_client_update_msix_info(pf);
12176
12177 return 0;
12178
12179err_unwind:
12180 while (i--) {
12181 if (pf->vsi[i])
12182 i40e_vsi_free_q_vectors(vsi: pf->vsi[i]);
12183 }
12184
12185 return err;
12186}
12187
12188/**
12189 * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
12190 * non queue events in recovery mode
12191 * @pf: board private structure
12192 *
12193 * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
12194 * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
12195 * This is handled differently than in recovery mode since no Tx/Rx resources
12196 * are being allocated.
12197 **/
12198static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
12199{
12200 int err;
12201
12202 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
12203 err = i40e_setup_misc_vector(pf);
12204
12205 if (err) {
12206 dev_info(&pf->pdev->dev,
12207 "MSI-X misc vector request failed, error %d\n",
12208 err);
12209 return err;
12210 }
12211 } else {
12212 u32 flags = test_bit(I40E_FLAG_MSI_ENA, pf->flags) ? 0 : IRQF_SHARED;
12213
12214 err = request_irq(irq: pf->pdev->irq, handler: i40e_intr, flags,
12215 name: pf->int_name, dev: pf);
12216
12217 if (err) {
12218 dev_info(&pf->pdev->dev,
12219 "MSI/legacy misc vector request failed, error %d\n",
12220 err);
12221 return err;
12222 }
12223 i40e_enable_misc_int_causes(pf);
12224 i40e_irq_dynamic_enable_icr0(pf);
12225 }
12226
12227 return 0;
12228}
12229
12230/**
12231 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
12232 * @pf: board private structure
12233 *
12234 * This sets up the handler for MSIX 0, which is used to manage the
12235 * non-queue interrupts, e.g. AdminQ and errors. This is not used
12236 * when in MSI or Legacy interrupt mode.
12237 **/
12238static int i40e_setup_misc_vector(struct i40e_pf *pf)
12239{
12240 struct i40e_hw *hw = &pf->hw;
12241 int err = 0;
12242
12243 /* Only request the IRQ once, the first time through. */
12244 if (!test_and_set_bit(nr: __I40E_MISC_IRQ_REQUESTED, addr: pf->state)) {
12245 err = request_irq(irq: pf->msix_entries[0].vector,
12246 handler: i40e_intr, flags: 0, name: pf->int_name, dev: pf);
12247 if (err) {
12248 clear_bit(nr: __I40E_MISC_IRQ_REQUESTED, addr: pf->state);
12249 dev_info(&pf->pdev->dev,
12250 "request_irq for %s failed: %d\n",
12251 pf->int_name, err);
12252 return -EFAULT;
12253 }
12254 }
12255
12256 i40e_enable_misc_int_causes(pf);
12257
12258 /* associate no queues to the misc vector */
12259 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
12260 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
12261
12262 i40e_flush(hw);
12263
12264 i40e_irq_dynamic_enable_icr0(pf);
12265
12266 return err;
12267}
12268
12269/**
12270 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
12271 * @vsi: Pointer to vsi structure
12272 * @seed: Buffter to store the hash keys
12273 * @lut: Buffer to store the lookup table entries
12274 * @lut_size: Size of buffer to store the lookup table entries
12275 *
12276 * Return 0 on success, negative on failure
12277 */
12278static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
12279 u8 *lut, u16 lut_size)
12280{
12281 struct i40e_pf *pf = vsi->back;
12282 struct i40e_hw *hw = &pf->hw;
12283 int ret = 0;
12284
12285 if (seed) {
12286 ret = i40e_aq_get_rss_key(hw, seid: vsi->id,
12287 key: (struct i40e_aqc_get_set_rss_key_data *)seed);
12288 if (ret) {
12289 dev_info(&pf->pdev->dev,
12290 "Cannot get RSS key, err %pe aq_err %s\n",
12291 ERR_PTR(ret),
12292 libie_aq_str(pf->hw.aq.asq_last_status));
12293 return ret;
12294 }
12295 }
12296
12297 if (lut) {
12298 bool pf_lut = vsi->type == I40E_VSI_MAIN;
12299
12300 ret = i40e_aq_get_rss_lut(hw, seid: vsi->id, pf_lut, lut, lut_size);
12301 if (ret) {
12302 dev_info(&pf->pdev->dev,
12303 "Cannot get RSS lut, err %pe aq_err %s\n",
12304 ERR_PTR(ret),
12305 libie_aq_str(pf->hw.aq.asq_last_status));
12306 return ret;
12307 }
12308 }
12309
12310 return ret;
12311}
12312
12313/**
12314 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
12315 * @vsi: Pointer to vsi structure
12316 * @seed: RSS hash seed
12317 * @lut: Lookup table
12318 * @lut_size: Lookup table size
12319 *
12320 * Returns 0 on success, negative on failure
12321 **/
12322static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
12323 const u8 *lut, u16 lut_size)
12324{
12325 struct i40e_pf *pf = vsi->back;
12326 struct i40e_hw *hw = &pf->hw;
12327 u16 vf_id = vsi->vf_id;
12328 u8 i;
12329
12330 /* Fill out hash function seed */
12331 if (seed) {
12332 u32 *seed_dw = (u32 *)seed;
12333
12334 if (vsi->type == I40E_VSI_MAIN) {
12335 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12336 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
12337 } else if (vsi->type == I40E_VSI_SRIOV) {
12338 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
12339 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
12340 } else {
12341 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
12342 }
12343 }
12344
12345 if (lut) {
12346 u32 *lut_dw = (u32 *)lut;
12347
12348 if (vsi->type == I40E_VSI_MAIN) {
12349 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12350 return -EINVAL;
12351 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12352 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
12353 } else if (vsi->type == I40E_VSI_SRIOV) {
12354 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
12355 return -EINVAL;
12356 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12357 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
12358 } else {
12359 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12360 }
12361 }
12362 i40e_flush(hw);
12363
12364 return 0;
12365}
12366
12367/**
12368 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
12369 * @vsi: Pointer to VSI structure
12370 * @seed: Buffer to store the keys
12371 * @lut: Buffer to store the lookup table entries
12372 * @lut_size: Size of buffer to store the lookup table entries
12373 *
12374 * Returns 0 on success, negative on failure
12375 */
12376static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
12377 u8 *lut, u16 lut_size)
12378{
12379 struct i40e_pf *pf = vsi->back;
12380 struct i40e_hw *hw = &pf->hw;
12381 u16 i;
12382
12383 if (seed) {
12384 u32 *seed_dw = (u32 *)seed;
12385
12386 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12387 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
12388 }
12389 if (lut) {
12390 u32 *lut_dw = (u32 *)lut;
12391
12392 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12393 return -EINVAL;
12394 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12395 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
12396 }
12397
12398 return 0;
12399}
12400
12401/**
12402 * i40e_config_rss - Configure RSS keys and lut
12403 * @vsi: Pointer to VSI structure
12404 * @seed: RSS hash seed
12405 * @lut: Lookup table
12406 * @lut_size: Lookup table size
12407 *
12408 * Returns 0 on success, negative on failure
12409 */
12410int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12411{
12412 struct i40e_pf *pf = vsi->back;
12413
12414 if (test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps))
12415 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
12416 else
12417 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
12418}
12419
12420/**
12421 * i40e_get_rss - Get RSS keys and lut
12422 * @vsi: Pointer to VSI structure
12423 * @seed: Buffer to store the keys
12424 * @lut: Buffer to store the lookup table entries
12425 * @lut_size: Size of buffer to store the lookup table entries
12426 *
12427 * Returns 0 on success, negative on failure
12428 */
12429int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12430{
12431 struct i40e_pf *pf = vsi->back;
12432
12433 if (test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps))
12434 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
12435 else
12436 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
12437}
12438
12439/**
12440 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
12441 * @pf: Pointer to board private structure
12442 * @lut: Lookup table
12443 * @rss_table_size: Lookup table size
12444 * @rss_size: Range of queue number for hashing
12445 */
12446void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12447 u16 rss_table_size, u16 rss_size)
12448{
12449 u16 i;
12450
12451 for (i = 0; i < rss_table_size; i++)
12452 lut[i] = i % rss_size;
12453}
12454
12455/**
12456 * i40e_pf_config_rss - Prepare for RSS if used
12457 * @pf: board private structure
12458 **/
12459static int i40e_pf_config_rss(struct i40e_pf *pf)
12460{
12461 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
12462 u8 seed[I40E_HKEY_ARRAY_SIZE];
12463 u8 *lut;
12464 struct i40e_hw *hw = &pf->hw;
12465 u32 reg_val;
12466 u64 hena;
12467 int ret;
12468
12469 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
12470 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
12471 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
12472 hena |= i40e_pf_get_default_rss_hashcfg(pf);
12473
12474 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), reg_val: (u32)hena);
12475 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), reg_val: (u32)(hena >> 32));
12476
12477 /* Determine the RSS table size based on the hardware capabilities */
12478 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
12479 reg_val = (pf->rss_table_size == 512) ?
12480 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
12481 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
12482 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
12483
12484 /* Determine the RSS size of the VSI */
12485 if (!vsi->rss_size) {
12486 u16 qcount;
12487 /* If the firmware does something weird during VSI init, we
12488 * could end up with zero TCs. Check for that to avoid
12489 * divide-by-zero. It probably won't pass traffic, but it also
12490 * won't panic.
12491 */
12492 qcount = vsi->num_queue_pairs /
12493 (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
12494 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12495 }
12496 if (!vsi->rss_size)
12497 return -EINVAL;
12498
12499 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
12500 if (!lut)
12501 return -ENOMEM;
12502
12503 /* Use user configured lut if there is one, otherwise use default */
12504 if (vsi->rss_lut_user)
12505 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
12506 else
12507 i40e_fill_rss_lut(pf, lut, rss_table_size: vsi->rss_table_size, rss_size: vsi->rss_size);
12508
12509 /* Use user configured hash key if there is one, otherwise
12510 * use default.
12511 */
12512 if (vsi->rss_hkey_user)
12513 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
12514 else
12515 netdev_rss_key_fill(buffer: (void *)seed, I40E_HKEY_ARRAY_SIZE);
12516 ret = i40e_config_rss(vsi, seed, lut, lut_size: vsi->rss_table_size);
12517 kfree(objp: lut);
12518
12519 return ret;
12520}
12521
12522/**
12523 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
12524 * @pf: board private structure
12525 * @queue_count: the requested queue count for rss.
12526 *
12527 * returns 0 if rss is not enabled, if enabled returns the final rss queue
12528 * count which may be different from the requested queue count.
12529 * Note: expects to be called while under rtnl_lock()
12530 **/
12531int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12532{
12533 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
12534 int new_rss_size;
12535
12536 if (!test_bit(I40E_FLAG_RSS_ENA, pf->flags))
12537 return 0;
12538
12539 queue_count = min_t(int, queue_count, num_online_cpus());
12540 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12541
12542 if (queue_count != vsi->num_queue_pairs) {
12543 u16 qcount;
12544
12545 vsi->req_queue_pairs = queue_count;
12546 i40e_prep_for_reset(pf);
12547 if (test_bit(__I40E_IN_REMOVE, pf->state))
12548 return pf->alloc_rss_size;
12549
12550 pf->alloc_rss_size = new_rss_size;
12551
12552 i40e_reset_and_rebuild(pf, reinit: true, lock_acquired: true);
12553
12554 /* Discard the user configured hash keys and lut, if less
12555 * queues are enabled.
12556 */
12557 if (queue_count < vsi->rss_size) {
12558 i40e_clear_rss_config_user(vsi);
12559 dev_dbg(&pf->pdev->dev,
12560 "discard user configured hash keys and lut\n");
12561 }
12562
12563 /* Reset vsi->rss_size, as number of enabled queues changed */
12564 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
12565 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12566
12567 i40e_pf_config_rss(pf);
12568 }
12569 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
12570 vsi->req_queue_pairs, pf->rss_size_max);
12571 return pf->alloc_rss_size;
12572}
12573
12574/**
12575 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
12576 * @pf: board private structure
12577 **/
12578int i40e_get_partition_bw_setting(struct i40e_pf *pf)
12579{
12580 bool min_valid, max_valid;
12581 u32 max_bw, min_bw;
12582 int status;
12583
12584 status = i40e_read_bw_from_alt_ram(hw: &pf->hw, max_bw: &max_bw, min_bw: &min_bw,
12585 min_valid: &min_valid, max_valid: &max_valid);
12586
12587 if (!status) {
12588 if (min_valid)
12589 pf->min_bw = min_bw;
12590 if (max_valid)
12591 pf->max_bw = max_bw;
12592 }
12593
12594 return status;
12595}
12596
12597/**
12598 * i40e_set_partition_bw_setting - Set BW settings for this PF partition
12599 * @pf: board private structure
12600 **/
12601int i40e_set_partition_bw_setting(struct i40e_pf *pf)
12602{
12603 struct i40e_aqc_configure_partition_bw_data bw_data;
12604 int status;
12605
12606 memset(&bw_data, 0, sizeof(bw_data));
12607
12608 /* Set the valid bit for this PF */
12609 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12610 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12611 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12612
12613 /* Set the new bandwidths */
12614 status = i40e_aq_configure_partition_bw(hw: &pf->hw, bw_data: &bw_data, NULL);
12615
12616 return status;
12617}
12618
12619/**
12620 * i40e_is_total_port_shutdown_enabled - read NVM and return value
12621 * if total port shutdown feature is enabled for this PF
12622 * @pf: board private structure
12623 **/
12624static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12625{
12626#define I40E_TOTAL_PORT_SHUTDOWN_ENABLED BIT(4)
12627#define I40E_FEATURES_ENABLE_PTR 0x2A
12628#define I40E_CURRENT_SETTING_PTR 0x2B
12629#define I40E_LINK_BEHAVIOR_WORD_OFFSET 0x2D
12630#define I40E_LINK_BEHAVIOR_WORD_LENGTH 0x1
12631#define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED BIT(0)
12632#define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH 4
12633 u16 sr_emp_sr_settings_ptr = 0;
12634 u16 features_enable = 0;
12635 u16 link_behavior = 0;
12636 int read_status = 0;
12637 bool ret = false;
12638
12639 read_status = i40e_read_nvm_word(hw: &pf->hw,
12640 I40E_SR_EMP_SR_SETTINGS_PTR,
12641 data: &sr_emp_sr_settings_ptr);
12642 if (read_status)
12643 goto err_nvm;
12644 read_status = i40e_read_nvm_word(hw: &pf->hw,
12645 offset: sr_emp_sr_settings_ptr +
12646 I40E_FEATURES_ENABLE_PTR,
12647 data: &features_enable);
12648 if (read_status)
12649 goto err_nvm;
12650 if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) {
12651 read_status = i40e_read_nvm_module_data(hw: &pf->hw,
12652 I40E_SR_EMP_SR_SETTINGS_PTR,
12653 I40E_CURRENT_SETTING_PTR,
12654 I40E_LINK_BEHAVIOR_WORD_OFFSET,
12655 I40E_LINK_BEHAVIOR_WORD_LENGTH,
12656 data_ptr: &link_behavior);
12657 if (read_status)
12658 goto err_nvm;
12659 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12660 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior;
12661 }
12662 return ret;
12663
12664err_nvm:
12665 dev_warn(&pf->pdev->dev,
12666 "total-port-shutdown feature is off due to read nvm error: %pe\n",
12667 ERR_PTR(read_status));
12668 return ret;
12669}
12670
12671/**
12672 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
12673 * @pf: board private structure to initialize
12674 *
12675 * i40e_sw_init initializes the Adapter private data structure.
12676 * Fields are initialized based on PCI device information and
12677 * OS network device settings (MTU size).
12678 **/
12679static int i40e_sw_init(struct i40e_pf *pf)
12680{
12681 int err = 0;
12682 int size;
12683 u16 pow;
12684
12685 /* Set default capability flags */
12686 bitmap_zero(dst: pf->flags, nbits: I40E_PF_FLAGS_NBITS);
12687 set_bit(nr: I40E_FLAG_MSI_ENA, addr: pf->flags);
12688 set_bit(nr: I40E_FLAG_MSIX_ENA, addr: pf->flags);
12689
12690 /* Set default ITR */
12691 pf->rx_itr_default = I40E_ITR_RX_DEF;
12692 pf->tx_itr_default = I40E_ITR_TX_DEF;
12693
12694 /* Depending on PF configurations, it is possible that the RSS
12695 * maximum might end up larger than the available queues
12696 */
12697 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12698 pf->alloc_rss_size = 1;
12699 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12700 pf->rss_size_max = min_t(int, pf->rss_size_max,
12701 pf->hw.func_caps.num_tx_qp);
12702
12703 /* find the next higher power-of-2 of num cpus */
12704 pow = roundup_pow_of_two(num_online_cpus());
12705 pf->rss_size_max = min_t(int, pf->rss_size_max, pow);
12706
12707 if (pf->hw.func_caps.rss) {
12708 set_bit(nr: I40E_FLAG_RSS_ENA, addr: pf->flags);
12709 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12710 num_online_cpus());
12711 }
12712
12713 /* MFP mode enabled */
12714 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12715 set_bit(nr: I40E_FLAG_MFP_ENA, addr: pf->flags);
12716 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12717 if (i40e_get_partition_bw_setting(pf)) {
12718 dev_warn(&pf->pdev->dev,
12719 "Could not get partition bw settings\n");
12720 } else {
12721 dev_info(&pf->pdev->dev,
12722 "Partition BW Min = %8.8x, Max = %8.8x\n",
12723 pf->min_bw, pf->max_bw);
12724
12725 /* nudge the Tx scheduler */
12726 i40e_set_partition_bw_setting(pf);
12727 }
12728 }
12729
12730 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12731 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12732 set_bit(nr: I40E_FLAG_FD_ATR_ENA, addr: pf->flags);
12733 if (test_bit(I40E_FLAG_MFP_ENA, pf->flags) &&
12734 pf->hw.num_partitions > 1)
12735 dev_info(&pf->pdev->dev,
12736 "Flow Director Sideband mode Disabled in MFP mode\n");
12737 else
12738 set_bit(nr: I40E_FLAG_FD_SB_ENA, addr: pf->flags);
12739 pf->fdir_pf_filter_count =
12740 pf->hw.func_caps.fd_filters_guaranteed;
12741 pf->hw.fdir_shared_filter_count =
12742 pf->hw.func_caps.fd_filters_best_effort;
12743 }
12744
12745 /* Enable HW ATR eviction if possible */
12746 if (test_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps))
12747 set_bit(nr: I40E_FLAG_HW_ATR_EVICT_ENA, addr: pf->flags);
12748
12749 if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12750 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12751 set_bit(nr: I40E_FLAG_VMDQ_ENA, addr: pf->flags);
12752 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12753 }
12754
12755 if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12756 set_bit(nr: I40E_FLAG_IWARP_ENA, addr: pf->flags);
12757 /* IWARP needs one extra vector for CQP just like MISC.*/
12758 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12759 }
12760 /* Stopping FW LLDP engine is supported on XL710 and X722
12761 * starting from FW versions determined in i40e_init_adminq.
12762 * Stopping the FW LLDP engine is not supported on XL710
12763 * if NPAR is functioning so unset this hw flag in this case.
12764 */
12765 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12766 pf->hw.func_caps.npar_enable)
12767 clear_bit(nr: I40E_HW_CAP_FW_LLDP_STOPPABLE, addr: pf->hw.caps);
12768
12769#ifdef CONFIG_PCI_IOV
12770 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12771 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12772 set_bit(nr: I40E_FLAG_SRIOV_ENA, addr: pf->flags);
12773 pf->num_req_vfs = min_t(int,
12774 pf->hw.func_caps.num_vfs,
12775 I40E_MAX_VF_COUNT);
12776 }
12777#endif /* CONFIG_PCI_IOV */
12778 pf->lan_veb = I40E_NO_VEB;
12779 pf->lan_vsi = I40E_NO_VSI;
12780
12781 /* By default FW has this off for performance reasons */
12782 clear_bit(nr: I40E_FLAG_VEB_STATS_ENA, addr: pf->flags);
12783
12784 /* set up queue assignment tracking */
12785 size = sizeof(struct i40e_lump_tracking)
12786 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12787 pf->qp_pile = kzalloc(size, GFP_KERNEL);
12788 if (!pf->qp_pile) {
12789 err = -ENOMEM;
12790 goto sw_init_done;
12791 }
12792 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12793
12794 pf->tx_timeout_recovery_level = 1;
12795
12796 if (pf->hw.mac.type != I40E_MAC_X722 &&
12797 i40e_is_total_port_shutdown_enabled(pf)) {
12798 /* Link down on close must be on when total port shutdown
12799 * is enabled for a given port
12800 */
12801 set_bit(nr: I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, addr: pf->flags);
12802 set_bit(nr: I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, addr: pf->flags);
12803 dev_info(&pf->pdev->dev,
12804 "total-port-shutdown was enabled, link-down-on-close is forced on\n");
12805 }
12806 mutex_init(&pf->switch_mutex);
12807
12808sw_init_done:
12809 return err;
12810}
12811
12812/**
12813 * i40e_set_ntuple - set the ntuple feature flag and take action
12814 * @pf: board private structure to initialize
12815 * @features: the feature set that the stack is suggesting
12816 *
12817 * returns a bool to indicate if reset needs to happen
12818 **/
12819bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12820{
12821 bool need_reset = false;
12822
12823 /* Check if Flow Director n-tuple support was enabled or disabled. If
12824 * the state changed, we need to reset.
12825 */
12826 if (features & NETIF_F_NTUPLE) {
12827 /* Enable filters and mark for reset */
12828 if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
12829 need_reset = true;
12830 /* enable FD_SB only if there is MSI-X vector and no cloud
12831 * filters exist
12832 */
12833 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12834 set_bit(nr: I40E_FLAG_FD_SB_ENA, addr: pf->flags);
12835 clear_bit(nr: I40E_FLAG_FD_SB_INACTIVE, addr: pf->flags);
12836 }
12837 } else {
12838 /* turn off filters, mark for reset and clear SW filter list */
12839 if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
12840 need_reset = true;
12841 i40e_fdir_filter_exit(pf);
12842 }
12843 clear_bit(nr: I40E_FLAG_FD_SB_ENA, addr: pf->flags);
12844 clear_bit(nr: __I40E_FD_SB_AUTO_DISABLED, addr: pf->state);
12845 set_bit(nr: I40E_FLAG_FD_SB_INACTIVE, addr: pf->flags);
12846
12847 /* reset fd counters */
12848 pf->fd_add_err = 0;
12849 pf->fd_atr_cnt = 0;
12850 /* if ATR was auto disabled it can be re-enabled. */
12851 if (test_and_clear_bit(nr: __I40E_FD_ATR_AUTO_DISABLED, addr: pf->state))
12852 if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
12853 (I40E_DEBUG_FD & pf->hw.debug_mask))
12854 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12855 }
12856 return need_reset;
12857}
12858
12859/**
12860 * i40e_clear_rss_lut - clear the rx hash lookup table
12861 * @vsi: the VSI being configured
12862 **/
12863static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12864{
12865 struct i40e_pf *pf = vsi->back;
12866 struct i40e_hw *hw = &pf->hw;
12867 u16 vf_id = vsi->vf_id;
12868 u8 i;
12869
12870 if (vsi->type == I40E_VSI_MAIN) {
12871 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12872 wr32(hw, I40E_PFQF_HLUT(i), 0);
12873 } else if (vsi->type == I40E_VSI_SRIOV) {
12874 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12875 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), reg_val: 0);
12876 } else {
12877 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12878 }
12879}
12880
12881/**
12882 * i40e_set_loopback - turn on/off loopback mode on underlying PF
12883 * @vsi: ptr to VSI
12884 * @ena: flag to indicate the on/off setting
12885 */
12886static int i40e_set_loopback(struct i40e_vsi *vsi, bool ena)
12887{
12888 bool if_running = netif_running(dev: vsi->netdev) &&
12889 !test_and_set_bit(nr: __I40E_VSI_DOWN, addr: vsi->state);
12890 int ret;
12891
12892 if (if_running)
12893 i40e_down(vsi);
12894
12895 ret = i40e_aq_set_mac_loopback(hw: &vsi->back->hw, ena_lpbk: ena, NULL);
12896 if (ret)
12897 netdev_err(dev: vsi->netdev, format: "Failed to toggle loopback state\n");
12898 if (if_running)
12899 i40e_up(vsi);
12900
12901 return ret;
12902}
12903
12904/**
12905 * i40e_set_features - set the netdev feature flags
12906 * @netdev: ptr to the netdev being adjusted
12907 * @features: the feature set that the stack is suggesting
12908 * Note: expects to be called while under rtnl_lock()
12909 **/
12910static int i40e_set_features(struct net_device *netdev,
12911 netdev_features_t features)
12912{
12913 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
12914 struct i40e_vsi *vsi = np->vsi;
12915 struct i40e_pf *pf = vsi->back;
12916 bool need_reset;
12917
12918 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
12919 i40e_pf_config_rss(pf);
12920 else if (!(features & NETIF_F_RXHASH) &&
12921 netdev->features & NETIF_F_RXHASH)
12922 i40e_clear_rss_lut(vsi);
12923
12924 if (features & NETIF_F_HW_VLAN_CTAG_RX)
12925 i40e_vlan_stripping_enable(vsi);
12926 else
12927 i40e_vlan_stripping_disable(vsi);
12928
12929 if (!(features & NETIF_F_HW_TC) &&
12930 (netdev->features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
12931 dev_err(&pf->pdev->dev,
12932 "Offloaded tc filters active, can't turn hw_tc_offload off");
12933 return -EINVAL;
12934 }
12935
12936 if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
12937 i40e_del_all_macvlans(vsi);
12938
12939 need_reset = i40e_set_ntuple(pf, features);
12940
12941 if (need_reset)
12942 i40e_do_reset(pf, I40E_PF_RESET_FLAG, lock_acquired: true);
12943
12944 if ((features ^ netdev->features) & NETIF_F_LOOPBACK)
12945 return i40e_set_loopback(vsi, ena: !!(features & NETIF_F_LOOPBACK));
12946
12947 return 0;
12948}
12949
12950static int i40e_udp_tunnel_set_port(struct net_device *netdev,
12951 unsigned int table, unsigned int idx,
12952 struct udp_tunnel_info *ti)
12953{
12954 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
12955 struct i40e_hw *hw = &np->vsi->back->hw;
12956 u8 type, filter_index;
12957 int ret;
12958
12959 type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN :
12960 I40E_AQC_TUNNEL_TYPE_NGE;
12961
12962 ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), protocol_index: type, filter_index: &filter_index,
12963 NULL);
12964 if (ret) {
12965 netdev_info(dev: netdev, format: "add UDP port failed, err %pe aq_err %s\n",
12966 ERR_PTR(error: ret), libie_aq_str(err: hw->aq.asq_last_status));
12967 return -EIO;
12968 }
12969
12970 udp_tunnel_nic_set_port_priv(dev: netdev, table, idx, priv: filter_index);
12971 return 0;
12972}
12973
12974static int i40e_udp_tunnel_unset_port(struct net_device *netdev,
12975 unsigned int table, unsigned int idx,
12976 struct udp_tunnel_info *ti)
12977{
12978 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
12979 struct i40e_hw *hw = &np->vsi->back->hw;
12980 int ret;
12981
12982 ret = i40e_aq_del_udp_tunnel(hw, index: ti->hw_priv, NULL);
12983 if (ret) {
12984 netdev_info(dev: netdev, format: "delete UDP port failed, err %pe aq_err %s\n",
12985 ERR_PTR(error: ret), libie_aq_str(err: hw->aq.asq_last_status));
12986 return -EIO;
12987 }
12988
12989 return 0;
12990}
12991
12992static int i40e_get_phys_port_id(struct net_device *netdev,
12993 struct netdev_phys_item_id *ppid)
12994{
12995 struct i40e_netdev_priv *np = netdev_priv(dev: netdev);
12996 struct i40e_pf *pf = np->vsi->back;
12997 struct i40e_hw *hw = &pf->hw;
12998
12999 if (!test_bit(I40E_HW_CAP_PORT_ID_VALID, pf->hw.caps))
13000 return -EOPNOTSUPP;
13001
13002 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
13003 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
13004
13005 return 0;
13006}
13007
13008/**
13009 * i40e_ndo_fdb_add - add an entry to the hardware database
13010 * @ndm: the input from the stack
13011 * @tb: pointer to array of nladdr (unused)
13012 * @dev: the net device pointer
13013 * @addr: the MAC address entry being added
13014 * @vid: VLAN ID
13015 * @flags: instructions from stack about fdb operation
13016 * @notified: whether notification was emitted
13017 * @extack: netlink extended ack, unused currently
13018 */
13019static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
13020 struct net_device *dev,
13021 const unsigned char *addr, u16 vid,
13022 u16 flags, bool *notified,
13023 struct netlink_ext_ack *extack)
13024{
13025 struct i40e_netdev_priv *np = netdev_priv(dev);
13026 struct i40e_pf *pf = np->vsi->back;
13027 int err = 0;
13028
13029 if (!test_bit(I40E_FLAG_SRIOV_ENA, pf->flags))
13030 return -EOPNOTSUPP;
13031
13032 if (vid) {
13033 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
13034 return -EINVAL;
13035 }
13036
13037 /* Hardware does not support aging addresses so if a
13038 * ndm_state is given only allow permanent addresses
13039 */
13040 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
13041 netdev_info(dev, format: "FDB only supports static addresses\n");
13042 return -EINVAL;
13043 }
13044
13045 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
13046 err = dev_uc_add_excl(dev, addr);
13047 else if (is_multicast_ether_addr(addr))
13048 err = dev_mc_add_excl(dev, addr);
13049 else
13050 err = -EINVAL;
13051
13052 /* Only return duplicate errors if NLM_F_EXCL is set */
13053 if (err == -EEXIST && !(flags & NLM_F_EXCL))
13054 err = 0;
13055
13056 return err;
13057}
13058
13059/**
13060 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
13061 * @dev: the netdev being configured
13062 * @nlh: RTNL message
13063 * @flags: bridge flags
13064 * @extack: netlink extended ack
13065 *
13066 * Inserts a new hardware bridge if not already created and
13067 * enables the bridging mode requested (VEB or VEPA). If the
13068 * hardware bridge has already been inserted and the request
13069 * is to change the mode then that requires a PF reset to
13070 * allow rebuild of the components with required hardware
13071 * bridge mode enabled.
13072 *
13073 * Note: expects to be called while under rtnl_lock()
13074 **/
13075static int i40e_ndo_bridge_setlink(struct net_device *dev,
13076 struct nlmsghdr *nlh,
13077 u16 flags,
13078 struct netlink_ext_ack *extack)
13079{
13080 struct i40e_netdev_priv *np = netdev_priv(dev);
13081 struct i40e_vsi *vsi = np->vsi;
13082 struct i40e_pf *pf = vsi->back;
13083 struct nlattr *attr, *br_spec;
13084 struct i40e_veb *veb;
13085 int rem;
13086
13087 /* Only for PF VSI for now */
13088 if (vsi->type != I40E_VSI_MAIN)
13089 return -EOPNOTSUPP;
13090
13091 /* Find the HW bridge for PF VSI */
13092 veb = i40e_pf_get_veb_by_seid(pf, seid: vsi->uplink_seid);
13093
13094 br_spec = nlmsg_find_attr(nlh, hdrlen: sizeof(struct ifinfomsg), attrtype: IFLA_AF_SPEC);
13095 if (!br_spec)
13096 return -EINVAL;
13097
13098 nla_for_each_nested_type(attr, IFLA_BRIDGE_MODE, br_spec, rem) {
13099 __u16 mode = nla_get_u16(nla: attr);
13100
13101 if ((mode != BRIDGE_MODE_VEPA) &&
13102 (mode != BRIDGE_MODE_VEB))
13103 return -EINVAL;
13104
13105 /* Insert a new HW bridge */
13106 if (!veb) {
13107 veb = i40e_veb_setup(pf, uplink_seid: vsi->uplink_seid, downlink_seid: vsi->seid,
13108 enabled_tc: vsi->tc_config.enabled_tc);
13109 if (veb) {
13110 veb->bridge_mode = mode;
13111 i40e_config_bridge_mode(veb);
13112 } else {
13113 /* No Bridge HW offload available */
13114 return -ENOENT;
13115 }
13116 break;
13117 } else if (mode != veb->bridge_mode) {
13118 /* Existing HW bridge but different mode needs reset */
13119 veb->bridge_mode = mode;
13120 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
13121 if (mode == BRIDGE_MODE_VEB)
13122 set_bit(nr: I40E_FLAG_VEB_MODE_ENA, addr: pf->flags);
13123 else
13124 clear_bit(nr: I40E_FLAG_VEB_MODE_ENA, addr: pf->flags);
13125 i40e_do_reset(pf, I40E_PF_RESET_FLAG, lock_acquired: true);
13126 break;
13127 }
13128 }
13129
13130 return 0;
13131}
13132
13133/**
13134 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
13135 * @skb: skb buff
13136 * @pid: process id
13137 * @seq: RTNL message seq #
13138 * @dev: the netdev being configured
13139 * @filter_mask: unused
13140 * @nlflags: netlink flags passed in
13141 *
13142 * Return the mode in which the hardware bridge is operating in
13143 * i.e VEB or VEPA.
13144 **/
13145static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
13146 struct net_device *dev,
13147 u32 __always_unused filter_mask,
13148 int nlflags)
13149{
13150 struct i40e_netdev_priv *np = netdev_priv(dev);
13151 struct i40e_vsi *vsi = np->vsi;
13152 struct i40e_pf *pf = vsi->back;
13153 struct i40e_veb *veb;
13154
13155 /* Only for PF VSI for now */
13156 if (vsi->type != I40E_VSI_MAIN)
13157 return -EOPNOTSUPP;
13158
13159 /* Find the HW bridge for the PF VSI */
13160 veb = i40e_pf_get_veb_by_seid(pf, seid: vsi->uplink_seid);
13161 if (!veb)
13162 return 0;
13163
13164 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode: veb->bridge_mode,
13165 flags: 0, mask: 0, nlflags, filter_mask, NULL);
13166}
13167
13168/**
13169 * i40e_features_check - Validate encapsulated packet conforms to limits
13170 * @skb: skb buff
13171 * @dev: This physical port's netdev
13172 * @features: Offload features that the stack believes apply
13173 **/
13174static netdev_features_t i40e_features_check(struct sk_buff *skb,
13175 struct net_device *dev,
13176 netdev_features_t features)
13177{
13178 size_t len;
13179
13180 /* No point in doing any of this if neither checksum nor GSO are
13181 * being requested for this frame. We can rule out both by just
13182 * checking for CHECKSUM_PARTIAL
13183 */
13184 if (skb->ip_summed != CHECKSUM_PARTIAL)
13185 return features;
13186
13187 /* We cannot support GSO if the MSS is going to be less than
13188 * 64 bytes. If it is then we need to drop support for GSO.
13189 */
13190 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
13191 features &= ~NETIF_F_GSO_MASK;
13192
13193 /* MACLEN can support at most 63 words */
13194 len = skb_network_offset(skb);
13195 if (len & ~(63 * 2))
13196 goto out_err;
13197
13198 /* IPLEN and EIPLEN can support at most 127 dwords */
13199 len = skb_network_header_len(skb);
13200 if (len & ~(127 * 4))
13201 goto out_err;
13202
13203 if (skb->encapsulation) {
13204 /* L4TUNLEN can support 127 words */
13205 len = skb_inner_network_header(skb) - skb_transport_header(skb);
13206 if (len & ~(127 * 2))
13207 goto out_err;
13208
13209 /* IPLEN can support at most 127 dwords */
13210 len = skb_inner_transport_header(skb) -
13211 skb_inner_network_header(skb);
13212 if (len & ~(127 * 4))
13213 goto out_err;
13214 }
13215
13216 /* No need to validate L4LEN as TCP is the only protocol with a
13217 * flexible value and we support all possible values supported
13218 * by TCP, which is at most 15 dwords
13219 */
13220
13221 return features;
13222out_err:
13223 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
13224}
13225
13226/**
13227 * i40e_xdp_setup - add/remove an XDP program
13228 * @vsi: VSI to changed
13229 * @prog: XDP program
13230 * @extack: netlink extended ack
13231 **/
13232static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog,
13233 struct netlink_ext_ack *extack)
13234{
13235 int frame_size = i40e_max_vsi_frame_size(vsi, xdp_prog: prog);
13236 struct i40e_pf *pf = vsi->back;
13237 struct bpf_prog *old_prog;
13238 bool need_reset;
13239 int i;
13240
13241 /* VSI shall be deleted in a moment, block loading new programs */
13242 if (prog && test_bit(__I40E_IN_REMOVE, pf->state))
13243 return -EINVAL;
13244
13245 /* Don't allow frames that span over multiple buffers */
13246 if (vsi->netdev->mtu > frame_size - I40E_PACKET_HDR_PAD) {
13247 NL_SET_ERR_MSG_MOD(extack, "MTU too large for linear frames and XDP prog does not support frags");
13248 return -EINVAL;
13249 }
13250
13251 /* When turning XDP on->off/off->on we reset and rebuild the rings. */
13252 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
13253 if (need_reset)
13254 i40e_prep_for_reset(pf);
13255
13256 old_prog = xchg(&vsi->xdp_prog, prog);
13257
13258 if (need_reset) {
13259 if (!prog) {
13260 xdp_features_clear_redirect_target(dev: vsi->netdev);
13261 /* Wait until ndo_xsk_wakeup completes. */
13262 synchronize_rcu();
13263 }
13264 i40e_reset_and_rebuild(pf, reinit: true, lock_acquired: true);
13265 }
13266
13267 if (!i40e_enabled_xdp_vsi(vsi) && prog) {
13268 if (i40e_realloc_rx_bi_zc(vsi, zc: true))
13269 return -ENOMEM;
13270 } else if (i40e_enabled_xdp_vsi(vsi) && !prog) {
13271 if (i40e_realloc_rx_bi_zc(vsi, zc: false))
13272 return -ENOMEM;
13273 }
13274
13275 for (i = 0; i < vsi->num_queue_pairs; i++)
13276 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
13277
13278 if (old_prog)
13279 bpf_prog_put(prog: old_prog);
13280
13281 /* Kick start the NAPI context if there is an AF_XDP socket open
13282 * on that queue id. This so that receiving will start.
13283 */
13284 if (need_reset && prog) {
13285 for (i = 0; i < vsi->num_queue_pairs; i++)
13286 if (vsi->xdp_rings[i]->xsk_pool)
13287 (void)i40e_xsk_wakeup(dev: vsi->netdev, queue_id: i,
13288 XDP_WAKEUP_RX);
13289 xdp_features_set_redirect_target(dev: vsi->netdev, support_sg: true);
13290 }
13291
13292 return 0;
13293}
13294
13295/**
13296 * i40e_enter_busy_conf - Enters busy config state
13297 * @vsi: vsi
13298 *
13299 * Returns 0 on success, <0 for failure.
13300 **/
13301static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
13302{
13303 struct i40e_pf *pf = vsi->back;
13304 int timeout = 50;
13305
13306 while (test_and_set_bit(nr: __I40E_CONFIG_BUSY, addr: pf->state)) {
13307 timeout--;
13308 if (!timeout)
13309 return -EBUSY;
13310 usleep_range(min: 1000, max: 2000);
13311 }
13312
13313 return 0;
13314}
13315
13316/**
13317 * i40e_exit_busy_conf - Exits busy config state
13318 * @vsi: vsi
13319 **/
13320static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
13321{
13322 struct i40e_pf *pf = vsi->back;
13323
13324 clear_bit(nr: __I40E_CONFIG_BUSY, addr: pf->state);
13325}
13326
13327/**
13328 * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
13329 * @vsi: vsi
13330 * @queue_pair: queue pair
13331 **/
13332static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
13333{
13334 memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
13335 sizeof(vsi->rx_rings[queue_pair]->rx_stats));
13336 memset(&vsi->tx_rings[queue_pair]->stats, 0,
13337 sizeof(vsi->tx_rings[queue_pair]->stats));
13338 if (i40e_enabled_xdp_vsi(vsi)) {
13339 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
13340 sizeof(vsi->xdp_rings[queue_pair]->stats));
13341 }
13342}
13343
13344/**
13345 * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
13346 * @vsi: vsi
13347 * @queue_pair: queue pair
13348 **/
13349static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
13350{
13351 i40e_clean_tx_ring(tx_ring: vsi->tx_rings[queue_pair]);
13352 if (i40e_enabled_xdp_vsi(vsi)) {
13353 /* Make sure that in-progress ndo_xdp_xmit calls are
13354 * completed.
13355 */
13356 synchronize_rcu();
13357 i40e_clean_tx_ring(tx_ring: vsi->xdp_rings[queue_pair]);
13358 }
13359 i40e_clean_rx_ring(rx_ring: vsi->rx_rings[queue_pair]);
13360}
13361
13362/**
13363 * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
13364 * @vsi: vsi
13365 * @queue_pair: queue pair
13366 * @enable: true for enable, false for disable
13367 **/
13368static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
13369 bool enable)
13370{
13371 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13372 struct i40e_q_vector *q_vector = rxr->q_vector;
13373
13374 if (!vsi->netdev)
13375 return;
13376
13377 /* All rings in a qp belong to the same qvector. */
13378 if (q_vector->rx.ring || q_vector->tx.ring) {
13379 if (enable)
13380 napi_enable(n: &q_vector->napi);
13381 else
13382 napi_disable(n: &q_vector->napi);
13383 }
13384}
13385
13386/**
13387 * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
13388 * @vsi: vsi
13389 * @queue_pair: queue pair
13390 * @enable: true for enable, false for disable
13391 *
13392 * Returns 0 on success, <0 on failure.
13393 **/
13394static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
13395 bool enable)
13396{
13397 struct i40e_pf *pf = vsi->back;
13398 int pf_q, ret = 0;
13399
13400 pf_q = vsi->base_queue + queue_pair;
13401 ret = i40e_control_wait_tx_q(seid: vsi->seid, pf, pf_q,
13402 is_xdp: false /*is xdp*/, enable);
13403 if (ret) {
13404 dev_info(&pf->pdev->dev,
13405 "VSI seid %d Tx ring %d %sable timeout\n",
13406 vsi->seid, pf_q, (enable ? "en" : "dis"));
13407 return ret;
13408 }
13409
13410 i40e_control_rx_q(pf, pf_q, enable);
13411 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13412 if (ret) {
13413 dev_info(&pf->pdev->dev,
13414 "VSI seid %d Rx ring %d %sable timeout\n",
13415 vsi->seid, pf_q, (enable ? "en" : "dis"));
13416 return ret;
13417 }
13418
13419 /* Due to HW errata, on Rx disable only, the register can
13420 * indicate done before it really is. Needs 50ms to be sure
13421 */
13422 if (!enable)
13423 mdelay(50);
13424
13425 if (!i40e_enabled_xdp_vsi(vsi))
13426 return ret;
13427
13428 ret = i40e_control_wait_tx_q(seid: vsi->seid, pf,
13429 pf_q: pf_q + vsi->alloc_queue_pairs,
13430 is_xdp: true /*is xdp*/, enable);
13431 if (ret) {
13432 dev_info(&pf->pdev->dev,
13433 "VSI seid %d XDP Tx ring %d %sable timeout\n",
13434 vsi->seid, pf_q, (enable ? "en" : "dis"));
13435 }
13436
13437 return ret;
13438}
13439
13440/**
13441 * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
13442 * @vsi: vsi
13443 * @queue_pair: queue_pair
13444 **/
13445static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
13446{
13447 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13448 struct i40e_pf *pf = vsi->back;
13449 struct i40e_hw *hw = &pf->hw;
13450
13451 /* All rings in a qp belong to the same qvector. */
13452 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
13453 i40e_irq_dynamic_enable(vsi, vector: rxr->q_vector->v_idx);
13454 else
13455 i40e_irq_dynamic_enable_icr0(pf);
13456
13457 i40e_flush(hw);
13458}
13459
13460/**
13461 * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
13462 * @vsi: vsi
13463 * @queue_pair: queue_pair
13464 **/
13465static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
13466{
13467 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13468 struct i40e_pf *pf = vsi->back;
13469 struct i40e_hw *hw = &pf->hw;
13470
13471 /* For simplicity, instead of removing the qp interrupt causes
13472 * from the interrupt linked list, we simply disable the interrupt, and
13473 * leave the list intact.
13474 *
13475 * All rings in a qp belong to the same qvector.
13476 */
13477 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
13478 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
13479
13480 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
13481 i40e_flush(hw);
13482 synchronize_irq(irq: pf->msix_entries[intpf].vector);
13483 } else {
13484 /* Legacy and MSI mode - this stops all interrupt handling */
13485 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
13486 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
13487 i40e_flush(hw);
13488 synchronize_irq(irq: pf->pdev->irq);
13489 }
13490}
13491
13492/**
13493 * i40e_queue_pair_disable - Disables a queue pair
13494 * @vsi: vsi
13495 * @queue_pair: queue pair
13496 *
13497 * Returns 0 on success, <0 on failure.
13498 **/
13499int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
13500{
13501 int err;
13502
13503 err = i40e_enter_busy_conf(vsi);
13504 if (err)
13505 return err;
13506
13507 i40e_queue_pair_disable_irq(vsi, queue_pair);
13508 i40e_queue_pair_toggle_napi(vsi, queue_pair, enable: false /* off */);
13509 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, enable: false /* off */);
13510 i40e_clean_rx_ring(rx_ring: vsi->rx_rings[queue_pair]);
13511 i40e_queue_pair_clean_rings(vsi, queue_pair);
13512 i40e_queue_pair_reset_stats(vsi, queue_pair);
13513
13514 return err;
13515}
13516
13517/**
13518 * i40e_queue_pair_enable - Enables a queue pair
13519 * @vsi: vsi
13520 * @queue_pair: queue pair
13521 *
13522 * Returns 0 on success, <0 on failure.
13523 **/
13524int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
13525{
13526 int err;
13527
13528 err = i40e_configure_tx_ring(ring: vsi->tx_rings[queue_pair]);
13529 if (err)
13530 return err;
13531
13532 if (i40e_enabled_xdp_vsi(vsi)) {
13533 err = i40e_configure_tx_ring(ring: vsi->xdp_rings[queue_pair]);
13534 if (err)
13535 return err;
13536 }
13537
13538 err = i40e_configure_rx_ring(ring: vsi->rx_rings[queue_pair]);
13539 if (err)
13540 return err;
13541
13542 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, enable: true /* on */);
13543 i40e_queue_pair_toggle_napi(vsi, queue_pair, enable: true /* on */);
13544 i40e_queue_pair_enable_irq(vsi, queue_pair);
13545
13546 i40e_exit_busy_conf(vsi);
13547
13548 return err;
13549}
13550
13551/**
13552 * i40e_xdp - implements ndo_bpf for i40e
13553 * @dev: netdevice
13554 * @xdp: XDP command
13555 **/
13556static int i40e_xdp(struct net_device *dev,
13557 struct netdev_bpf *xdp)
13558{
13559 struct i40e_netdev_priv *np = netdev_priv(dev);
13560 struct i40e_vsi *vsi = np->vsi;
13561
13562 if (vsi->type != I40E_VSI_MAIN)
13563 return -EINVAL;
13564
13565 switch (xdp->command) {
13566 case XDP_SETUP_PROG:
13567 return i40e_xdp_setup(vsi, prog: xdp->prog, extack: xdp->extack);
13568 case XDP_SETUP_XSK_POOL:
13569 return i40e_xsk_pool_setup(vsi, pool: xdp->xsk.pool,
13570 qid: xdp->xsk.queue_id);
13571 default:
13572 return -EINVAL;
13573 }
13574}
13575
13576static const struct net_device_ops i40e_netdev_ops = {
13577 .ndo_open = i40e_open,
13578 .ndo_stop = i40e_close,
13579 .ndo_start_xmit = i40e_lan_xmit_frame,
13580 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
13581 .ndo_set_rx_mode = i40e_set_rx_mode,
13582 .ndo_validate_addr = eth_validate_addr,
13583 .ndo_set_mac_address = i40e_set_mac,
13584 .ndo_change_mtu = i40e_change_mtu,
13585 .ndo_tx_timeout = i40e_tx_timeout,
13586 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
13587 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
13588#ifdef CONFIG_NET_POLL_CONTROLLER
13589 .ndo_poll_controller = i40e_netpoll,
13590#endif
13591 .ndo_setup_tc = __i40e_setup_tc,
13592 .ndo_select_queue = i40e_lan_select_queue,
13593 .ndo_set_features = i40e_set_features,
13594 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
13595 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
13596 .ndo_get_vf_stats = i40e_get_vf_stats,
13597 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
13598 .ndo_get_vf_config = i40e_ndo_get_vf_config,
13599 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
13600 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
13601 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
13602 .ndo_get_phys_port_id = i40e_get_phys_port_id,
13603 .ndo_fdb_add = i40e_ndo_fdb_add,
13604 .ndo_features_check = i40e_features_check,
13605 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
13606 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
13607 .ndo_bpf = i40e_xdp,
13608 .ndo_xdp_xmit = i40e_xdp_xmit,
13609 .ndo_xsk_wakeup = i40e_xsk_wakeup,
13610 .ndo_dfwd_add_station = i40e_fwd_add,
13611 .ndo_dfwd_del_station = i40e_fwd_del,
13612 .ndo_hwtstamp_get = i40e_ptp_hwtstamp_get,
13613 .ndo_hwtstamp_set = i40e_ptp_hwtstamp_set,
13614};
13615
13616/**
13617 * i40e_config_netdev - Setup the netdev flags
13618 * @vsi: the VSI being configured
13619 *
13620 * Returns 0 on success, negative value on failure
13621 **/
13622static int i40e_config_netdev(struct i40e_vsi *vsi)
13623{
13624 struct i40e_pf *pf = vsi->back;
13625 struct i40e_hw *hw = &pf->hw;
13626 struct i40e_netdev_priv *np;
13627 struct net_device *netdev;
13628 u8 broadcast[ETH_ALEN];
13629 u8 mac_addr[ETH_ALEN];
13630 int etherdev_size;
13631 netdev_features_t hw_enc_features;
13632 netdev_features_t hw_features;
13633
13634 etherdev_size = sizeof(struct i40e_netdev_priv);
13635 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
13636 if (!netdev)
13637 return -ENOMEM;
13638
13639 vsi->netdev = netdev;
13640 np = netdev_priv(dev: netdev);
13641 np->vsi = vsi;
13642
13643 hw_enc_features = NETIF_F_SG |
13644 NETIF_F_HW_CSUM |
13645 NETIF_F_HIGHDMA |
13646 NETIF_F_SOFT_FEATURES |
13647 NETIF_F_TSO |
13648 NETIF_F_TSO_ECN |
13649 NETIF_F_TSO6 |
13650 NETIF_F_GSO_GRE |
13651 NETIF_F_GSO_GRE_CSUM |
13652 NETIF_F_GSO_PARTIAL |
13653 NETIF_F_GSO_IPXIP4 |
13654 NETIF_F_GSO_IPXIP6 |
13655 NETIF_F_GSO_UDP_TUNNEL |
13656 NETIF_F_GSO_UDP_TUNNEL_CSUM |
13657 NETIF_F_GSO_UDP_L4 |
13658 NETIF_F_SCTP_CRC |
13659 NETIF_F_RXHASH |
13660 NETIF_F_RXCSUM |
13661 0;
13662
13663 if (!test_bit(I40E_HW_CAP_OUTER_UDP_CSUM, pf->hw.caps))
13664 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
13665
13666 netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13667
13668 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
13669
13670 netdev->hw_enc_features |= hw_enc_features;
13671
13672 /* record features VLANs can make use of */
13673 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
13674
13675#define I40E_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
13676 NETIF_F_GSO_GRE_CSUM | \
13677 NETIF_F_GSO_IPXIP4 | \
13678 NETIF_F_GSO_IPXIP6 | \
13679 NETIF_F_GSO_UDP_TUNNEL | \
13680 NETIF_F_GSO_UDP_TUNNEL_CSUM)
13681
13682 netdev->gso_partial_features = I40E_GSO_PARTIAL_FEATURES;
13683 netdev->features |= NETIF_F_GSO_PARTIAL |
13684 I40E_GSO_PARTIAL_FEATURES;
13685
13686 netdev->mpls_features |= NETIF_F_SG;
13687 netdev->mpls_features |= NETIF_F_HW_CSUM;
13688 netdev->mpls_features |= NETIF_F_TSO;
13689 netdev->mpls_features |= NETIF_F_TSO6;
13690 netdev->mpls_features |= I40E_GSO_PARTIAL_FEATURES;
13691
13692 /* enable macvlan offloads */
13693 netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
13694
13695 hw_features = hw_enc_features |
13696 NETIF_F_HW_VLAN_CTAG_TX |
13697 NETIF_F_HW_VLAN_CTAG_RX;
13698
13699 if (!test_bit(I40E_FLAG_MFP_ENA, pf->flags))
13700 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
13701
13702 netdev->hw_features |= hw_features | NETIF_F_LOOPBACK;
13703
13704 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
13705 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
13706
13707 netdev->features &= ~NETIF_F_HW_TC;
13708
13709 if (vsi->type == I40E_VSI_MAIN) {
13710 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13711 ether_addr_copy(dst: mac_addr, src: hw->mac.perm_addr);
13712 /* The following steps are necessary for two reasons. First,
13713 * some older NVM configurations load a default MAC-VLAN
13714 * filter that will accept any tagged packet, and we want to
13715 * replace this with a normal filter. Additionally, it is
13716 * possible our MAC address was provided by the platform using
13717 * Open Firmware or similar.
13718 *
13719 * Thus, we need to remove the default filter and install one
13720 * specific to the MAC address.
13721 */
13722 i40e_rm_default_mac_filter(vsi, macaddr: mac_addr);
13723 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
13724 i40e_add_mac_filter(vsi, macaddr: mac_addr);
13725 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
13726
13727 netdev->xdp_features = NETDEV_XDP_ACT_BASIC |
13728 NETDEV_XDP_ACT_REDIRECT |
13729 NETDEV_XDP_ACT_XSK_ZEROCOPY |
13730 NETDEV_XDP_ACT_RX_SG;
13731 netdev->xdp_zc_max_segs = I40E_MAX_BUFFER_TXD;
13732 } else {
13733 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
13734 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
13735 * the end, which is 4 bytes long, so force truncation of the
13736 * original name by IFNAMSIZ - 4
13737 */
13738 struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf);
13739
13740 snprintf(buf: netdev->name, IFNAMSIZ, fmt: "%.*sv%%d", IFNAMSIZ - 4,
13741 main_vsi->netdev->name);
13742 eth_random_addr(addr: mac_addr);
13743
13744 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
13745 i40e_add_mac_filter(vsi, macaddr: mac_addr);
13746 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
13747 }
13748
13749 /* Add the broadcast filter so that we initially will receive
13750 * broadcast packets. Note that when a new VLAN is first added the
13751 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13752 * specific filters as part of transitioning into "vlan" operation.
13753 * When more VLANs are added, the driver will copy each existing MAC
13754 * filter and add it for the new VLAN.
13755 *
13756 * Broadcast filters are handled specially by
13757 * i40e_sync_filters_subtask, as the driver must to set the broadcast
13758 * promiscuous bit instead of adding this directly as a MAC/VLAN
13759 * filter. The subtask will update the correct broadcast promiscuous
13760 * bits as VLANs become active or inactive.
13761 */
13762 eth_broadcast_addr(addr: broadcast);
13763 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
13764 i40e_add_mac_filter(vsi, macaddr: broadcast);
13765 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
13766
13767 eth_hw_addr_set(dev: netdev, addr: mac_addr);
13768 ether_addr_copy(dst: netdev->perm_addr, src: mac_addr);
13769
13770 /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13771 netdev->neigh_priv_len = sizeof(u32) * 4;
13772
13773 netdev->priv_flags |= IFF_UNICAST_FLT;
13774 netdev->priv_flags |= IFF_SUPP_NOFCS;
13775 /* Setup netdev TC information */
13776 i40e_vsi_config_netdev_tc(vsi, enabled_tc: vsi->tc_config.enabled_tc);
13777
13778 netdev->netdev_ops = &i40e_netdev_ops;
13779 netdev->watchdog_timeo = 5 * HZ;
13780 i40e_set_ethtool_ops(netdev);
13781
13782 /* MTU range: 68 - 9706 */
13783 netdev->min_mtu = ETH_MIN_MTU;
13784 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13785
13786 return 0;
13787}
13788
13789/**
13790 * i40e_vsi_delete - Delete a VSI from the switch
13791 * @vsi: the VSI being removed
13792 *
13793 * Returns 0 on success, negative value on failure
13794 **/
13795static void i40e_vsi_delete(struct i40e_vsi *vsi)
13796{
13797 /* remove default VSI is not allowed */
13798 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13799 return;
13800
13801 i40e_aq_delete_element(hw: &vsi->back->hw, seid: vsi->seid, NULL);
13802}
13803
13804/**
13805 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13806 * @vsi: the VSI being queried
13807 *
13808 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13809 **/
13810int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13811{
13812 struct i40e_veb *veb;
13813 struct i40e_pf *pf = vsi->back;
13814
13815 /* Uplink is not a bridge so default to VEB */
13816 if (vsi->veb_idx >= I40E_MAX_VEB)
13817 return 1;
13818
13819 veb = pf->veb[vsi->veb_idx];
13820 if (!veb) {
13821 dev_info(&pf->pdev->dev,
13822 "There is no veb associated with the bridge\n");
13823 return -ENOENT;
13824 }
13825
13826 /* Uplink is a bridge in VEPA mode */
13827 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13828 return 0;
13829 } else {
13830 /* Uplink is a bridge in VEB mode */
13831 return 1;
13832 }
13833
13834 /* VEPA is now default bridge, so return 0 */
13835 return 0;
13836}
13837
13838/**
13839 * i40e_add_vsi - Add a VSI to the switch
13840 * @vsi: the VSI being configured
13841 *
13842 * This initializes a VSI context depending on the VSI type to be added and
13843 * passes it down to the add_vsi aq command.
13844 **/
13845static int i40e_add_vsi(struct i40e_vsi *vsi)
13846{
13847 int ret = -ENODEV;
13848 struct i40e_pf *pf = vsi->back;
13849 struct i40e_hw *hw = &pf->hw;
13850 struct i40e_vsi_context ctxt;
13851 struct i40e_mac_filter *f;
13852 struct hlist_node *h;
13853 int bkt;
13854
13855 u8 enabled_tc = 0x1; /* TC0 enabled */
13856 int f_count = 0;
13857
13858 memset(&ctxt, 0, sizeof(ctxt));
13859 switch (vsi->type) {
13860 case I40E_VSI_MAIN:
13861 /* The PF's main VSI is already setup as part of the
13862 * device initialization, so we'll not bother with
13863 * the add_vsi call, but we will retrieve the current
13864 * VSI context.
13865 */
13866 ctxt.seid = pf->main_vsi_seid;
13867 ctxt.pf_num = pf->hw.pf_id;
13868 ctxt.vf_num = 0;
13869 ret = i40e_aq_get_vsi_params(hw: &pf->hw, vsi_ctx: &ctxt, NULL);
13870 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13871 if (ret) {
13872 dev_info(&pf->pdev->dev,
13873 "couldn't get PF vsi config, err %pe aq_err %s\n",
13874 ERR_PTR(ret),
13875 libie_aq_str(pf->hw.aq.asq_last_status));
13876 return -ENOENT;
13877 }
13878 vsi->info = ctxt.info;
13879 vsi->info.valid_sections = 0;
13880
13881 vsi->seid = ctxt.seid;
13882 vsi->id = ctxt.vsi_number;
13883
13884 enabled_tc = i40e_pf_get_tc_map(pf);
13885
13886 /* Source pruning is enabled by default, so the flag is
13887 * negative logic - if it's set, we need to fiddle with
13888 * the VSI to disable source pruning.
13889 */
13890 if (test_bit(I40E_FLAG_SOURCE_PRUNING_DIS, pf->flags)) {
13891 memset(&ctxt, 0, sizeof(ctxt));
13892 ctxt.seid = pf->main_vsi_seid;
13893 ctxt.pf_num = pf->hw.pf_id;
13894 ctxt.vf_num = 0;
13895 ctxt.info.valid_sections |=
13896 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13897 ctxt.info.switch_id =
13898 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
13899 ret = i40e_aq_update_vsi_params(hw, vsi_ctx: &ctxt, NULL);
13900 if (ret) {
13901 dev_info(&pf->pdev->dev,
13902 "update vsi failed, err %d aq_err %s\n",
13903 ret,
13904 libie_aq_str(pf->hw.aq.asq_last_status));
13905 ret = -ENOENT;
13906 goto err;
13907 }
13908 }
13909
13910 /* MFP mode setup queue map and update VSI */
13911 if (test_bit(I40E_FLAG_MFP_ENA, pf->flags) &&
13912 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
13913 memset(&ctxt, 0, sizeof(ctxt));
13914 ctxt.seid = pf->main_vsi_seid;
13915 ctxt.pf_num = pf->hw.pf_id;
13916 ctxt.vf_num = 0;
13917 i40e_vsi_setup_queue_map(vsi, ctxt: &ctxt, enabled_tc, is_add: false);
13918 ret = i40e_aq_update_vsi_params(hw, vsi_ctx: &ctxt, NULL);
13919 if (ret) {
13920 dev_info(&pf->pdev->dev,
13921 "update vsi failed, err %pe aq_err %s\n",
13922 ERR_PTR(ret),
13923 libie_aq_str(pf->hw.aq.asq_last_status));
13924 ret = -ENOENT;
13925 goto err;
13926 }
13927 /* update the local VSI info queue map */
13928 i40e_vsi_update_queue_map(vsi, ctxt: &ctxt);
13929 vsi->info.valid_sections = 0;
13930 } else {
13931 /* Default/Main VSI is only enabled for TC0
13932 * reconfigure it to enable all TCs that are
13933 * available on the port in SFP mode.
13934 * For MFP case the iSCSI PF would use this
13935 * flow to enable LAN+iSCSI TC.
13936 */
13937 ret = i40e_vsi_config_tc(vsi, enabled_tc);
13938 if (ret) {
13939 /* Single TC condition is not fatal,
13940 * message and continue
13941 */
13942 dev_info(&pf->pdev->dev,
13943 "failed to configure TCs for main VSI tc_map 0x%08x, err %pe aq_err %s\n",
13944 enabled_tc,
13945 ERR_PTR(ret),
13946 libie_aq_str(pf->hw.aq.asq_last_status));
13947 }
13948 }
13949 break;
13950
13951 case I40E_VSI_FDIR:
13952 ctxt.pf_num = hw->pf_id;
13953 ctxt.vf_num = 0;
13954 ctxt.uplink_seid = vsi->uplink_seid;
13955 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13956 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13957 if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags) &&
13958 (i40e_is_vsi_uplink_mode_veb(vsi))) {
13959 ctxt.info.valid_sections |=
13960 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13961 ctxt.info.switch_id =
13962 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13963 }
13964 i40e_vsi_setup_queue_map(vsi, ctxt: &ctxt, enabled_tc, is_add: true);
13965 break;
13966
13967 case I40E_VSI_VMDQ2:
13968 ctxt.pf_num = hw->pf_id;
13969 ctxt.vf_num = 0;
13970 ctxt.uplink_seid = vsi->uplink_seid;
13971 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13972 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
13973
13974 /* This VSI is connected to VEB so the switch_id
13975 * should be set to zero by default.
13976 */
13977 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13978 ctxt.info.valid_sections |=
13979 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13980 ctxt.info.switch_id =
13981 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13982 }
13983
13984 /* Setup the VSI tx/rx queue map for TC0 only for now */
13985 i40e_vsi_setup_queue_map(vsi, ctxt: &ctxt, enabled_tc, is_add: true);
13986 break;
13987
13988 case I40E_VSI_SRIOV:
13989 ctxt.pf_num = hw->pf_id;
13990 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
13991 ctxt.uplink_seid = vsi->uplink_seid;
13992 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13993 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
13994
13995 /* This VSI is connected to VEB so the switch_id
13996 * should be set to zero by default.
13997 */
13998 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13999 ctxt.info.valid_sections |=
14000 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14001 ctxt.info.switch_id =
14002 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14003 }
14004
14005 if (test_bit(I40E_FLAG_IWARP_ENA, vsi->back->flags)) {
14006 ctxt.info.valid_sections |=
14007 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
14008 ctxt.info.queueing_opt_flags |=
14009 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
14010 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
14011 }
14012
14013 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
14014 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
14015 if (pf->vf[vsi->vf_id].spoofchk) {
14016 ctxt.info.valid_sections |=
14017 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
14018 ctxt.info.sec_flags |=
14019 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
14020 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
14021 }
14022 /* Setup the VSI tx/rx queue map for TC0 only for now */
14023 i40e_vsi_setup_queue_map(vsi, ctxt: &ctxt, enabled_tc, is_add: true);
14024 break;
14025
14026 case I40E_VSI_IWARP:
14027 /* send down message to iWARP */
14028 break;
14029
14030 default:
14031 return -ENODEV;
14032 }
14033
14034 if (vsi->type != I40E_VSI_MAIN) {
14035 ret = i40e_aq_add_vsi(hw, vsi_ctx: &ctxt, NULL);
14036 if (ret) {
14037 dev_info(&vsi->back->pdev->dev,
14038 "add vsi failed, err %pe aq_err %s\n",
14039 ERR_PTR(ret),
14040 libie_aq_str(pf->hw.aq.asq_last_status));
14041 ret = -ENOENT;
14042 goto err;
14043 }
14044 vsi->info = ctxt.info;
14045 vsi->info.valid_sections = 0;
14046 vsi->seid = ctxt.seid;
14047 vsi->id = ctxt.vsi_number;
14048 }
14049
14050 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
14051 vsi->active_filters = 0;
14052 /* If macvlan filters already exist, force them to get loaded */
14053 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
14054 f->state = I40E_FILTER_NEW;
14055 f_count++;
14056 }
14057 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
14058 clear_bit(nr: __I40E_VSI_OVERFLOW_PROMISC, addr: vsi->state);
14059
14060 if (f_count) {
14061 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
14062 set_bit(nr: __I40E_MACVLAN_SYNC_PENDING, addr: pf->state);
14063 }
14064
14065 /* Update VSI BW information */
14066 ret = i40e_vsi_get_bw_info(vsi);
14067 if (ret) {
14068 dev_info(&pf->pdev->dev,
14069 "couldn't get vsi bw info, err %pe aq_err %s\n",
14070 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
14071 /* VSI is already added so not tearing that up */
14072 ret = 0;
14073 }
14074
14075err:
14076 return ret;
14077}
14078
14079/**
14080 * i40e_vsi_release - Delete a VSI and free its resources
14081 * @vsi: the VSI being removed
14082 *
14083 * Returns 0 on success or < 0 on error
14084 **/
14085int i40e_vsi_release(struct i40e_vsi *vsi)
14086{
14087 struct i40e_mac_filter *f;
14088 struct hlist_node *h;
14089 struct i40e_veb *veb;
14090 struct i40e_pf *pf;
14091 u16 uplink_seid;
14092 int i, n, bkt;
14093
14094 pf = vsi->back;
14095
14096 /* release of a VEB-owner or last VSI is not allowed */
14097 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
14098 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
14099 vsi->seid, vsi->uplink_seid);
14100 return -ENODEV;
14101 }
14102 if (vsi->type == I40E_VSI_MAIN && !test_bit(__I40E_DOWN, pf->state)) {
14103 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
14104 return -ENODEV;
14105 }
14106 set_bit(nr: __I40E_VSI_RELEASING, addr: vsi->state);
14107 uplink_seid = vsi->uplink_seid;
14108
14109 if (vsi->type != I40E_VSI_SRIOV) {
14110 if (vsi->netdev_registered) {
14111 vsi->netdev_registered = false;
14112 if (vsi->netdev) {
14113 /* results in a call to i40e_close() */
14114 unregister_netdev(dev: vsi->netdev);
14115 }
14116 } else {
14117 i40e_vsi_close(vsi);
14118 }
14119 i40e_vsi_disable_irq(vsi);
14120 }
14121
14122 if (vsi->type == I40E_VSI_MAIN)
14123 i40e_devlink_destroy_port(pf);
14124
14125 spin_lock_bh(lock: &vsi->mac_filter_hash_lock);
14126
14127 /* clear the sync flag on all filters */
14128 if (vsi->netdev) {
14129 __dev_uc_unsync(dev: vsi->netdev, NULL);
14130 __dev_mc_unsync(dev: vsi->netdev, NULL);
14131 }
14132
14133 /* make sure any remaining filters are marked for deletion */
14134 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
14135 __i40e_del_filter(vsi, f);
14136
14137 spin_unlock_bh(lock: &vsi->mac_filter_hash_lock);
14138
14139 i40e_sync_vsi_filters(vsi);
14140
14141 i40e_vsi_delete(vsi);
14142 i40e_vsi_free_q_vectors(vsi);
14143 if (vsi->netdev) {
14144 free_netdev(dev: vsi->netdev);
14145 vsi->netdev = NULL;
14146 }
14147 i40e_vsi_clear_rings(vsi);
14148 i40e_vsi_clear(vsi);
14149
14150 /* If this was the last thing on the VEB, except for the
14151 * controlling VSI, remove the VEB, which puts the controlling
14152 * VSI onto the uplink port.
14153 *
14154 * Well, okay, there's one more exception here: don't remove
14155 * the floating VEBs yet. We'll wait for an explicit remove request
14156 * from up the network stack.
14157 */
14158 veb = i40e_pf_get_veb_by_seid(pf, seid: uplink_seid);
14159 if (veb && veb->uplink_seid) {
14160 n = 0;
14161
14162 /* Count non-controlling VSIs present on the VEB */
14163 i40e_pf_for_each_vsi(pf, i, vsi)
14164 if (vsi->uplink_seid == uplink_seid &&
14165 (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14166 n++;
14167
14168 /* If there is no VSI except the control one then release
14169 * the VEB and put the control VSI onto VEB uplink.
14170 */
14171 if (!n)
14172 i40e_veb_release(veb);
14173 }
14174
14175 return 0;
14176}
14177
14178/**
14179 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
14180 * @vsi: ptr to the VSI
14181 *
14182 * This should only be called after i40e_vsi_mem_alloc() which allocates the
14183 * corresponding SW VSI structure and initializes num_queue_pairs for the
14184 * newly allocated VSI.
14185 *
14186 * Returns 0 on success or negative on failure
14187 **/
14188static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
14189{
14190 int ret = -ENOENT;
14191 struct i40e_pf *pf = vsi->back;
14192
14193 if (vsi->q_vectors[0]) {
14194 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
14195 vsi->seid);
14196 return -EEXIST;
14197 }
14198
14199 if (vsi->base_vector) {
14200 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
14201 vsi->seid, vsi->base_vector);
14202 return -EEXIST;
14203 }
14204
14205 ret = i40e_vsi_alloc_q_vectors(vsi);
14206 if (ret) {
14207 dev_info(&pf->pdev->dev,
14208 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
14209 vsi->num_q_vectors, vsi->seid, ret);
14210 vsi->num_q_vectors = 0;
14211 goto vector_setup_out;
14212 }
14213
14214 /* In Legacy mode, we do not have to get any other vector since we
14215 * piggyback on the misc/ICR0 for queue interrupts.
14216 */
14217 if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
14218 return ret;
14219 if (vsi->num_q_vectors)
14220 vsi->base_vector = i40e_get_lump(pf, pile: pf->irq_pile,
14221 needed: vsi->num_q_vectors, id: vsi->idx);
14222 if (vsi->base_vector < 0) {
14223 dev_info(&pf->pdev->dev,
14224 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
14225 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
14226 i40e_vsi_free_q_vectors(vsi);
14227 ret = -ENOENT;
14228 goto vector_setup_out;
14229 }
14230
14231vector_setup_out:
14232 return ret;
14233}
14234
14235/**
14236 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
14237 * @vsi: pointer to the vsi.
14238 *
14239 * This re-allocates a vsi's queue resources.
14240 *
14241 * Returns pointer to the successfully allocated and configured VSI sw struct
14242 * on success, otherwise returns NULL on failure.
14243 **/
14244static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
14245{
14246 struct i40e_vsi *main_vsi;
14247 u16 alloc_queue_pairs;
14248 struct i40e_pf *pf;
14249 int ret;
14250
14251 if (!vsi)
14252 return NULL;
14253
14254 pf = vsi->back;
14255
14256 i40e_put_lump(pile: pf->qp_pile, index: vsi->base_queue, id: vsi->idx);
14257 i40e_vsi_clear_rings(vsi);
14258
14259 i40e_vsi_free_arrays(vsi, free_qvectors: false);
14260 i40e_set_num_rings_in_vsi(vsi);
14261 ret = i40e_vsi_alloc_arrays(vsi, alloc_qvectors: false);
14262 if (ret)
14263 goto err_vsi;
14264
14265 alloc_queue_pairs = vsi->alloc_queue_pairs *
14266 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14267
14268 ret = i40e_get_lump(pf, pile: pf->qp_pile, needed: alloc_queue_pairs, id: vsi->idx);
14269 if (ret < 0) {
14270 dev_info(&pf->pdev->dev,
14271 "failed to get tracking for %d queues for VSI %d err %d\n",
14272 alloc_queue_pairs, vsi->seid, ret);
14273 goto err_vsi;
14274 }
14275 vsi->base_queue = ret;
14276
14277 /* Update the FW view of the VSI. Force a reset of TC and queue
14278 * layout configurations.
14279 */
14280 main_vsi = i40e_pf_get_main_vsi(pf);
14281 main_vsi->seid = pf->main_vsi_seid;
14282 i40e_vsi_reconfig_tc(vsi: main_vsi);
14283
14284 if (vsi->type == I40E_VSI_MAIN)
14285 i40e_rm_default_mac_filter(vsi, macaddr: pf->hw.mac.perm_addr);
14286
14287 /* assign it some queues */
14288 ret = i40e_alloc_rings(vsi);
14289 if (ret)
14290 goto err_rings;
14291
14292 /* map all of the rings to the q_vectors */
14293 i40e_vsi_map_rings_to_vectors(vsi);
14294 return vsi;
14295
14296err_rings:
14297 i40e_vsi_free_q_vectors(vsi);
14298 if (vsi->netdev_registered) {
14299 vsi->netdev_registered = false;
14300 unregister_netdev(dev: vsi->netdev);
14301 free_netdev(dev: vsi->netdev);
14302 vsi->netdev = NULL;
14303 }
14304 if (vsi->type == I40E_VSI_MAIN)
14305 i40e_devlink_destroy_port(pf);
14306 i40e_aq_delete_element(hw: &pf->hw, seid: vsi->seid, NULL);
14307err_vsi:
14308 i40e_vsi_clear(vsi);
14309 return NULL;
14310}
14311
14312/**
14313 * i40e_vsi_setup - Set up a VSI by a given type
14314 * @pf: board private structure
14315 * @type: VSI type
14316 * @uplink_seid: the switch element to link to
14317 * @param1: usage depends upon VSI type. For VF types, indicates VF id
14318 *
14319 * This allocates the sw VSI structure and its queue resources, then add a VSI
14320 * to the identified VEB.
14321 *
14322 * Returns pointer to the successfully allocated and configure VSI sw struct on
14323 * success, otherwise returns NULL on failure.
14324 **/
14325struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
14326 u16 uplink_seid, u32 param1)
14327{
14328 struct i40e_vsi *vsi = NULL;
14329 struct i40e_veb *veb = NULL;
14330 u16 alloc_queue_pairs;
14331 int v_idx;
14332 int ret;
14333
14334 /* The requested uplink_seid must be either
14335 * - the PF's port seid
14336 * no VEB is needed because this is the PF
14337 * or this is a Flow Director special case VSI
14338 * - seid of an existing VEB
14339 * - seid of a VSI that owns an existing VEB
14340 * - seid of a VSI that doesn't own a VEB
14341 * a new VEB is created and the VSI becomes the owner
14342 * - seid of the PF VSI, which is what creates the first VEB
14343 * this is a special case of the previous
14344 *
14345 * Find which uplink_seid we were given and create a new VEB if needed
14346 */
14347 veb = i40e_pf_get_veb_by_seid(pf, seid: uplink_seid);
14348 if (!veb && uplink_seid != pf->mac_seid) {
14349 vsi = i40e_pf_get_vsi_by_seid(pf, seid: uplink_seid);
14350 if (!vsi) {
14351 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14352 uplink_seid);
14353 return NULL;
14354 }
14355
14356 if (vsi->uplink_seid == pf->mac_seid)
14357 veb = i40e_veb_setup(pf, uplink_seid: pf->mac_seid, downlink_seid: vsi->seid,
14358 enabled_tc: vsi->tc_config.enabled_tc);
14359 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14360 veb = i40e_veb_setup(pf, uplink_seid: vsi->uplink_seid, downlink_seid: vsi->seid,
14361 enabled_tc: vsi->tc_config.enabled_tc);
14362 if (veb) {
14363 if (vsi->type != I40E_VSI_MAIN) {
14364 dev_info(&vsi->back->pdev->dev,
14365 "New VSI creation error, uplink seid of LAN VSI expected.\n");
14366 return NULL;
14367 }
14368 /* We come up by default in VEPA mode if SRIOV is not
14369 * already enabled, in which case we can't force VEPA
14370 * mode.
14371 */
14372 if (!test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
14373 veb->bridge_mode = BRIDGE_MODE_VEPA;
14374 clear_bit(nr: I40E_FLAG_VEB_MODE_ENA, addr: pf->flags);
14375 }
14376 i40e_config_bridge_mode(veb);
14377 }
14378 veb = i40e_pf_get_veb_by_seid(pf, seid: vsi->uplink_seid);
14379 if (!veb) {
14380 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14381 return NULL;
14382 }
14383
14384 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14385 uplink_seid = veb->seid;
14386 }
14387
14388 /* get vsi sw struct */
14389 v_idx = i40e_vsi_mem_alloc(pf, type);
14390 if (v_idx < 0)
14391 goto err_alloc;
14392 vsi = pf->vsi[v_idx];
14393 if (!vsi)
14394 goto err_alloc;
14395 vsi->type = type;
14396 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
14397
14398 if (type == I40E_VSI_MAIN)
14399 pf->lan_vsi = v_idx;
14400 else if (type == I40E_VSI_SRIOV)
14401 vsi->vf_id = param1;
14402 /* assign it some queues */
14403 alloc_queue_pairs = vsi->alloc_queue_pairs *
14404 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14405
14406 ret = i40e_get_lump(pf, pile: pf->qp_pile, needed: alloc_queue_pairs, id: vsi->idx);
14407 if (ret < 0) {
14408 dev_info(&pf->pdev->dev,
14409 "failed to get tracking for %d queues for VSI %d err=%d\n",
14410 alloc_queue_pairs, vsi->seid, ret);
14411 goto err_vsi;
14412 }
14413 vsi->base_queue = ret;
14414
14415 /* get a VSI from the hardware */
14416 vsi->uplink_seid = uplink_seid;
14417 ret = i40e_add_vsi(vsi);
14418 if (ret)
14419 goto err_vsi;
14420
14421 switch (vsi->type) {
14422 /* setup the netdev if needed */
14423 case I40E_VSI_MAIN:
14424 case I40E_VSI_VMDQ2:
14425 ret = i40e_config_netdev(vsi);
14426 if (ret)
14427 goto err_netdev;
14428 ret = i40e_netif_set_realnum_tx_rx_queues(vsi);
14429 if (ret)
14430 goto err_netdev;
14431 if (vsi->type == I40E_VSI_MAIN) {
14432 ret = i40e_devlink_create_port(pf);
14433 if (ret)
14434 goto err_netdev;
14435 SET_NETDEV_DEVLINK_PORT(vsi->netdev, &pf->devlink_port);
14436 }
14437 ret = register_netdev(dev: vsi->netdev);
14438 if (ret)
14439 goto err_dl_port;
14440 vsi->netdev_registered = true;
14441 netif_carrier_off(dev: vsi->netdev);
14442#ifdef CONFIG_I40E_DCB
14443 /* Setup DCB netlink interface */
14444 i40e_dcbnl_setup(vsi);
14445#endif /* CONFIG_I40E_DCB */
14446 fallthrough;
14447 case I40E_VSI_FDIR:
14448 /* set up vectors and rings if needed */
14449 ret = i40e_vsi_setup_vectors(vsi);
14450 if (ret)
14451 goto err_msix;
14452
14453 ret = i40e_alloc_rings(vsi);
14454 if (ret)
14455 goto err_rings;
14456
14457 /* map all of the rings to the q_vectors */
14458 i40e_vsi_map_rings_to_vectors(vsi);
14459
14460 i40e_vsi_reset_stats(vsi);
14461 break;
14462 default:
14463 /* no netdev or rings for the other VSI types */
14464 break;
14465 }
14466
14467 if (test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps) &&
14468 vsi->type == I40E_VSI_VMDQ2) {
14469 ret = i40e_vsi_config_rss(vsi);
14470 if (ret)
14471 goto err_config;
14472 }
14473 return vsi;
14474
14475err_config:
14476 i40e_vsi_clear_rings(vsi);
14477err_rings:
14478 i40e_vsi_free_q_vectors(vsi);
14479err_msix:
14480 if (vsi->netdev_registered) {
14481 vsi->netdev_registered = false;
14482 unregister_netdev(dev: vsi->netdev);
14483 free_netdev(dev: vsi->netdev);
14484 vsi->netdev = NULL;
14485 }
14486err_dl_port:
14487 if (vsi->type == I40E_VSI_MAIN)
14488 i40e_devlink_destroy_port(pf);
14489err_netdev:
14490 i40e_aq_delete_element(hw: &pf->hw, seid: vsi->seid, NULL);
14491err_vsi:
14492 i40e_vsi_clear(vsi);
14493err_alloc:
14494 return NULL;
14495}
14496
14497/**
14498 * i40e_veb_get_bw_info - Query VEB BW information
14499 * @veb: the veb to query
14500 *
14501 * Query the Tx scheduler BW configuration data for given VEB
14502 **/
14503static int i40e_veb_get_bw_info(struct i40e_veb *veb)
14504{
14505 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
14506 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
14507 struct i40e_pf *pf = veb->pf;
14508 struct i40e_hw *hw = &pf->hw;
14509 u32 tc_bw_max;
14510 int ret = 0;
14511 int i;
14512
14513 ret = i40e_aq_query_switch_comp_bw_config(hw, seid: veb->seid,
14514 bw_data: &bw_data, NULL);
14515 if (ret) {
14516 dev_info(&pf->pdev->dev,
14517 "query veb bw config failed, err %pe aq_err %s\n",
14518 ERR_PTR(ret), libie_aq_str(hw->aq.asq_last_status));
14519 goto out;
14520 }
14521
14522 ret = i40e_aq_query_switch_comp_ets_config(hw, seid: veb->seid,
14523 bw_data: &ets_data, NULL);
14524 if (ret) {
14525 dev_info(&pf->pdev->dev,
14526 "query veb bw ets config failed, err %pe aq_err %s\n",
14527 ERR_PTR(ret), libie_aq_str(hw->aq.asq_last_status));
14528 goto out;
14529 }
14530
14531 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
14532 veb->bw_max_quanta = ets_data.tc_bw_max;
14533 veb->is_abs_credits = bw_data.absolute_credits_enable;
14534 veb->enabled_tc = ets_data.tc_valid_bits;
14535 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
14536 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
14537 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
14538 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
14539 veb->bw_tc_limit_credits[i] =
14540 le16_to_cpu(bw_data.tc_bw_limits[i]);
14541 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
14542 }
14543
14544out:
14545 return ret;
14546}
14547
14548/**
14549 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
14550 * @pf: board private structure
14551 *
14552 * On error: returns error code (negative)
14553 * On success: returns vsi index in PF (positive)
14554 **/
14555static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14556{
14557 int ret = -ENOENT;
14558 struct i40e_veb *veb;
14559 int i;
14560
14561 /* Need to protect the allocation of switch elements at the PF level */
14562 mutex_lock(&pf->switch_mutex);
14563
14564 /* VEB list may be fragmented if VEB creation/destruction has
14565 * been happening. We can afford to do a quick scan to look
14566 * for any free slots in the list.
14567 *
14568 * find next empty veb slot, looping back around if necessary
14569 */
14570 i = 0;
14571 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14572 i++;
14573 if (i >= I40E_MAX_VEB) {
14574 ret = -ENOMEM;
14575 goto err_alloc_veb; /* out of VEB slots! */
14576 }
14577
14578 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
14579 if (!veb) {
14580 ret = -ENOMEM;
14581 goto err_alloc_veb;
14582 }
14583 veb->pf = pf;
14584 veb->idx = i;
14585 veb->enabled_tc = 1;
14586
14587 pf->veb[i] = veb;
14588 ret = i;
14589err_alloc_veb:
14590 mutex_unlock(lock: &pf->switch_mutex);
14591 return ret;
14592}
14593
14594/**
14595 * i40e_switch_branch_release - Delete a branch of the switch tree
14596 * @branch: where to start deleting
14597 *
14598 * This uses recursion to find the tips of the branch to be
14599 * removed, deleting until we get back to and can delete this VEB.
14600 **/
14601static void i40e_switch_branch_release(struct i40e_veb *branch)
14602{
14603 struct i40e_pf *pf = branch->pf;
14604 u16 branch_seid = branch->seid;
14605 u16 veb_idx = branch->idx;
14606 struct i40e_vsi *vsi;
14607 struct i40e_veb *veb;
14608 int i;
14609
14610 /* release any VEBs on this VEB - RECURSION */
14611 i40e_pf_for_each_veb(pf, i, veb)
14612 if (veb->uplink_seid == branch->seid)
14613 i40e_switch_branch_release(branch: veb);
14614
14615 /* Release the VSIs on this VEB, but not the owner VSI.
14616 *
14617 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
14618 * the VEB itself, so don't use (*branch) after this loop.
14619 */
14620 i40e_pf_for_each_vsi(pf, i, vsi)
14621 if (vsi->uplink_seid == branch_seid &&
14622 (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14623 i40e_vsi_release(vsi);
14624
14625 /* There's one corner case where the VEB might not have been
14626 * removed, so double check it here and remove it if needed.
14627 * This case happens if the veb was created from the debugfs
14628 * commands and no VSIs were added to it.
14629 */
14630 if (pf->veb[veb_idx])
14631 i40e_veb_release(veb: pf->veb[veb_idx]);
14632}
14633
14634/**
14635 * i40e_veb_clear - remove veb struct
14636 * @veb: the veb to remove
14637 **/
14638static void i40e_veb_clear(struct i40e_veb *veb)
14639{
14640 if (!veb)
14641 return;
14642
14643 if (veb->pf) {
14644 struct i40e_pf *pf = veb->pf;
14645
14646 mutex_lock(&pf->switch_mutex);
14647 if (pf->veb[veb->idx] == veb)
14648 pf->veb[veb->idx] = NULL;
14649 mutex_unlock(lock: &pf->switch_mutex);
14650 }
14651
14652 kfree(objp: veb);
14653}
14654
14655/**
14656 * i40e_veb_release - Delete a VEB and free its resources
14657 * @veb: the VEB being removed
14658 **/
14659void i40e_veb_release(struct i40e_veb *veb)
14660{
14661 struct i40e_vsi *vsi, *vsi_it;
14662 struct i40e_pf *pf;
14663 int i, n = 0;
14664
14665 pf = veb->pf;
14666
14667 /* find the remaining VSI and check for extras */
14668 i40e_pf_for_each_vsi(pf, i, vsi_it)
14669 if (vsi_it->uplink_seid == veb->seid) {
14670 if (vsi_it->flags & I40E_VSI_FLAG_VEB_OWNER)
14671 vsi = vsi_it;
14672 n++;
14673 }
14674
14675 /* Floating VEB has to be empty and regular one must have
14676 * single owner VSI.
14677 */
14678 if ((veb->uplink_seid && n != 1) || (!veb->uplink_seid && n != 0)) {
14679 dev_info(&pf->pdev->dev,
14680 "can't remove VEB %d with %d VSIs left\n",
14681 veb->seid, n);
14682 return;
14683 }
14684
14685 /* For regular VEB move the owner VSI to uplink port */
14686 if (veb->uplink_seid) {
14687 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
14688 vsi->uplink_seid = veb->uplink_seid;
14689 vsi->veb_idx = I40E_NO_VEB;
14690 }
14691
14692 i40e_aq_delete_element(hw: &pf->hw, seid: veb->seid, NULL);
14693 i40e_veb_clear(veb);
14694}
14695
14696/**
14697 * i40e_add_veb - create the VEB in the switch
14698 * @veb: the VEB to be instantiated
14699 * @vsi: the controlling VSI
14700 **/
14701static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
14702{
14703 struct i40e_pf *pf = veb->pf;
14704 bool enable_stats = !!test_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags);
14705 int ret;
14706
14707 ret = i40e_aq_add_veb(hw: &pf->hw, uplink_seid: veb->uplink_seid, downlink_seid: vsi ? vsi->seid : 0,
14708 enabled_tc: veb->enabled_tc, default_port: vsi ? false : true,
14709 pveb_seid: &veb->seid, enable_stats, NULL);
14710
14711 /* get a VEB from the hardware */
14712 if (ret) {
14713 dev_info(&pf->pdev->dev,
14714 "couldn't add VEB, err %pe aq_err %s\n",
14715 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
14716 return -EPERM;
14717 }
14718
14719 /* get statistics counter */
14720 ret = i40e_aq_get_veb_parameters(hw: &pf->hw, veb_seid: veb->seid, NULL, NULL,
14721 statistic_index: &veb->stats_idx, NULL, NULL, NULL);
14722 if (ret) {
14723 dev_info(&pf->pdev->dev,
14724 "couldn't get VEB statistics idx, err %pe aq_err %s\n",
14725 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
14726 return -EPERM;
14727 }
14728 ret = i40e_veb_get_bw_info(veb);
14729 if (ret) {
14730 dev_info(&pf->pdev->dev,
14731 "couldn't get VEB bw info, err %pe aq_err %s\n",
14732 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
14733 i40e_aq_delete_element(hw: &pf->hw, seid: veb->seid, NULL);
14734 return -ENOENT;
14735 }
14736
14737 if (vsi) {
14738 vsi->uplink_seid = veb->seid;
14739 vsi->veb_idx = veb->idx;
14740 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14741 }
14742
14743 return 0;
14744}
14745
14746/**
14747 * i40e_veb_setup - Set up a VEB
14748 * @pf: board private structure
14749 * @uplink_seid: the switch element to link to
14750 * @vsi_seid: the initial VSI seid
14751 * @enabled_tc: Enabled TC bit-map
14752 *
14753 * This allocates the sw VEB structure and links it into the switch
14754 * It is possible and legal for this to be a duplicate of an already
14755 * existing VEB. It is also possible for both uplink and vsi seids
14756 * to be zero, in order to create a floating VEB.
14757 *
14758 * Returns pointer to the successfully allocated VEB sw struct on
14759 * success, otherwise returns NULL on failure.
14760 **/
14761struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 uplink_seid,
14762 u16 vsi_seid, u8 enabled_tc)
14763{
14764 struct i40e_vsi *vsi = NULL;
14765 struct i40e_veb *veb;
14766 int veb_idx;
14767 int ret;
14768
14769 /* if one seid is 0, the other must be 0 to create a floating relay */
14770 if ((uplink_seid == 0 || vsi_seid == 0) &&
14771 (uplink_seid + vsi_seid != 0)) {
14772 dev_info(&pf->pdev->dev,
14773 "one, not both seid's are 0: uplink=%d vsi=%d\n",
14774 uplink_seid, vsi_seid);
14775 return NULL;
14776 }
14777
14778 /* make sure there is such a vsi and uplink */
14779 if (vsi_seid) {
14780 vsi = i40e_pf_get_vsi_by_seid(pf, seid: vsi_seid);
14781 if (!vsi) {
14782 dev_err(&pf->pdev->dev, "vsi seid %d not found\n",
14783 vsi_seid);
14784 return NULL;
14785 }
14786 }
14787
14788 /* get veb sw struct */
14789 veb_idx = i40e_veb_mem_alloc(pf);
14790 if (veb_idx < 0)
14791 goto err_alloc;
14792 veb = pf->veb[veb_idx];
14793 veb->uplink_seid = uplink_seid;
14794 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14795
14796 /* create the VEB in the switch */
14797 ret = i40e_add_veb(veb, vsi);
14798 if (ret)
14799 goto err_veb;
14800
14801 if (vsi && vsi->idx == pf->lan_vsi)
14802 pf->lan_veb = veb->idx;
14803
14804 return veb;
14805
14806err_veb:
14807 i40e_veb_clear(veb);
14808err_alloc:
14809 return NULL;
14810}
14811
14812/**
14813 * i40e_setup_pf_switch_element - set PF vars based on switch type
14814 * @pf: board private structure
14815 * @ele: element we are building info from
14816 * @num_reported: total number of elements
14817 * @printconfig: should we print the contents
14818 *
14819 * helper function to assist in extracting a few useful SEID values.
14820 **/
14821static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14822 struct i40e_aqc_switch_config_element_resp *ele,
14823 u16 num_reported, bool printconfig)
14824{
14825 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14826 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14827 u8 element_type = ele->element_type;
14828 u16 seid = le16_to_cpu(ele->seid);
14829 struct i40e_veb *veb;
14830
14831 if (printconfig)
14832 dev_info(&pf->pdev->dev,
14833 "type=%d seid=%d uplink=%d downlink=%d\n",
14834 element_type, seid, uplink_seid, downlink_seid);
14835
14836 switch (element_type) {
14837 case I40E_SWITCH_ELEMENT_TYPE_MAC:
14838 pf->mac_seid = seid;
14839 break;
14840 case I40E_SWITCH_ELEMENT_TYPE_VEB:
14841 /* Main VEB? */
14842 if (uplink_seid != pf->mac_seid)
14843 break;
14844 veb = i40e_pf_get_main_veb(pf);
14845 if (!veb) {
14846 int v;
14847
14848 /* find existing or else empty VEB */
14849 veb = i40e_pf_get_veb_by_seid(pf, seid);
14850 if (veb) {
14851 pf->lan_veb = veb->idx;
14852 } else {
14853 v = i40e_veb_mem_alloc(pf);
14854 if (v < 0)
14855 break;
14856 pf->lan_veb = v;
14857 }
14858 }
14859
14860 /* Try to get again main VEB as pf->lan_veb may have changed */
14861 veb = i40e_pf_get_main_veb(pf);
14862 if (!veb)
14863 break;
14864
14865 veb->seid = seid;
14866 veb->uplink_seid = pf->mac_seid;
14867 veb->pf = pf;
14868 break;
14869 case I40E_SWITCH_ELEMENT_TYPE_VSI:
14870 if (num_reported != 1)
14871 break;
14872 /* This is immediately after a reset so we can assume this is
14873 * the PF's VSI
14874 */
14875 pf->mac_seid = uplink_seid;
14876 pf->main_vsi_seid = seid;
14877 if (printconfig)
14878 dev_info(&pf->pdev->dev,
14879 "pf_seid=%d main_vsi_seid=%d\n",
14880 downlink_seid, pf->main_vsi_seid);
14881 break;
14882 case I40E_SWITCH_ELEMENT_TYPE_PF:
14883 case I40E_SWITCH_ELEMENT_TYPE_VF:
14884 case I40E_SWITCH_ELEMENT_TYPE_EMP:
14885 case I40E_SWITCH_ELEMENT_TYPE_BMC:
14886 case I40E_SWITCH_ELEMENT_TYPE_PE:
14887 case I40E_SWITCH_ELEMENT_TYPE_PA:
14888 /* ignore these for now */
14889 break;
14890 default:
14891 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
14892 element_type, seid);
14893 break;
14894 }
14895}
14896
14897/**
14898 * i40e_fetch_switch_configuration - Get switch config from firmware
14899 * @pf: board private structure
14900 * @printconfig: should we print the contents
14901 *
14902 * Get the current switch configuration from the device and
14903 * extract a few useful SEID values.
14904 **/
14905int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
14906{
14907 struct i40e_aqc_get_switch_config_resp *sw_config;
14908 u16 next_seid = 0;
14909 int ret = 0;
14910 u8 *aq_buf;
14911 int i;
14912
14913 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
14914 if (!aq_buf)
14915 return -ENOMEM;
14916
14917 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
14918 do {
14919 u16 num_reported, num_total;
14920
14921 ret = i40e_aq_get_switch_config(hw: &pf->hw, buf: sw_config,
14922 I40E_AQ_LARGE_BUF,
14923 start_seid: &next_seid, NULL);
14924 if (ret) {
14925 dev_info(&pf->pdev->dev,
14926 "get switch config failed err %d aq_err %s\n",
14927 ret, libie_aq_str(pf->hw.aq.asq_last_status));
14928 kfree(objp: aq_buf);
14929 return -ENOENT;
14930 }
14931
14932 num_reported = le16_to_cpu(sw_config->header.num_reported);
14933 num_total = le16_to_cpu(sw_config->header.num_total);
14934
14935 if (printconfig)
14936 dev_info(&pf->pdev->dev,
14937 "header: %d reported %d total\n",
14938 num_reported, num_total);
14939
14940 for (i = 0; i < num_reported; i++) {
14941 struct i40e_aqc_switch_config_element_resp *ele =
14942 &sw_config->element[i];
14943
14944 i40e_setup_pf_switch_element(pf, ele, num_reported,
14945 printconfig);
14946 }
14947 } while (next_seid != 0);
14948
14949 kfree(objp: aq_buf);
14950 return ret;
14951}
14952
14953/**
14954 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
14955 * @pf: board private structure
14956 * @reinit: if the Main VSI needs to re-initialized.
14957 * @lock_acquired: indicates whether or not the lock has been acquired
14958 *
14959 * Returns 0 on success, negative value on failure
14960 **/
14961static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired)
14962{
14963 struct i40e_vsi *main_vsi;
14964 u16 flags = 0;
14965 int ret;
14966
14967 /* find out what's out there already */
14968 ret = i40e_fetch_switch_configuration(pf, printconfig: false);
14969 if (ret) {
14970 dev_info(&pf->pdev->dev,
14971 "couldn't fetch switch config, err %pe aq_err %s\n",
14972 ERR_PTR(ret), libie_aq_str(pf->hw.aq.asq_last_status));
14973 return ret;
14974 }
14975 i40e_pf_reset_stats(pf);
14976
14977 /* set the switch config bit for the whole device to
14978 * support limited promisc or true promisc
14979 * when user requests promisc. The default is limited
14980 * promisc.
14981 */
14982
14983 if ((pf->hw.pf_id == 0) &&
14984 !test_bit(I40E_FLAG_TRUE_PROMISC_ENA, pf->flags)) {
14985 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14986 pf->last_sw_conf_flags = flags;
14987 }
14988
14989 if (pf->hw.pf_id == 0) {
14990 u16 valid_flags;
14991
14992 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14993 ret = i40e_aq_set_switch_config(hw: &pf->hw, flags, valid_flags, mode: 0,
14994 NULL);
14995 if (ret && pf->hw.aq.asq_last_status != LIBIE_AQ_RC_ESRCH) {
14996 dev_info(&pf->pdev->dev,
14997 "couldn't set switch config bits, err %pe aq_err %s\n",
14998 ERR_PTR(ret),
14999 libie_aq_str(pf->hw.aq.asq_last_status));
15000 /* not a fatal problem, just keep going */
15001 }
15002 pf->last_sw_conf_valid_flags = valid_flags;
15003 }
15004
15005 /* first time setup */
15006 main_vsi = i40e_pf_get_main_vsi(pf);
15007 if (!main_vsi || reinit) {
15008 struct i40e_veb *veb;
15009 u16 uplink_seid;
15010
15011 /* Set up the PF VSI associated with the PF's main VSI
15012 * that is already in the HW switch
15013 */
15014 veb = i40e_pf_get_main_veb(pf);
15015 if (veb)
15016 uplink_seid = veb->seid;
15017 else
15018 uplink_seid = pf->mac_seid;
15019 if (!main_vsi)
15020 main_vsi = i40e_vsi_setup(pf, type: I40E_VSI_MAIN,
15021 uplink_seid, param1: 0);
15022 else if (reinit)
15023 main_vsi = i40e_vsi_reinit_setup(vsi: main_vsi);
15024 if (!main_vsi) {
15025 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
15026 i40e_cloud_filter_exit(pf);
15027 i40e_fdir_teardown(pf);
15028 return -EAGAIN;
15029 }
15030 } else {
15031 /* force a reset of TC and queue layout configurations */
15032 main_vsi->seid = pf->main_vsi_seid;
15033 i40e_vsi_reconfig_tc(vsi: main_vsi);
15034 }
15035 i40e_vlan_stripping_disable(vsi: main_vsi);
15036
15037 i40e_fdir_sb_setup(pf);
15038
15039 /* Setup static PF queue filter control settings */
15040 ret = i40e_setup_pf_filter_control(pf);
15041 if (ret) {
15042 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
15043 ret);
15044 /* Failure here should not stop continuing other steps */
15045 }
15046
15047 /* enable RSS in the HW, even for only one queue, as the stack can use
15048 * the hash
15049 */
15050 if (test_bit(I40E_FLAG_RSS_ENA, pf->flags))
15051 i40e_pf_config_rss(pf);
15052
15053 /* fill in link information and enable LSE reporting */
15054 i40e_link_event(pf);
15055
15056 i40e_ptp_init(pf);
15057
15058 if (!lock_acquired)
15059 rtnl_lock();
15060
15061 /* repopulate tunnel port filters */
15062 udp_tunnel_nic_reset_ntf(dev: main_vsi->netdev);
15063
15064 if (!lock_acquired)
15065 rtnl_unlock();
15066
15067 return ret;
15068}
15069
15070/**
15071 * i40e_determine_queue_usage - Work out queue distribution
15072 * @pf: board private structure
15073 **/
15074static void i40e_determine_queue_usage(struct i40e_pf *pf)
15075{
15076 int queues_left;
15077 int q_max;
15078
15079 pf->num_lan_qps = 0;
15080
15081 /* Find the max queues to be put into basic use. We'll always be
15082 * using TC0, whether or not DCB is running, and TC0 will get the
15083 * big RSS set.
15084 */
15085 queues_left = pf->hw.func_caps.num_tx_qp;
15086
15087 if ((queues_left == 1) ||
15088 !test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
15089 /* one qp for PF, no queues for anything else */
15090 queues_left = 0;
15091 pf->alloc_rss_size = pf->num_lan_qps = 1;
15092
15093 /* make sure all the fancies are disabled */
15094 clear_bit(nr: I40E_FLAG_RSS_ENA, addr: pf->flags);
15095 clear_bit(nr: I40E_FLAG_IWARP_ENA, addr: pf->flags);
15096 clear_bit(nr: I40E_FLAG_FD_SB_ENA, addr: pf->flags);
15097 clear_bit(nr: I40E_FLAG_FD_ATR_ENA, addr: pf->flags);
15098 clear_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
15099 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
15100 clear_bit(nr: I40E_FLAG_SRIOV_ENA, addr: pf->flags);
15101 clear_bit(nr: I40E_FLAG_VMDQ_ENA, addr: pf->flags);
15102 set_bit(nr: I40E_FLAG_FD_SB_INACTIVE, addr: pf->flags);
15103 } else if (!test_bit(I40E_FLAG_RSS_ENA, pf->flags) &&
15104 !test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) &&
15105 !test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
15106 !test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags)) {
15107 /* one qp for PF */
15108 pf->alloc_rss_size = pf->num_lan_qps = 1;
15109 queues_left -= pf->num_lan_qps;
15110
15111 clear_bit(nr: I40E_FLAG_RSS_ENA, addr: pf->flags);
15112 clear_bit(nr: I40E_FLAG_IWARP_ENA, addr: pf->flags);
15113 clear_bit(nr: I40E_FLAG_FD_SB_ENA, addr: pf->flags);
15114 clear_bit(nr: I40E_FLAG_FD_ATR_ENA, addr: pf->flags);
15115 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
15116 clear_bit(nr: I40E_FLAG_VMDQ_ENA, addr: pf->flags);
15117 set_bit(nr: I40E_FLAG_FD_SB_INACTIVE, addr: pf->flags);
15118 } else {
15119 /* Not enough queues for all TCs */
15120 if (test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags) &&
15121 queues_left < I40E_MAX_TRAFFIC_CLASS) {
15122 clear_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
15123 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
15124 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
15125 }
15126
15127 /* limit lan qps to the smaller of qps, cpus or msix */
15128 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
15129 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
15130 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
15131 pf->num_lan_qps = q_max;
15132
15133 queues_left -= pf->num_lan_qps;
15134 }
15135
15136 if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
15137 if (queues_left > 1) {
15138 queues_left -= 1; /* save 1 queue for FD */
15139 } else {
15140 clear_bit(nr: I40E_FLAG_FD_SB_ENA, addr: pf->flags);
15141 set_bit(nr: I40E_FLAG_FD_SB_INACTIVE, addr: pf->flags);
15142 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
15143 }
15144 }
15145
15146 if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags) &&
15147 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
15148 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
15149 (queues_left / pf->num_vf_qps));
15150 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
15151 }
15152
15153 if (test_bit(I40E_FLAG_VMDQ_ENA, pf->flags) &&
15154 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
15155 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
15156 (queues_left / pf->num_vmdq_qps));
15157 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
15158 }
15159
15160 pf->queues_left = queues_left;
15161 dev_dbg(&pf->pdev->dev,
15162 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
15163 pf->hw.func_caps.num_tx_qp,
15164 !!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags),
15165 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
15166 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
15167 queues_left);
15168}
15169
15170/**
15171 * i40e_setup_pf_filter_control - Setup PF static filter control
15172 * @pf: PF to be setup
15173 *
15174 * i40e_setup_pf_filter_control sets up a PF's initial filter control
15175 * settings. If PE/FCoE are enabled then it will also set the per PF
15176 * based filter sizes required for them. It also enables Flow director,
15177 * ethertype and macvlan type filter settings for the pf.
15178 *
15179 * Returns 0 on success, negative on failure
15180 **/
15181static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
15182{
15183 struct i40e_filter_control_settings *settings = &pf->filter_settings;
15184
15185 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
15186
15187 /* Flow Director is enabled */
15188 if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) ||
15189 test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags))
15190 settings->enable_fdir = true;
15191
15192 /* Ethtype and MACVLAN filters enabled for PF */
15193 settings->enable_ethtype = true;
15194 settings->enable_macvlan = true;
15195
15196 if (i40e_set_filter_control(hw: &pf->hw, settings))
15197 return -ENOENT;
15198
15199 return 0;
15200}
15201
15202#define INFO_STRING_LEN 255
15203#define REMAIN(__x) (INFO_STRING_LEN - (__x))
15204static void i40e_print_features(struct i40e_pf *pf)
15205{
15206 struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf);
15207 struct i40e_hw *hw = &pf->hw;
15208 char *buf;
15209 int i;
15210
15211 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
15212 if (!buf)
15213 return;
15214
15215 i = snprintf(buf, INFO_STRING_LEN, fmt: "Features: PF-id[%d]", hw->pf_id);
15216#ifdef CONFIG_PCI_IOV
15217 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " VFs: %d", pf->num_req_vfs);
15218#endif
15219 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " VSIs: %d QP: %d",
15220 pf->hw.func_caps.num_vsis, main_vsi->num_queue_pairs);
15221 if (test_bit(I40E_FLAG_RSS_ENA, pf->flags))
15222 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " RSS");
15223 if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags))
15224 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " FD_ATR");
15225 if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
15226 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " FD_SB");
15227 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " NTUPLE");
15228 }
15229 if (test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
15230 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " DCB");
15231 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " VxLAN");
15232 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " Geneve");
15233 if (test_bit(I40E_FLAG_PTP_ENA, pf->flags))
15234 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " PTP");
15235 if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags))
15236 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " VEB");
15237 else
15238 i += scnprintf(buf: &buf[i], REMAIN(i), fmt: " VEPA");
15239
15240 dev_info(&pf->pdev->dev, "%s\n", buf);
15241 kfree(objp: buf);
15242 WARN_ON(i > INFO_STRING_LEN);
15243}
15244
15245/**
15246 * i40e_get_platform_mac_addr - get platform-specific MAC address
15247 * @pdev: PCI device information struct
15248 * @pf: board private structure
15249 *
15250 * Look up the MAC address for the device. First we'll try
15251 * eth_platform_get_mac_address, which will check Open Firmware, or arch
15252 * specific fallback. Otherwise, we'll default to the stored value in
15253 * firmware.
15254 **/
15255static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
15256{
15257 if (eth_platform_get_mac_address(dev: &pdev->dev, mac_addr: pf->hw.mac.addr))
15258 i40e_get_mac_addr(hw: &pf->hw, mac_addr: pf->hw.mac.addr);
15259}
15260
15261/**
15262 * i40e_set_fec_in_flags - helper function for setting FEC options in flags
15263 * @fec_cfg: FEC option to set in flags
15264 * @flags: ptr to flags in which we set FEC option
15265 **/
15266void i40e_set_fec_in_flags(u8 fec_cfg, unsigned long *flags)
15267{
15268 if (fec_cfg & I40E_AQ_SET_FEC_AUTO) {
15269 set_bit(nr: I40E_FLAG_RS_FEC, addr: flags);
15270 set_bit(nr: I40E_FLAG_BASE_R_FEC, addr: flags);
15271 }
15272 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
15273 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
15274 set_bit(nr: I40E_FLAG_RS_FEC, addr: flags);
15275 clear_bit(nr: I40E_FLAG_BASE_R_FEC, addr: flags);
15276 }
15277 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
15278 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
15279 set_bit(nr: I40E_FLAG_BASE_R_FEC, addr: flags);
15280 clear_bit(nr: I40E_FLAG_RS_FEC, addr: flags);
15281 }
15282 if (fec_cfg == 0) {
15283 clear_bit(nr: I40E_FLAG_RS_FEC, addr: flags);
15284 clear_bit(nr: I40E_FLAG_BASE_R_FEC, addr: flags);
15285 }
15286}
15287
15288/**
15289 * i40e_check_recovery_mode - check if we are running transition firmware
15290 * @pf: board private structure
15291 *
15292 * Check registers indicating the firmware runs in recovery mode. Sets the
15293 * appropriate driver state.
15294 *
15295 * Returns true if the recovery mode was detected, false otherwise
15296 **/
15297static bool i40e_check_recovery_mode(struct i40e_pf *pf)
15298{
15299 u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
15300
15301 if (val & I40E_GL_FWSTS_FWS1B_MASK) {
15302 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
15303 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
15304 set_bit(nr: __I40E_RECOVERY_MODE, addr: pf->state);
15305
15306 return true;
15307 }
15308 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15309 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15310
15311 return false;
15312}
15313
15314/**
15315 * i40e_pf_loop_reset - perform reset in a loop.
15316 * @pf: board private structure
15317 *
15318 * This function is useful when a NIC is about to enter recovery mode.
15319 * When a NIC's internal data structures are corrupted the NIC's
15320 * firmware is going to enter recovery mode.
15321 * Right after a POR it takes about 7 minutes for firmware to enter
15322 * recovery mode. Until that time a NIC is in some kind of intermediate
15323 * state. After that time period the NIC almost surely enters
15324 * recovery mode. The only way for a driver to detect intermediate
15325 * state is to issue a series of pf-resets and check a return value.
15326 * If a PF reset returns success then the firmware could be in recovery
15327 * mode so the caller of this code needs to check for recovery mode
15328 * if this function returns success. There is a little chance that
15329 * firmware will hang in intermediate state forever.
15330 * Since waiting 7 minutes is quite a lot of time this function waits
15331 * 10 seconds and then gives up by returning an error.
15332 *
15333 * Return 0 on success, negative on failure.
15334 **/
15335static int i40e_pf_loop_reset(struct i40e_pf *pf)
15336{
15337 /* wait max 10 seconds for PF reset to succeed */
15338 const unsigned long time_end = jiffies + 10 * HZ;
15339 struct i40e_hw *hw = &pf->hw;
15340 int ret;
15341
15342 ret = i40e_pf_reset(hw);
15343 while (ret != 0 && time_before(jiffies, time_end)) {
15344 usleep_range(min: 10000, max: 20000);
15345 ret = i40e_pf_reset(hw);
15346 }
15347
15348 if (ret == 0)
15349 pf->pfr_count++;
15350 else
15351 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15352
15353 return ret;
15354}
15355
15356/**
15357 * i40e_check_fw_empr - check if FW issued unexpected EMP Reset
15358 * @pf: board private structure
15359 *
15360 * Check FW registers to determine if FW issued unexpected EMP Reset.
15361 * Every time when unexpected EMP Reset occurs the FW increments
15362 * a counter of unexpected EMP Resets. When the counter reaches 10
15363 * the FW should enter the Recovery mode
15364 *
15365 * Returns true if FW issued unexpected EMP Reset
15366 **/
15367static bool i40e_check_fw_empr(struct i40e_pf *pf)
15368{
15369 const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15370 I40E_GL_FWSTS_FWS1B_MASK;
15371 return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) &&
15372 (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10);
15373}
15374
15375/**
15376 * i40e_handle_resets - handle EMP resets and PF resets
15377 * @pf: board private structure
15378 *
15379 * Handle both EMP resets and PF resets and conclude whether there are
15380 * any issues regarding these resets. If there are any issues then
15381 * generate log entry.
15382 *
15383 * Return 0 if NIC is healthy or negative value when there are issues
15384 * with resets
15385 **/
15386static int i40e_handle_resets(struct i40e_pf *pf)
15387{
15388 const int pfr = i40e_pf_loop_reset(pf);
15389 const bool is_empr = i40e_check_fw_empr(pf);
15390
15391 if (is_empr || pfr != 0)
15392 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15393
15394 return is_empr ? -EIO : pfr;
15395}
15396
15397/**
15398 * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
15399 * @pf: board private structure
15400 * @hw: ptr to the hardware info
15401 *
15402 * This function does a minimal setup of all subsystems needed for running
15403 * recovery mode.
15404 *
15405 * Returns 0 on success, negative on failure
15406 **/
15407static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15408{
15409 struct i40e_vsi *vsi;
15410 int err;
15411 int v_idx;
15412
15413 pci_set_drvdata(pdev: pf->pdev, data: pf);
15414 pci_save_state(dev: pf->pdev);
15415
15416 /* set up periodic task facility */
15417 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15418 pf->service_timer_period = HZ;
15419
15420 INIT_WORK(&pf->service_task, i40e_service_task);
15421 clear_bit(nr: __I40E_SERVICE_SCHED, addr: pf->state);
15422
15423 err = i40e_init_interrupt_scheme(pf);
15424 if (err)
15425 goto err_switch_setup;
15426
15427 /* The number of VSIs reported by the FW is the minimum guaranteed
15428 * to us; HW supports far more and we share the remaining pool with
15429 * the other PFs. We allocate space for more than the guarantee with
15430 * the understanding that we might not get them all later.
15431 */
15432 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15433 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15434 else
15435 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15436
15437 /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
15438 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15439 GFP_KERNEL);
15440 if (!pf->vsi) {
15441 err = -ENOMEM;
15442 goto err_switch_setup;
15443 }
15444
15445 /* We allocate one VSI which is needed as absolute minimum
15446 * in order to register the netdev
15447 */
15448 v_idx = i40e_vsi_mem_alloc(pf, type: I40E_VSI_MAIN);
15449 if (v_idx < 0) {
15450 err = v_idx;
15451 goto err_switch_setup;
15452 }
15453 pf->lan_vsi = v_idx;
15454 vsi = pf->vsi[v_idx];
15455 if (!vsi) {
15456 err = -EFAULT;
15457 goto err_switch_setup;
15458 }
15459 vsi->alloc_queue_pairs = 1;
15460 err = i40e_config_netdev(vsi);
15461 if (err)
15462 goto err_switch_setup;
15463 err = register_netdev(dev: vsi->netdev);
15464 if (err)
15465 goto err_switch_setup;
15466 vsi->netdev_registered = true;
15467 i40e_dbg_pf_init(pf);
15468
15469 err = i40e_setup_misc_vector_for_recovery_mode(pf);
15470 if (err)
15471 goto err_switch_setup;
15472
15473 /* tell the firmware that we're starting */
15474 i40e_send_version(pf);
15475
15476 /* since everything's happy, start the service_task timer */
15477 mod_timer(timer: &pf->service_timer,
15478 expires: round_jiffies(j: jiffies + pf->service_timer_period));
15479
15480 return 0;
15481
15482err_switch_setup:
15483 i40e_reset_interrupt_capability(pf);
15484 timer_shutdown_sync(timer: &pf->service_timer);
15485 i40e_shutdown_adminq(hw);
15486 iounmap(addr: hw->hw_addr);
15487 pci_release_mem_regions(pdev: pf->pdev);
15488 pci_disable_device(dev: pf->pdev);
15489 i40e_free_pf(pf);
15490
15491 return err;
15492}
15493
15494/**
15495 * i40e_set_subsystem_device_id - set subsystem device id
15496 * @hw: pointer to the hardware info
15497 *
15498 * Set PCI subsystem device id either from a pci_dev structure or
15499 * a specific FW register.
15500 **/
15501static inline void i40e_set_subsystem_device_id(struct i40e_hw *hw)
15502{
15503 struct i40e_pf *pf = i40e_hw_to_pf(hw);
15504
15505 hw->subsystem_device_id = pf->pdev->subsystem_device ?
15506 pf->pdev->subsystem_device :
15507 (ushort)(rd32(hw, I40E_PFPCI_SUBSYSID) & USHRT_MAX);
15508}
15509
15510/**
15511 * i40e_probe - Device initialization routine
15512 * @pdev: PCI device information struct
15513 * @ent: entry in i40e_pci_tbl
15514 *
15515 * i40e_probe initializes a PF identified by a pci_dev structure.
15516 * The OS initialization, configuring of the PF private structure,
15517 * and a hardware reset occur.
15518 *
15519 * Returns 0 on success, negative on failure
15520 **/
15521static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15522{
15523 struct i40e_aq_get_phy_abilities_resp abilities;
15524#ifdef CONFIG_I40E_DCB
15525 enum i40e_get_fw_lldp_status_resp lldp_status;
15526#endif /* CONFIG_I40E_DCB */
15527 struct i40e_vsi *vsi;
15528 struct i40e_pf *pf;
15529 struct i40e_hw *hw;
15530 u16 wol_nvm_bits;
15531 char nvm_ver[32];
15532 u16 link_status;
15533#ifdef CONFIG_I40E_DCB
15534 int status;
15535#endif /* CONFIG_I40E_DCB */
15536 int err;
15537 u32 val;
15538
15539 err = pci_enable_device_mem(dev: pdev);
15540 if (err)
15541 return err;
15542
15543 /* set up for high or low dma */
15544 err = dma_set_mask_and_coherent(dev: &pdev->dev, DMA_BIT_MASK(64));
15545 if (err) {
15546 dev_err(&pdev->dev,
15547 "DMA configuration failed: 0x%x\n", err);
15548 goto err_dma;
15549 }
15550
15551 /* set up pci connections */
15552 err = pci_request_mem_regions(pdev, name: i40e_driver_name);
15553 if (err) {
15554 dev_info(&pdev->dev,
15555 "pci_request_selected_regions failed %d\n", err);
15556 goto err_pci_reg;
15557 }
15558
15559 pci_set_master(dev: pdev);
15560
15561 /* Now that we have a PCI connection, we need to do the
15562 * low level device setup. This is primarily setting up
15563 * the Admin Queue structures and then querying for the
15564 * device's current profile information.
15565 */
15566 pf = i40e_alloc_pf(dev: &pdev->dev);
15567 if (!pf) {
15568 err = -ENOMEM;
15569 goto err_pf_alloc;
15570 }
15571 pf->next_vsi = 0;
15572 pf->pdev = pdev;
15573 set_bit(nr: __I40E_DOWN, addr: pf->state);
15574
15575 hw = &pf->hw;
15576
15577 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15578 I40E_MAX_CSR_SPACE);
15579 /* We believe that the highest register to read is
15580 * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
15581 * is not less than that before mapping to prevent a
15582 * kernel panic.
15583 */
15584 if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15585 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
15586 pf->ioremap_len);
15587 err = -ENOMEM;
15588 goto err_ioremap;
15589 }
15590 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), size: pf->ioremap_len);
15591 if (!hw->hw_addr) {
15592 err = -EIO;
15593 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
15594 (unsigned int)pci_resource_start(pdev, 0),
15595 pf->ioremap_len, err);
15596 goto err_ioremap;
15597 }
15598 hw->vendor_id = pdev->vendor;
15599 hw->device_id = pdev->device;
15600 pci_read_config_byte(dev: pdev, PCI_REVISION_ID, val: &hw->revision_id);
15601 hw->subsystem_vendor_id = pdev->subsystem_vendor;
15602 i40e_set_subsystem_device_id(hw);
15603 hw->bus.device = PCI_SLOT(pdev->devfn);
15604 hw->bus.func = PCI_FUNC(pdev->devfn);
15605 hw->bus.bus_id = pdev->bus->number;
15606
15607 /* Select something other than the 802.1ad ethertype for the
15608 * switch to use internally and drop on ingress.
15609 */
15610 hw->switch_tag = 0xffff;
15611 hw->first_tag = ETH_P_8021AD;
15612 hw->second_tag = ETH_P_8021Q;
15613
15614 INIT_LIST_HEAD(list: &pf->l3_flex_pit_list);
15615 INIT_LIST_HEAD(list: &pf->l4_flex_pit_list);
15616 INIT_LIST_HEAD(list: &pf->ddp_old_prof);
15617
15618 /* set up the locks for the AQ, do this only once in probe
15619 * and destroy them only once in remove
15620 */
15621 mutex_init(&hw->aq.asq_mutex);
15622 mutex_init(&hw->aq.arq_mutex);
15623
15624 pf->msg_enable = netif_msg_init(debug_value: debug,
15625 NETIF_MSG_DRV |
15626 NETIF_MSG_PROBE |
15627 NETIF_MSG_LINK);
15628 if (debug < -1)
15629 pf->hw.debug_mask = debug;
15630
15631 /* do a special CORER for clearing PXE mode once at init */
15632 if (hw->revision_id == 0 &&
15633 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
15634 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
15635 i40e_flush(hw);
15636 msleep(msecs: 200);
15637 pf->corer_count++;
15638
15639 i40e_clear_pxe_mode(hw);
15640 }
15641
15642 /* Reset here to make sure all is clean and to define PF 'n' */
15643 i40e_clear_hw(hw);
15644
15645 err = i40e_set_mac_type(hw);
15646 if (err) {
15647 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15648 err);
15649 goto err_pf_reset;
15650 }
15651
15652 err = i40e_handle_resets(pf);
15653 if (err)
15654 goto err_pf_reset;
15655
15656 i40e_check_recovery_mode(pf);
15657
15658 if (is_kdump_kernel()) {
15659 hw->aq.num_arq_entries = I40E_MIN_ARQ_LEN;
15660 hw->aq.num_asq_entries = I40E_MIN_ASQ_LEN;
15661 } else {
15662 hw->aq.num_arq_entries = I40E_AQ_LEN;
15663 hw->aq.num_asq_entries = I40E_AQ_LEN;
15664 }
15665 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15666 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15667
15668 snprintf(buf: pf->int_name, size: sizeof(pf->int_name) - 1,
15669 fmt: "%s-%s:misc",
15670 dev_driver_string(dev: &pf->pdev->dev), dev_name(dev: &pdev->dev));
15671
15672 err = i40e_init_shared_code(hw);
15673 if (err) {
15674 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15675 err);
15676 goto err_pf_reset;
15677 }
15678
15679 /* set up a default setting for link flow control */
15680 pf->hw.fc.requested_mode = I40E_FC_NONE;
15681
15682 err = i40e_init_adminq(hw);
15683 if (err) {
15684 if (err == -EIO)
15685 dev_info(&pdev->dev,
15686 "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
15687 hw->aq.api_maj_ver,
15688 hw->aq.api_min_ver,
15689 I40E_FW_API_VERSION_MAJOR,
15690 I40E_FW_MINOR_VERSION(hw));
15691 else
15692 dev_info(&pdev->dev,
15693 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
15694
15695 goto err_pf_reset;
15696 }
15697 i40e_get_oem_version(hw);
15698 i40e_get_pba_string(hw);
15699
15700 /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
15701 i40e_nvm_version_str(hw, buf: nvm_ver, len: sizeof(nvm_ver));
15702 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
15703 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
15704 hw->aq.api_maj_ver, hw->aq.api_min_ver, nvm_ver,
15705 hw->vendor_id, hw->device_id, hw->subsystem_vendor_id,
15706 hw->subsystem_device_id);
15707
15708 if (i40e_is_aq_api_ver_ge(hw, I40E_FW_API_VERSION_MAJOR,
15709 I40E_FW_MINOR_VERSION(hw) + 1))
15710 dev_dbg(&pdev->dev,
15711 "The driver for the device detected a newer version of the NVM image v%u.%u than v%u.%u.\n",
15712 hw->aq.api_maj_ver,
15713 hw->aq.api_min_ver,
15714 I40E_FW_API_VERSION_MAJOR,
15715 I40E_FW_MINOR_VERSION(hw));
15716 else if (i40e_is_aq_api_ver_lt(hw, maj: 1, min: 4))
15717 dev_info(&pdev->dev,
15718 "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
15719 hw->aq.api_maj_ver,
15720 hw->aq.api_min_ver,
15721 I40E_FW_API_VERSION_MAJOR,
15722 I40E_FW_MINOR_VERSION(hw));
15723
15724 i40e_verify_eeprom(pf);
15725
15726 /* Rev 0 hardware was never productized */
15727 if (hw->revision_id < 1)
15728 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
15729
15730 i40e_clear_pxe_mode(hw);
15731
15732 err = i40e_get_capabilities(pf, list_type: i40e_aqc_opc_list_func_capabilities);
15733 if (err)
15734 goto err_adminq_setup;
15735
15736 err = i40e_sw_init(pf);
15737 if (err) {
15738 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
15739 goto err_sw_init;
15740 }
15741
15742 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15743 return i40e_init_recovery_mode(pf, hw);
15744
15745 err = i40e_init_lan_hmc(hw, txq_num: hw->func_caps.num_tx_qp,
15746 rxq_num: hw->func_caps.num_rx_qp, fcoe_cntx_num: 0, fcoe_filt_num: 0);
15747 if (err) {
15748 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
15749 goto err_init_lan_hmc;
15750 }
15751
15752 err = i40e_configure_lan_hmc(hw, model: I40E_HMC_MODEL_DIRECT_ONLY);
15753 if (err) {
15754 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
15755 err = -ENOENT;
15756 goto err_configure_lan_hmc;
15757 }
15758
15759 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
15760 * Ignore error return codes because if it was already disabled via
15761 * hardware settings this will fail
15762 */
15763 if (test_bit(I40E_HW_CAP_STOP_FW_LLDP, pf->hw.caps)) {
15764 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
15765 i40e_aq_stop_lldp(hw, shutdown_agent: true, persist: false, NULL);
15766 }
15767
15768 /* allow a platform config to override the HW addr */
15769 i40e_get_platform_mac_addr(pdev, pf);
15770
15771 if (!is_valid_ether_addr(addr: hw->mac.addr)) {
15772 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15773 err = -EIO;
15774 goto err_mac_addr;
15775 }
15776 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15777 ether_addr_copy(dst: hw->mac.perm_addr, src: hw->mac.addr);
15778 i40e_get_port_mac_addr(hw, mac_addr: hw->mac.port_addr);
15779 if (is_valid_ether_addr(addr: hw->mac.port_addr))
15780 set_bit(nr: I40E_HW_CAP_PORT_ID_VALID, addr: pf->hw.caps);
15781
15782 i40e_ptp_alloc_pins(pf);
15783 pci_set_drvdata(pdev, data: pf);
15784 pci_save_state(dev: pdev);
15785
15786#ifdef CONFIG_I40E_DCB
15787 status = i40e_get_fw_lldp_status(hw: &pf->hw, lldp_status: &lldp_status);
15788 (!status &&
15789 lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ?
15790 (clear_bit(nr: I40E_FLAG_FW_LLDP_DIS, addr: pf->flags)) :
15791 (set_bit(nr: I40E_FLAG_FW_LLDP_DIS, addr: pf->flags));
15792 dev_info(&pdev->dev,
15793 test_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags) ?
15794 "FW LLDP is disabled\n" :
15795 "FW LLDP is enabled\n");
15796
15797 /* Enable FW to write default DCB config on link-up */
15798 i40e_aq_set_dcb_parameters(hw, dcb_enable: true, NULL);
15799
15800 err = i40e_init_pf_dcb(pf);
15801 if (err) {
15802 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15803 clear_bit(nr: I40E_FLAG_DCB_CAPABLE, addr: pf->flags);
15804 clear_bit(nr: I40E_FLAG_DCB_ENA, addr: pf->flags);
15805 /* Continue without DCB enabled */
15806 }
15807#endif /* CONFIG_I40E_DCB */
15808
15809 /* set up periodic task facility */
15810 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15811 pf->service_timer_period = HZ;
15812
15813 INIT_WORK(&pf->service_task, i40e_service_task);
15814 clear_bit(nr: __I40E_SERVICE_SCHED, addr: pf->state);
15815
15816 /* NVM bit on means WoL disabled for the port */
15817 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, data: &wol_nvm_bits);
15818 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15819 pf->wol_en = false;
15820 else
15821 pf->wol_en = true;
15822 device_set_wakeup_enable(dev: &pf->pdev->dev, enable: pf->wol_en);
15823
15824 /* set up the main switch operations */
15825 i40e_determine_queue_usage(pf);
15826 err = i40e_init_interrupt_scheme(pf);
15827 if (err)
15828 goto err_switch_setup;
15829
15830 /* Reduce Tx and Rx pairs for kdump
15831 * When MSI-X is enabled, it's not allowed to use more TC queue
15832 * pairs than MSI-X vectors (pf->num_lan_msix) exist. Thus
15833 * vsi->num_queue_pairs will be equal to pf->num_lan_msix, i.e., 1.
15834 */
15835 if (is_kdump_kernel())
15836 pf->num_lan_msix = 1;
15837
15838 pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
15839 pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
15840 pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
15841 pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
15842 pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
15843 UDP_TUNNEL_TYPE_GENEVE;
15844
15845 /* The number of VSIs reported by the FW is the minimum guaranteed
15846 * to us; HW supports far more and we share the remaining pool with
15847 * the other PFs. We allocate space for more than the guarantee with
15848 * the understanding that we might not get them all later.
15849 */
15850 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15851 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15852 else
15853 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15854 if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
15855 dev_warn(&pf->pdev->dev,
15856 "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
15857 pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
15858 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
15859 }
15860
15861 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
15862 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15863 GFP_KERNEL);
15864 if (!pf->vsi) {
15865 err = -ENOMEM;
15866 goto err_switch_setup;
15867 }
15868
15869#ifdef CONFIG_PCI_IOV
15870 /* prep for VF support */
15871 if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags) &&
15872 test_bit(I40E_FLAG_MSIX_ENA, pf->flags) &&
15873 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15874 if (pci_num_vf(dev: pdev))
15875 set_bit(nr: I40E_FLAG_VEB_MODE_ENA, addr: pf->flags);
15876 }
15877#endif
15878 err = i40e_setup_pf_switch(pf, reinit: false, lock_acquired: false);
15879 if (err) {
15880 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
15881 goto err_vsis;
15882 }
15883
15884 vsi = i40e_pf_get_main_vsi(pf);
15885 INIT_LIST_HEAD(list: &vsi->ch_list);
15886
15887 /* if FDIR VSI was set up, start it now */
15888 vsi = i40e_find_vsi_by_type(pf, type: I40E_VSI_FDIR);
15889 if (vsi)
15890 i40e_vsi_open(vsi);
15891
15892 /* The driver only wants link up/down and module qualification
15893 * reports from firmware. Note the negative logic.
15894 */
15895 err = i40e_aq_set_phy_int_mask(hw: &pf->hw,
15896 mask: ~(I40E_AQ_EVENT_LINK_UPDOWN |
15897 I40E_AQ_EVENT_MEDIA_NA |
15898 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
15899 if (err)
15900 dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
15901 ERR_PTR(err), libie_aq_str(pf->hw.aq.asq_last_status));
15902
15903 /* VF MDD event logs are rate limited to one second intervals */
15904 ratelimit_state_init(rs: &pf->mdd_message_rate_limit, interval: 1 * HZ, burst: 1);
15905
15906 /* Reconfigure hardware for allowing smaller MSS in the case
15907 * of TSO, so that we avoid the MDD being fired and causing
15908 * a reset in the case of small MSS+TSO.
15909 */
15910 val = rd32(hw, I40E_REG_MSS);
15911 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
15912 val &= ~I40E_REG_MSS_MIN_MASK;
15913 val |= I40E_64BYTE_MSS;
15914 wr32(hw, I40E_REG_MSS, val);
15915 }
15916
15917 if (test_bit(I40E_HW_CAP_RESTART_AUTONEG, pf->hw.caps)) {
15918 msleep(msecs: 75);
15919 err = i40e_aq_set_link_restart_an(hw: &pf->hw, enable_link: true, NULL);
15920 if (err)
15921 dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
15922 ERR_PTR(err),
15923 libie_aq_str(pf->hw.aq.asq_last_status));
15924 }
15925 /* The main driver is (mostly) up and happy. We need to set this state
15926 * before setting up the misc vector or we get a race and the vector
15927 * ends up disabled forever.
15928 */
15929 clear_bit(nr: __I40E_DOWN, addr: pf->state);
15930
15931 /* In case of MSIX we are going to setup the misc vector right here
15932 * to handle admin queue events etc. In case of legacy and MSI
15933 * the misc functionality and queue processing is combined in
15934 * the same vector and that gets setup at open.
15935 */
15936 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
15937 err = i40e_setup_misc_vector(pf);
15938 if (err) {
15939 dev_info(&pdev->dev,
15940 "setup of misc vector failed: %d\n", err);
15941 i40e_cloud_filter_exit(pf);
15942 i40e_fdir_teardown(pf);
15943 goto err_vsis;
15944 }
15945 }
15946
15947#ifdef CONFIG_PCI_IOV
15948 /* prep for VF support */
15949 if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags) &&
15950 test_bit(I40E_FLAG_MSIX_ENA, pf->flags) &&
15951 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15952 /* disable link interrupts for VFs */
15953 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
15954 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
15955 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
15956 i40e_flush(hw);
15957
15958 if (pci_num_vf(dev: pdev)) {
15959 dev_info(&pdev->dev,
15960 "Active VFs found, allocating resources.\n");
15961 err = i40e_alloc_vfs(pf, num_alloc_vfs: pci_num_vf(dev: pdev));
15962 if (err)
15963 dev_info(&pdev->dev,
15964 "Error %d allocating resources for existing VFs\n",
15965 err);
15966 }
15967 }
15968#endif /* CONFIG_PCI_IOV */
15969
15970 if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
15971 pf->iwarp_base_vector = i40e_get_lump(pf, pile: pf->irq_pile,
15972 needed: pf->num_iwarp_msix,
15973 I40E_IWARP_IRQ_PILE_ID);
15974 if (pf->iwarp_base_vector < 0) {
15975 dev_info(&pdev->dev,
15976 "failed to get tracking for %d vectors for IWARP err=%d\n",
15977 pf->num_iwarp_msix, pf->iwarp_base_vector);
15978 clear_bit(nr: I40E_FLAG_IWARP_ENA, addr: pf->flags);
15979 }
15980 }
15981
15982 i40e_dbg_pf_init(pf);
15983
15984 /* tell the firmware that we're starting */
15985 i40e_send_version(pf);
15986
15987 /* since everything's happy, start the service_task timer */
15988 mod_timer(timer: &pf->service_timer,
15989 expires: round_jiffies(j: jiffies + pf->service_timer_period));
15990
15991 /* add this PF to client device list and launch a client service task */
15992 if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
15993 err = i40e_lan_add_device(pf);
15994 if (err)
15995 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
15996 err);
15997 }
15998
15999#define PCI_SPEED_SIZE 8
16000#define PCI_WIDTH_SIZE 8
16001 /* Devices on the IOSF bus do not have this information
16002 * and will report PCI Gen 1 x 1 by default so don't bother
16003 * checking them.
16004 */
16005 if (!test_bit(I40E_HW_CAP_NO_PCI_LINK_CHECK, pf->hw.caps)) {
16006 char speed[PCI_SPEED_SIZE] = "Unknown";
16007 char width[PCI_WIDTH_SIZE] = "Unknown";
16008
16009 /* Get the negotiated link width and speed from PCI config
16010 * space
16011 */
16012 pcie_capability_read_word(dev: pf->pdev, PCI_EXP_LNKSTA,
16013 val: &link_status);
16014
16015 i40e_set_pci_config_data(hw, link_status);
16016
16017 switch (hw->bus.speed) {
16018 case i40e_bus_speed_8000:
16019 strscpy(speed, "8.0", PCI_SPEED_SIZE); break;
16020 case i40e_bus_speed_5000:
16021 strscpy(speed, "5.0", PCI_SPEED_SIZE); break;
16022 case i40e_bus_speed_2500:
16023 strscpy(speed, "2.5", PCI_SPEED_SIZE); break;
16024 default:
16025 break;
16026 }
16027 switch (hw->bus.width) {
16028 case i40e_bus_width_pcie_x8:
16029 strscpy(width, "8", PCI_WIDTH_SIZE); break;
16030 case i40e_bus_width_pcie_x4:
16031 strscpy(width, "4", PCI_WIDTH_SIZE); break;
16032 case i40e_bus_width_pcie_x2:
16033 strscpy(width, "2", PCI_WIDTH_SIZE); break;
16034 case i40e_bus_width_pcie_x1:
16035 strscpy(width, "1", PCI_WIDTH_SIZE); break;
16036 default:
16037 break;
16038 }
16039
16040 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
16041 speed, width);
16042
16043 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
16044 hw->bus.speed < i40e_bus_speed_8000) {
16045 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
16046 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
16047 }
16048 }
16049
16050 /* get the requested speeds from the fw */
16051 err = i40e_aq_get_phy_capabilities(hw, qualified_modules: false, report_init: false, abilities: &abilities, NULL);
16052 if (err)
16053 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %pe last_status = %s\n",
16054 ERR_PTR(err), libie_aq_str(pf->hw.aq.asq_last_status));
16055 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
16056
16057 /* set the FEC config due to the board capabilities */
16058 i40e_set_fec_in_flags(fec_cfg: abilities.fec_cfg_curr_mod_ext_info, flags: pf->flags);
16059
16060 /* get the supported phy types from the fw */
16061 err = i40e_aq_get_phy_capabilities(hw, qualified_modules: false, report_init: true, abilities: &abilities, NULL);
16062 if (err)
16063 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %pe last_status = %s\n",
16064 ERR_PTR(err), libie_aq_str(pf->hw.aq.asq_last_status));
16065
16066#define MAX_FRAME_SIZE_DEFAULT 0x2600
16067
16068 err = i40e_aq_set_mac_config(hw, MAX_FRAME_SIZE_DEFAULT, NULL);
16069 if (err)
16070 dev_warn(&pdev->dev, "set mac config ret = %pe last_status = %s\n",
16071 ERR_PTR(err), libie_aq_str(pf->hw.aq.asq_last_status));
16072
16073 /* Make sure the MFS is set to the expected value */
16074 val = rd32(hw, I40E_PRTGL_SAH);
16075 FIELD_MODIFY(I40E_PRTGL_SAH_MFS_MASK, &val, MAX_FRAME_SIZE_DEFAULT);
16076 wr32(hw, I40E_PRTGL_SAH, val);
16077
16078 /* Add a filter to drop all Flow control frames from any VSI from being
16079 * transmitted. By doing so we stop a malicious VF from sending out
16080 * PAUSE or PFC frames and potentially controlling traffic for other
16081 * PF/VF VSIs.
16082 * The FW can still send Flow control frames if enabled.
16083 */
16084 i40e_add_filter_to_drop_tx_flow_control_frames(hw: &pf->hw,
16085 vsi_seid: pf->main_vsi_seid);
16086
16087 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
16088 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
16089 set_bit(nr: I40E_HW_CAP_PHY_CONTROLS_LEDS, addr: pf->hw.caps);
16090 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
16091 set_bit(nr: I40E_HW_CAP_CRT_RETIMER, addr: pf->hw.caps);
16092 /* print a string summarizing features */
16093 i40e_print_features(pf);
16094
16095 i40e_devlink_register(pf);
16096
16097 return 0;
16098
16099 /* Unwind what we've done if something failed in the setup */
16100err_vsis:
16101 set_bit(nr: __I40E_DOWN, addr: pf->state);
16102 i40e_clear_interrupt_scheme(pf);
16103 kfree(objp: pf->vsi);
16104err_switch_setup:
16105 i40e_reset_interrupt_capability(pf);
16106 timer_shutdown_sync(timer: &pf->service_timer);
16107err_mac_addr:
16108err_configure_lan_hmc:
16109 (void)i40e_shutdown_lan_hmc(hw);
16110err_init_lan_hmc:
16111 kfree(objp: pf->qp_pile);
16112err_sw_init:
16113err_adminq_setup:
16114err_pf_reset:
16115 iounmap(addr: hw->hw_addr);
16116err_ioremap:
16117 i40e_free_pf(pf);
16118err_pf_alloc:
16119 pci_release_mem_regions(pdev);
16120err_pci_reg:
16121err_dma:
16122 pci_disable_device(dev: pdev);
16123 return err;
16124}
16125
16126/**
16127 * i40e_remove - Device removal routine
16128 * @pdev: PCI device information struct
16129 *
16130 * i40e_remove is called by the PCI subsystem to alert the driver
16131 * that is should release a PCI device. This could be caused by a
16132 * Hot-Plug event, or because the driver is going to be removed from
16133 * memory.
16134 **/
16135static void i40e_remove(struct pci_dev *pdev)
16136{
16137 struct i40e_pf *pf = pci_get_drvdata(pdev);
16138 struct i40e_hw *hw = &pf->hw;
16139 struct i40e_vsi *vsi;
16140 struct i40e_veb *veb;
16141 int ret_code;
16142 int i;
16143
16144 i40e_devlink_unregister(pf);
16145
16146 i40e_dbg_pf_exit(pf);
16147
16148 i40e_ptp_stop(pf);
16149
16150 /* Disable RSS in hw */
16151 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), reg_val: 0);
16152 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), reg_val: 0);
16153
16154 /* Grab __I40E_RESET_RECOVERY_PENDING and set __I40E_IN_REMOVE
16155 * flags, once they are set, i40e_rebuild should not be called as
16156 * i40e_prep_for_reset always returns early.
16157 */
16158 while (test_and_set_bit(nr: __I40E_RESET_RECOVERY_PENDING, addr: pf->state))
16159 usleep_range(min: 1000, max: 2000);
16160 set_bit(nr: __I40E_IN_REMOVE, addr: pf->state);
16161
16162 if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags)) {
16163 set_bit(nr: __I40E_VF_RESETS_DISABLED, addr: pf->state);
16164 i40e_free_vfs(pf);
16165 clear_bit(nr: I40E_FLAG_SRIOV_ENA, addr: pf->flags);
16166 }
16167 /* no more scheduling of any task */
16168 set_bit(nr: __I40E_SUSPENDED, addr: pf->state);
16169 set_bit(nr: __I40E_DOWN, addr: pf->state);
16170 if (pf->service_timer.function)
16171 timer_shutdown_sync(timer: &pf->service_timer);
16172 if (pf->service_task.func)
16173 cancel_work_sync(work: &pf->service_task);
16174
16175 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
16176 struct i40e_vsi *vsi = pf->vsi[0];
16177
16178 /* We know that we have allocated only one vsi for this PF,
16179 * it was just for registering netdevice, so the interface
16180 * could be visible in the 'ifconfig' output
16181 */
16182 unregister_netdev(dev: vsi->netdev);
16183 free_netdev(dev: vsi->netdev);
16184
16185 goto unmap;
16186 }
16187
16188 /* Client close must be called explicitly here because the timer
16189 * has been stopped.
16190 */
16191 i40e_notify_client_of_netdev_close(pf, reset: false);
16192
16193 i40e_fdir_teardown(pf);
16194
16195 /* If there is a switch structure or any orphans, remove them.
16196 * This will leave only the PF's VSI remaining.
16197 */
16198 i40e_pf_for_each_veb(pf, i, veb)
16199 if (veb->uplink_seid == pf->mac_seid ||
16200 veb->uplink_seid == 0)
16201 i40e_switch_branch_release(branch: veb);
16202
16203 /* Now we can shutdown the PF's VSIs, just before we kill
16204 * adminq and hmc.
16205 */
16206 i40e_pf_for_each_vsi(pf, i, vsi) {
16207 i40e_vsi_close(vsi);
16208 i40e_vsi_release(vsi);
16209 pf->vsi[i] = NULL;
16210 }
16211
16212 i40e_cloud_filter_exit(pf);
16213
16214 /* remove attached clients */
16215 if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
16216 ret_code = i40e_lan_del_device(pf);
16217 if (ret_code)
16218 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
16219 ret_code);
16220 }
16221
16222 /* shutdown and destroy the HMC */
16223 if (hw->hmc.hmc_obj) {
16224 ret_code = i40e_shutdown_lan_hmc(hw);
16225 if (ret_code)
16226 dev_warn(&pdev->dev,
16227 "Failed to destroy the HMC resources: %d\n",
16228 ret_code);
16229 }
16230
16231unmap:
16232 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16233 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16234 !test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
16235 free_irq(pf->pdev->irq, pf);
16236
16237 /* shutdown the adminq */
16238 i40e_shutdown_adminq(hw);
16239
16240 /* destroy the locks only once, here */
16241 mutex_destroy(lock: &hw->aq.arq_mutex);
16242 mutex_destroy(lock: &hw->aq.asq_mutex);
16243
16244 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
16245 rtnl_lock();
16246 i40e_clear_interrupt_scheme(pf);
16247 i40e_pf_for_each_vsi(pf, i, vsi) {
16248 if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
16249 i40e_vsi_clear_rings(vsi);
16250
16251 i40e_vsi_clear(vsi);
16252 pf->vsi[i] = NULL;
16253 }
16254 rtnl_unlock();
16255
16256 i40e_pf_for_each_veb(pf, i, veb) {
16257 kfree(objp: veb);
16258 pf->veb[i] = NULL;
16259 }
16260
16261 kfree(objp: pf->qp_pile);
16262 kfree(objp: pf->vsi);
16263
16264 iounmap(addr: hw->hw_addr);
16265 i40e_free_pf(pf);
16266 pci_release_mem_regions(pdev);
16267
16268 pci_disable_device(dev: pdev);
16269}
16270
16271/**
16272 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
16273 * using the mac_address_write admin q function
16274 * @pf: pointer to i40e_pf struct
16275 **/
16276static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16277{
16278 struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf);
16279 struct i40e_hw *hw = &pf->hw;
16280 u8 mac_addr[6];
16281 u16 flags = 0;
16282 int ret;
16283
16284 /* Get current MAC address in case it's an LAA */
16285 if (main_vsi && main_vsi->netdev) {
16286 ether_addr_copy(dst: mac_addr, src: main_vsi->netdev->dev_addr);
16287 } else {
16288 dev_err(&pf->pdev->dev,
16289 "Failed to retrieve MAC address; using default\n");
16290 ether_addr_copy(dst: mac_addr, src: hw->mac.addr);
16291 }
16292
16293 /* The FW expects the mac address write cmd to first be called with
16294 * one of these flags before calling it again with the multicast
16295 * enable flags.
16296 */
16297 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
16298
16299 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
16300 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
16301
16302 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16303 if (ret) {
16304 dev_err(&pf->pdev->dev,
16305 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
16306 return;
16307 }
16308
16309 flags = I40E_AQC_MC_MAG_EN
16310 | I40E_AQC_WOL_PRESERVE_ON_PFR
16311 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
16312 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16313 if (ret)
16314 dev_err(&pf->pdev->dev,
16315 "Failed to enable Multicast Magic Packet wake up\n");
16316}
16317
16318/**
16319 * i40e_io_suspend - suspend all IO operations
16320 * @pf: pointer to i40e_pf struct
16321 *
16322 **/
16323static int i40e_io_suspend(struct i40e_pf *pf)
16324{
16325 struct i40e_hw *hw = &pf->hw;
16326
16327 set_bit(nr: __I40E_DOWN, addr: pf->state);
16328
16329 /* Ensure service task will not be running */
16330 timer_delete_sync(timer: &pf->service_timer);
16331 cancel_work_sync(work: &pf->service_task);
16332
16333 /* Client close must be called explicitly here because the timer
16334 * has been stopped.
16335 */
16336 i40e_notify_client_of_netdev_close(pf, reset: false);
16337
16338 if (test_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, pf->hw.caps) &&
16339 pf->wol_en)
16340 i40e_enable_mc_magic_wake(pf);
16341
16342 /* Since we're going to destroy queues during the
16343 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16344 * whole section
16345 */
16346 rtnl_lock();
16347
16348 i40e_prep_for_reset(pf);
16349
16350 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16351 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16352
16353 /* Clear the interrupt scheme and release our IRQs so that the system
16354 * can safely hibernate even when there are a large number of CPUs.
16355 * Otherwise hibernation might fail when mapping all the vectors back
16356 * to CPU0.
16357 */
16358 i40e_clear_interrupt_scheme(pf);
16359
16360 rtnl_unlock();
16361
16362 return 0;
16363}
16364
16365/**
16366 * i40e_io_resume - resume IO operations
16367 * @pf: pointer to i40e_pf struct
16368 *
16369 **/
16370static int i40e_io_resume(struct i40e_pf *pf)
16371{
16372 struct device *dev = &pf->pdev->dev;
16373 int err;
16374
16375 /* We need to hold the RTNL lock prior to restoring interrupt schemes,
16376 * since we're going to be restoring queues
16377 */
16378 rtnl_lock();
16379
16380 /* We cleared the interrupt scheme when we suspended, so we need to
16381 * restore it now to resume device functionality.
16382 */
16383 err = i40e_restore_interrupt_scheme(pf);
16384 if (err) {
16385 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
16386 err);
16387 }
16388
16389 clear_bit(nr: __I40E_DOWN, addr: pf->state);
16390 i40e_reset_and_rebuild(pf, reinit: false, lock_acquired: true);
16391
16392 rtnl_unlock();
16393
16394 /* Clear suspended state last after everything is recovered */
16395 clear_bit(nr: __I40E_SUSPENDED, addr: pf->state);
16396
16397 /* Restart the service task */
16398 mod_timer(timer: &pf->service_timer,
16399 expires: round_jiffies(j: jiffies + pf->service_timer_period));
16400
16401 return 0;
16402}
16403
16404/**
16405 * i40e_pci_error_detected - warning that something funky happened in PCI land
16406 * @pdev: PCI device information struct
16407 * @error: the type of PCI error
16408 *
16409 * Called to warn that something happened and the error handling steps
16410 * are in progress. Allows the driver to quiesce things, be ready for
16411 * remediation.
16412 **/
16413static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
16414 pci_channel_state_t error)
16415{
16416 struct i40e_pf *pf = pci_get_drvdata(pdev);
16417
16418 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
16419
16420 if (!pf) {
16421 dev_info(&pdev->dev,
16422 "Cannot recover - error happened during device probe\n");
16423 return PCI_ERS_RESULT_DISCONNECT;
16424 }
16425
16426 /* shutdown all operations */
16427 if (!test_bit(__I40E_SUSPENDED, pf->state))
16428 i40e_io_suspend(pf);
16429
16430 /* Request a slot reset */
16431 return PCI_ERS_RESULT_NEED_RESET;
16432}
16433
16434/**
16435 * i40e_pci_error_slot_reset - a PCI slot reset just happened
16436 * @pdev: PCI device information struct
16437 *
16438 * Called to find if the driver can work with the device now that
16439 * the pci slot has been reset. If a basic connection seems good
16440 * (registers are readable and have sane content) then return a
16441 * happy little PCI_ERS_RESULT_xxx.
16442 **/
16443static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
16444{
16445 struct i40e_pf *pf = pci_get_drvdata(pdev);
16446 pci_ers_result_t result;
16447 u32 reg;
16448
16449 dev_dbg(&pdev->dev, "%s\n", __func__);
16450 /* enable I/O and memory of the device */
16451 if (pci_enable_device(dev: pdev)) {
16452 dev_info(&pdev->dev,
16453 "Cannot re-enable PCI device after reset.\n");
16454 result = PCI_ERS_RESULT_DISCONNECT;
16455 } else {
16456 pci_set_master(dev: pdev);
16457 pci_restore_state(dev: pdev);
16458 pci_wake_from_d3(dev: pdev, enable: false);
16459
16460 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
16461 if (reg == 0)
16462 result = PCI_ERS_RESULT_RECOVERED;
16463 else
16464 result = PCI_ERS_RESULT_DISCONNECT;
16465 }
16466
16467 return result;
16468}
16469
16470/**
16471 * i40e_pci_error_reset_prepare - prepare device driver for pci reset
16472 * @pdev: PCI device information struct
16473 */
16474static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
16475{
16476 struct i40e_pf *pf = pci_get_drvdata(pdev);
16477
16478 i40e_prep_for_reset(pf);
16479}
16480
16481/**
16482 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
16483 * @pdev: PCI device information struct
16484 */
16485static void i40e_pci_error_reset_done(struct pci_dev *pdev)
16486{
16487 struct i40e_pf *pf = pci_get_drvdata(pdev);
16488
16489 if (test_bit(__I40E_IN_REMOVE, pf->state))
16490 return;
16491
16492 i40e_reset_and_rebuild(pf, reinit: false, lock_acquired: false);
16493#ifdef CONFIG_PCI_IOV
16494 i40e_restore_all_vfs_msi_state(pdev);
16495#endif /* CONFIG_PCI_IOV */
16496}
16497
16498/**
16499 * i40e_pci_error_resume - restart operations after PCI error recovery
16500 * @pdev: PCI device information struct
16501 *
16502 * Called to allow the driver to bring things back up after PCI error
16503 * and/or reset recovery has finished.
16504 **/
16505static void i40e_pci_error_resume(struct pci_dev *pdev)
16506{
16507 struct i40e_pf *pf = pci_get_drvdata(pdev);
16508
16509 dev_dbg(&pdev->dev, "%s\n", __func__);
16510 if (test_bit(__I40E_SUSPENDED, pf->state))
16511 return;
16512
16513 i40e_io_resume(pf);
16514}
16515
16516/**
16517 * i40e_shutdown - PCI callback for shutting down
16518 * @pdev: PCI device information struct
16519 **/
16520static void i40e_shutdown(struct pci_dev *pdev)
16521{
16522 struct i40e_pf *pf = pci_get_drvdata(pdev);
16523 struct i40e_hw *hw = &pf->hw;
16524
16525 set_bit(nr: __I40E_SUSPENDED, addr: pf->state);
16526 set_bit(nr: __I40E_DOWN, addr: pf->state);
16527
16528 timer_delete_sync(timer: &pf->service_timer);
16529 cancel_work_sync(work: &pf->service_task);
16530 i40e_cloud_filter_exit(pf);
16531 i40e_fdir_teardown(pf);
16532
16533 /* Client close must be called explicitly here because the timer
16534 * has been stopped.
16535 */
16536 i40e_notify_client_of_netdev_close(pf, reset: false);
16537
16538 if (test_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, pf->hw.caps) &&
16539 pf->wol_en)
16540 i40e_enable_mc_magic_wake(pf);
16541
16542 i40e_prep_for_reset(pf);
16543
16544 wr32(hw, I40E_PFPM_APM,
16545 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16546 wr32(hw, I40E_PFPM_WUFC,
16547 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16548
16549 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16550 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16551 !test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
16552 free_irq(pf->pdev->irq, pf);
16553
16554 /* Since we're going to destroy queues during the
16555 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16556 * whole section
16557 */
16558 rtnl_lock();
16559 i40e_clear_interrupt_scheme(pf);
16560 rtnl_unlock();
16561
16562 if (system_state == SYSTEM_POWER_OFF) {
16563 pci_wake_from_d3(dev: pdev, enable: pf->wol_en);
16564 pci_set_power_state(dev: pdev, PCI_D3hot);
16565 }
16566}
16567
16568/**
16569 * i40e_suspend - PM callback for moving to D3
16570 * @dev: generic device information structure
16571 **/
16572static int i40e_suspend(struct device *dev)
16573{
16574 struct i40e_pf *pf = dev_get_drvdata(dev);
16575
16576 /* If we're already suspended, then there is nothing to do */
16577 if (test_and_set_bit(nr: __I40E_SUSPENDED, addr: pf->state))
16578 return 0;
16579 return i40e_io_suspend(pf);
16580}
16581
16582/**
16583 * i40e_resume - PM callback for waking up from D3
16584 * @dev: generic device information structure
16585 **/
16586static int i40e_resume(struct device *dev)
16587{
16588 struct i40e_pf *pf = dev_get_drvdata(dev);
16589
16590 /* If we're not suspended, then there is nothing to do */
16591 if (!test_bit(__I40E_SUSPENDED, pf->state))
16592 return 0;
16593 return i40e_io_resume(pf);
16594}
16595
16596static const struct pci_error_handlers i40e_err_handler = {
16597 .error_detected = i40e_pci_error_detected,
16598 .slot_reset = i40e_pci_error_slot_reset,
16599 .reset_prepare = i40e_pci_error_reset_prepare,
16600 .reset_done = i40e_pci_error_reset_done,
16601 .resume = i40e_pci_error_resume,
16602};
16603
16604static DEFINE_SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
16605
16606static struct pci_driver i40e_driver = {
16607 .name = i40e_driver_name,
16608 .id_table = i40e_pci_tbl,
16609 .probe = i40e_probe,
16610 .remove = i40e_remove,
16611 .driver.pm = pm_sleep_ptr(&i40e_pm_ops),
16612 .shutdown = i40e_shutdown,
16613 .err_handler = &i40e_err_handler,
16614 .sriov_configure = i40e_pci_sriov_configure,
16615};
16616
16617/**
16618 * i40e_init_module - Driver registration routine
16619 *
16620 * i40e_init_module is the first routine called when the driver is
16621 * loaded. All it does is register with the PCI subsystem.
16622 **/
16623static int __init i40e_init_module(void)
16624{
16625 int err;
16626
16627 pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string);
16628 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
16629
16630 /* There is no need to throttle the number of active tasks because
16631 * each device limits its own task using a state bit for scheduling
16632 * the service task, and the device tasks do not interfere with each
16633 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
16634 * since we need to be able to guarantee forward progress even under
16635 * memory pressure.
16636 */
16637 i40e_wq = alloc_workqueue("%s", WQ_PERCPU, 0, i40e_driver_name);
16638 if (!i40e_wq) {
16639 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
16640 return -ENOMEM;
16641 }
16642
16643 i40e_dbg_init();
16644 err = pci_register_driver(&i40e_driver);
16645 if (err) {
16646 destroy_workqueue(wq: i40e_wq);
16647 i40e_dbg_exit();
16648 return err;
16649 }
16650
16651 return 0;
16652}
16653module_init(i40e_init_module);
16654
16655/**
16656 * i40e_exit_module - Driver exit cleanup routine
16657 *
16658 * i40e_exit_module is called just before the driver is removed
16659 * from memory.
16660 **/
16661static void __exit i40e_exit_module(void)
16662{
16663 pci_unregister_driver(dev: &i40e_driver);
16664 destroy_workqueue(wq: i40e_wq);
16665 ida_destroy(ida: &i40e_client_ida);
16666 i40e_dbg_exit();
16667}
16668module_exit(i40e_exit_module);
16669

source code of linux/drivers/net/ethernet/intel/i40e/i40e_main.c