1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /*************************************************************************** |
3 | * |
4 | * Copyright (C) 2004-2008 SMSC |
5 | * Copyright (C) 2005-2008 ARM |
6 | * |
7 | *************************************************************************** |
8 | * Rewritten, heavily based on smsc911x simple driver by SMSC. |
9 | * Partly uses io macros from smc91x.c by Nicolas Pitre |
10 | * |
11 | * Supported devices: |
12 | * LAN9115, LAN9116, LAN9117, LAN9118 |
13 | * LAN9215, LAN9216, LAN9217, LAN9218 |
14 | * LAN9210, LAN9211 |
15 | * LAN9220, LAN9221 |
16 | * LAN89218,LAN9250 |
17 | */ |
18 | |
19 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
20 | |
21 | #include <linux/crc32.h> |
22 | #include <linux/clk.h> |
23 | #include <linux/delay.h> |
24 | #include <linux/errno.h> |
25 | #include <linux/etherdevice.h> |
26 | #include <linux/ethtool.h> |
27 | #include <linux/init.h> |
28 | #include <linux/interrupt.h> |
29 | #include <linux/ioport.h> |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> |
32 | #include <linux/netdevice.h> |
33 | #include <linux/platform_device.h> |
34 | #include <linux/regulator/consumer.h> |
35 | #include <linux/sched.h> |
36 | #include <linux/timer.h> |
37 | #include <linux/bug.h> |
38 | #include <linux/bitops.h> |
39 | #include <linux/irq.h> |
40 | #include <linux/io.h> |
41 | #include <linux/swab.h> |
42 | #include <linux/phy.h> |
43 | #include <linux/smsc911x.h> |
44 | #include <linux/device.h> |
45 | #include <linux/of.h> |
46 | #include <linux/of_gpio.h> |
47 | #include <linux/of_net.h> |
48 | #include <linux/acpi.h> |
49 | #include <linux/pm_runtime.h> |
50 | #include <linux/property.h> |
51 | #include <linux/gpio/consumer.h> |
52 | |
53 | #include "smsc911x.h" |
54 | |
55 | #define SMSC_CHIPNAME "smsc911x" |
56 | #define SMSC_MDIONAME "smsc911x-mdio" |
57 | #define SMSC_DRV_VERSION "2008-10-21" |
58 | |
59 | MODULE_DESCRIPTION("SMSC LAN911x/LAN921x Ethernet driver" ); |
60 | MODULE_LICENSE("GPL" ); |
61 | MODULE_VERSION(SMSC_DRV_VERSION); |
62 | MODULE_ALIAS("platform:smsc911x" ); |
63 | |
64 | #if USE_DEBUG > 0 |
65 | static int debug = 16; |
66 | #else |
67 | static int debug = 3; |
68 | #endif |
69 | |
70 | module_param(debug, int, 0); |
71 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)" ); |
72 | |
73 | struct smsc911x_data; |
74 | |
75 | struct smsc911x_ops { |
76 | u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg); |
77 | void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val); |
78 | void (*rx_readfifo)(struct smsc911x_data *pdata, |
79 | unsigned int *buf, unsigned int wordcount); |
80 | void (*tx_writefifo)(struct smsc911x_data *pdata, |
81 | unsigned int *buf, unsigned int wordcount); |
82 | }; |
83 | |
84 | #define SMSC911X_NUM_SUPPLIES 2 |
85 | |
86 | struct smsc911x_data { |
87 | void __iomem *ioaddr; |
88 | |
89 | unsigned int idrev; |
90 | |
91 | /* used to decide which workarounds apply */ |
92 | unsigned int generation; |
93 | |
94 | /* device configuration (copied from platform_data during probe) */ |
95 | struct smsc911x_platform_config config; |
96 | |
97 | /* This needs to be acquired before calling any of below: |
98 | * smsc911x_mac_read(), smsc911x_mac_write() |
99 | */ |
100 | spinlock_t mac_lock; |
101 | |
102 | /* spinlock to ensure register accesses are serialised */ |
103 | spinlock_t dev_lock; |
104 | |
105 | struct mii_bus *mii_bus; |
106 | unsigned int using_extphy; |
107 | int last_duplex; |
108 | int last_carrier; |
109 | |
110 | u32 msg_enable; |
111 | unsigned int gpio_setting; |
112 | unsigned int gpio_orig_setting; |
113 | struct net_device *dev; |
114 | struct napi_struct napi; |
115 | |
116 | unsigned int software_irq_signal; |
117 | |
118 | #ifdef USE_PHY_WORK_AROUND |
119 | #define MIN_PACKET_SIZE (64) |
120 | char loopback_tx_pkt[MIN_PACKET_SIZE]; |
121 | char loopback_rx_pkt[MIN_PACKET_SIZE]; |
122 | unsigned int resetcount; |
123 | #endif |
124 | |
125 | /* Members for Multicast filter workaround */ |
126 | unsigned int multicast_update_pending; |
127 | unsigned int set_bits_mask; |
128 | unsigned int clear_bits_mask; |
129 | unsigned int hashhi; |
130 | unsigned int hashlo; |
131 | |
132 | /* register access functions */ |
133 | const struct smsc911x_ops *ops; |
134 | |
135 | /* regulators */ |
136 | struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES]; |
137 | |
138 | /* Reset GPIO */ |
139 | struct gpio_desc *reset_gpiod; |
140 | |
141 | /* clock */ |
142 | struct clk *clk; |
143 | }; |
144 | |
145 | /* Easy access to information */ |
146 | #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift)) |
147 | |
148 | static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) |
149 | { |
150 | if (pdata->config.flags & SMSC911X_USE_32BIT) |
151 | return readl(addr: pdata->ioaddr + reg); |
152 | |
153 | if (pdata->config.flags & SMSC911X_USE_16BIT) |
154 | return ((readw(addr: pdata->ioaddr + reg) & 0xFFFF) | |
155 | ((readw(addr: pdata->ioaddr + reg + 2) & 0xFFFF) << 16)); |
156 | |
157 | BUG(); |
158 | return 0; |
159 | } |
160 | |
161 | static inline u32 |
162 | __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg) |
163 | { |
164 | if (pdata->config.flags & SMSC911X_USE_32BIT) |
165 | return readl(addr: pdata->ioaddr + __smsc_shift(pdata, reg)); |
166 | |
167 | if (pdata->config.flags & SMSC911X_USE_16BIT) |
168 | return (readw(addr: pdata->ioaddr + |
169 | __smsc_shift(pdata, reg)) & 0xFFFF) | |
170 | ((readw(addr: pdata->ioaddr + |
171 | __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16); |
172 | |
173 | BUG(); |
174 | return 0; |
175 | } |
176 | |
177 | static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) |
178 | { |
179 | u32 data; |
180 | unsigned long flags; |
181 | |
182 | spin_lock_irqsave(&pdata->dev_lock, flags); |
183 | data = pdata->ops->reg_read(pdata, reg); |
184 | spin_unlock_irqrestore(lock: &pdata->dev_lock, flags); |
185 | |
186 | return data; |
187 | } |
188 | |
189 | static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, |
190 | u32 val) |
191 | { |
192 | if (pdata->config.flags & SMSC911X_USE_32BIT) { |
193 | writel(val, addr: pdata->ioaddr + reg); |
194 | return; |
195 | } |
196 | |
197 | if (pdata->config.flags & SMSC911X_USE_16BIT) { |
198 | writew(val: val & 0xFFFF, addr: pdata->ioaddr + reg); |
199 | writew(val: (val >> 16) & 0xFFFF, addr: pdata->ioaddr + reg + 2); |
200 | return; |
201 | } |
202 | |
203 | BUG(); |
204 | } |
205 | |
206 | static inline void |
207 | __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val) |
208 | { |
209 | if (pdata->config.flags & SMSC911X_USE_32BIT) { |
210 | writel(val, addr: pdata->ioaddr + __smsc_shift(pdata, reg)); |
211 | return; |
212 | } |
213 | |
214 | if (pdata->config.flags & SMSC911X_USE_16BIT) { |
215 | writew(val: val & 0xFFFF, |
216 | addr: pdata->ioaddr + __smsc_shift(pdata, reg)); |
217 | writew(val: (val >> 16) & 0xFFFF, |
218 | addr: pdata->ioaddr + __smsc_shift(pdata, reg + 2)); |
219 | return; |
220 | } |
221 | |
222 | BUG(); |
223 | } |
224 | |
225 | static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, |
226 | u32 val) |
227 | { |
228 | unsigned long flags; |
229 | |
230 | spin_lock_irqsave(&pdata->dev_lock, flags); |
231 | pdata->ops->reg_write(pdata, reg, val); |
232 | spin_unlock_irqrestore(lock: &pdata->dev_lock, flags); |
233 | } |
234 | |
235 | /* Writes a packet to the TX_DATA_FIFO */ |
236 | static inline void |
237 | smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf, |
238 | unsigned int wordcount) |
239 | { |
240 | unsigned long flags; |
241 | |
242 | spin_lock_irqsave(&pdata->dev_lock, flags); |
243 | |
244 | if (pdata->config.flags & SMSC911X_SWAP_FIFO) { |
245 | while (wordcount--) |
246 | __smsc911x_reg_write(pdata, TX_DATA_FIFO, |
247 | swab32(*buf++)); |
248 | goto out; |
249 | } |
250 | |
251 | if (pdata->config.flags & SMSC911X_USE_32BIT) { |
252 | iowrite32_rep(port: pdata->ioaddr + TX_DATA_FIFO, buf, count: wordcount); |
253 | goto out; |
254 | } |
255 | |
256 | if (pdata->config.flags & SMSC911X_USE_16BIT) { |
257 | while (wordcount--) |
258 | __smsc911x_reg_write(pdata, TX_DATA_FIFO, val: *buf++); |
259 | goto out; |
260 | } |
261 | |
262 | BUG(); |
263 | out: |
264 | spin_unlock_irqrestore(lock: &pdata->dev_lock, flags); |
265 | } |
266 | |
267 | /* Writes a packet to the TX_DATA_FIFO - shifted version */ |
268 | static inline void |
269 | smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf, |
270 | unsigned int wordcount) |
271 | { |
272 | unsigned long flags; |
273 | |
274 | spin_lock_irqsave(&pdata->dev_lock, flags); |
275 | |
276 | if (pdata->config.flags & SMSC911X_SWAP_FIFO) { |
277 | while (wordcount--) |
278 | __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO, |
279 | swab32(*buf++)); |
280 | goto out; |
281 | } |
282 | |
283 | if (pdata->config.flags & SMSC911X_USE_32BIT) { |
284 | iowrite32_rep(port: pdata->ioaddr + __smsc_shift(pdata, |
285 | TX_DATA_FIFO), buf, count: wordcount); |
286 | goto out; |
287 | } |
288 | |
289 | if (pdata->config.flags & SMSC911X_USE_16BIT) { |
290 | while (wordcount--) |
291 | __smsc911x_reg_write_shift(pdata, |
292 | TX_DATA_FIFO, val: *buf++); |
293 | goto out; |
294 | } |
295 | |
296 | BUG(); |
297 | out: |
298 | spin_unlock_irqrestore(lock: &pdata->dev_lock, flags); |
299 | } |
300 | |
301 | /* Reads a packet out of the RX_DATA_FIFO */ |
302 | static inline void |
303 | smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf, |
304 | unsigned int wordcount) |
305 | { |
306 | unsigned long flags; |
307 | |
308 | spin_lock_irqsave(&pdata->dev_lock, flags); |
309 | |
310 | if (pdata->config.flags & SMSC911X_SWAP_FIFO) { |
311 | while (wordcount--) |
312 | *buf++ = swab32(__smsc911x_reg_read(pdata, |
313 | RX_DATA_FIFO)); |
314 | goto out; |
315 | } |
316 | |
317 | if (pdata->config.flags & SMSC911X_USE_32BIT) { |
318 | ioread32_rep(port: pdata->ioaddr + RX_DATA_FIFO, buf, count: wordcount); |
319 | goto out; |
320 | } |
321 | |
322 | if (pdata->config.flags & SMSC911X_USE_16BIT) { |
323 | while (wordcount--) |
324 | *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO); |
325 | goto out; |
326 | } |
327 | |
328 | BUG(); |
329 | out: |
330 | spin_unlock_irqrestore(lock: &pdata->dev_lock, flags); |
331 | } |
332 | |
333 | /* Reads a packet out of the RX_DATA_FIFO - shifted version */ |
334 | static inline void |
335 | smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf, |
336 | unsigned int wordcount) |
337 | { |
338 | unsigned long flags; |
339 | |
340 | spin_lock_irqsave(&pdata->dev_lock, flags); |
341 | |
342 | if (pdata->config.flags & SMSC911X_SWAP_FIFO) { |
343 | while (wordcount--) |
344 | *buf++ = swab32(__smsc911x_reg_read_shift(pdata, |
345 | RX_DATA_FIFO)); |
346 | goto out; |
347 | } |
348 | |
349 | if (pdata->config.flags & SMSC911X_USE_32BIT) { |
350 | ioread32_rep(port: pdata->ioaddr + __smsc_shift(pdata, |
351 | RX_DATA_FIFO), buf, count: wordcount); |
352 | goto out; |
353 | } |
354 | |
355 | if (pdata->config.flags & SMSC911X_USE_16BIT) { |
356 | while (wordcount--) |
357 | *buf++ = __smsc911x_reg_read_shift(pdata, |
358 | RX_DATA_FIFO); |
359 | goto out; |
360 | } |
361 | |
362 | BUG(); |
363 | out: |
364 | spin_unlock_irqrestore(lock: &pdata->dev_lock, flags); |
365 | } |
366 | |
367 | /* |
368 | * enable regulator and clock resources. |
369 | */ |
370 | static int smsc911x_enable_resources(struct platform_device *pdev) |
371 | { |
372 | struct net_device *ndev = platform_get_drvdata(pdev); |
373 | struct smsc911x_data *pdata = netdev_priv(dev: ndev); |
374 | int ret = 0; |
375 | |
376 | ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies), |
377 | consumers: pdata->supplies); |
378 | if (ret) |
379 | netdev_err(dev: ndev, format: "failed to enable regulators %d\n" , |
380 | ret); |
381 | |
382 | if (!IS_ERR(ptr: pdata->clk)) { |
383 | ret = clk_prepare_enable(clk: pdata->clk); |
384 | if (ret < 0) |
385 | netdev_err(dev: ndev, format: "failed to enable clock %d\n" , ret); |
386 | } |
387 | |
388 | return ret; |
389 | } |
390 | |
391 | /* |
392 | * disable resources, currently just regulators. |
393 | */ |
394 | static int smsc911x_disable_resources(struct platform_device *pdev) |
395 | { |
396 | struct net_device *ndev = platform_get_drvdata(pdev); |
397 | struct smsc911x_data *pdata = netdev_priv(dev: ndev); |
398 | int ret = 0; |
399 | |
400 | ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies), |
401 | consumers: pdata->supplies); |
402 | |
403 | if (!IS_ERR(ptr: pdata->clk)) |
404 | clk_disable_unprepare(clk: pdata->clk); |
405 | |
406 | return ret; |
407 | } |
408 | |
409 | /* |
410 | * Request resources, currently just regulators. |
411 | * |
412 | * The SMSC911x has two power pins: vddvario and vdd33a, in designs where |
413 | * these are not always-on we need to request regulators to be turned on |
414 | * before we can try to access the device registers. |
415 | */ |
416 | static int smsc911x_request_resources(struct platform_device *pdev) |
417 | { |
418 | struct net_device *ndev = platform_get_drvdata(pdev); |
419 | struct smsc911x_data *pdata = netdev_priv(dev: ndev); |
420 | int ret = 0; |
421 | |
422 | /* Request regulators */ |
423 | pdata->supplies[0].supply = "vdd33a" ; |
424 | pdata->supplies[1].supply = "vddvario" ; |
425 | ret = regulator_bulk_get(dev: &pdev->dev, |
426 | ARRAY_SIZE(pdata->supplies), |
427 | consumers: pdata->supplies); |
428 | if (ret) { |
429 | /* |
430 | * Retry on deferrals, else just report the error |
431 | * and try to continue. |
432 | */ |
433 | if (ret == -EPROBE_DEFER) |
434 | return ret; |
435 | netdev_err(dev: ndev, format: "couldn't get regulators %d\n" , |
436 | ret); |
437 | } |
438 | |
439 | /* Request optional RESET GPIO */ |
440 | pdata->reset_gpiod = devm_gpiod_get_optional(dev: &pdev->dev, |
441 | con_id: "reset" , |
442 | flags: GPIOD_OUT_LOW); |
443 | |
444 | /* Request clock */ |
445 | pdata->clk = clk_get(dev: &pdev->dev, NULL); |
446 | if (IS_ERR(ptr: pdata->clk)) |
447 | dev_dbg(&pdev->dev, "couldn't get clock %li\n" , |
448 | PTR_ERR(pdata->clk)); |
449 | |
450 | return ret; |
451 | } |
452 | |
453 | /* |
454 | * Free resources, currently just regulators. |
455 | * |
456 | */ |
457 | static void smsc911x_free_resources(struct platform_device *pdev) |
458 | { |
459 | struct net_device *ndev = platform_get_drvdata(pdev); |
460 | struct smsc911x_data *pdata = netdev_priv(dev: ndev); |
461 | |
462 | /* Free regulators */ |
463 | regulator_bulk_free(ARRAY_SIZE(pdata->supplies), |
464 | consumers: pdata->supplies); |
465 | |
466 | /* Free clock */ |
467 | if (!IS_ERR(ptr: pdata->clk)) { |
468 | clk_put(clk: pdata->clk); |
469 | pdata->clk = NULL; |
470 | } |
471 | } |
472 | |
473 | /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read |
474 | * and smsc911x_mac_write, so assumes mac_lock is held */ |
475 | static int smsc911x_mac_complete(struct smsc911x_data *pdata) |
476 | { |
477 | int i; |
478 | u32 val; |
479 | |
480 | SMSC_ASSERT_MAC_LOCK(pdata); |
481 | |
482 | for (i = 0; i < 40; i++) { |
483 | val = smsc911x_reg_read(pdata, MAC_CSR_CMD); |
484 | if (!(val & MAC_CSR_CMD_CSR_BUSY_)) |
485 | return 0; |
486 | } |
487 | SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. " |
488 | "MAC_CSR_CMD: 0x%08X" , val); |
489 | return -EIO; |
490 | } |
491 | |
492 | /* Fetches a MAC register value. Assumes mac_lock is acquired */ |
493 | static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset) |
494 | { |
495 | unsigned int temp; |
496 | |
497 | SMSC_ASSERT_MAC_LOCK(pdata); |
498 | |
499 | temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); |
500 | if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { |
501 | SMSC_WARN(pdata, hw, "MAC busy at entry" ); |
502 | return 0xFFFFFFFF; |
503 | } |
504 | |
505 | /* Send the MAC cmd */ |
506 | smsc911x_reg_write(pdata, MAC_CSR_CMD, val: ((offset & 0xFF) | |
507 | MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_)); |
508 | |
509 | /* Workaround for hardware read-after-write restriction */ |
510 | temp = smsc911x_reg_read(pdata, BYTE_TEST); |
511 | |
512 | /* Wait for the read to complete */ |
513 | if (likely(smsc911x_mac_complete(pdata) == 0)) |
514 | return smsc911x_reg_read(pdata, MAC_CSR_DATA); |
515 | |
516 | SMSC_WARN(pdata, hw, "MAC busy after read" ); |
517 | return 0xFFFFFFFF; |
518 | } |
519 | |
520 | /* Set a mac register, mac_lock must be acquired before calling */ |
521 | static void smsc911x_mac_write(struct smsc911x_data *pdata, |
522 | unsigned int offset, u32 val) |
523 | { |
524 | unsigned int temp; |
525 | |
526 | SMSC_ASSERT_MAC_LOCK(pdata); |
527 | |
528 | temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); |
529 | if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { |
530 | SMSC_WARN(pdata, hw, |
531 | "smsc911x_mac_write failed, MAC busy at entry" ); |
532 | return; |
533 | } |
534 | |
535 | /* Send data to write */ |
536 | smsc911x_reg_write(pdata, MAC_CSR_DATA, val); |
537 | |
538 | /* Write the actual data */ |
539 | smsc911x_reg_write(pdata, MAC_CSR_CMD, val: ((offset & 0xFF) | |
540 | MAC_CSR_CMD_CSR_BUSY_)); |
541 | |
542 | /* Workaround for hardware read-after-write restriction */ |
543 | temp = smsc911x_reg_read(pdata, BYTE_TEST); |
544 | |
545 | /* Wait for the write to complete */ |
546 | if (likely(smsc911x_mac_complete(pdata) == 0)) |
547 | return; |
548 | |
549 | SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write" ); |
550 | } |
551 | |
552 | /* Get a phy register */ |
553 | static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx) |
554 | { |
555 | struct smsc911x_data *pdata = bus->priv; |
556 | unsigned long flags; |
557 | unsigned int addr; |
558 | int i, reg; |
559 | |
560 | pm_runtime_get_sync(dev: bus->parent); |
561 | spin_lock_irqsave(&pdata->mac_lock, flags); |
562 | |
563 | /* Confirm MII not busy */ |
564 | if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { |
565 | SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???" ); |
566 | reg = -EIO; |
567 | goto out; |
568 | } |
569 | |
570 | /* Set the address, index & direction (read from PHY) */ |
571 | addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6); |
572 | smsc911x_mac_write(pdata, MII_ACC, val: addr); |
573 | |
574 | /* Wait for read to complete w/ timeout */ |
575 | for (i = 0; i < 100; i++) |
576 | if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { |
577 | reg = smsc911x_mac_read(pdata, MII_DATA); |
578 | goto out; |
579 | } |
580 | |
581 | SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish" ); |
582 | reg = -EIO; |
583 | |
584 | out: |
585 | spin_unlock_irqrestore(lock: &pdata->mac_lock, flags); |
586 | pm_runtime_put(dev: bus->parent); |
587 | return reg; |
588 | } |
589 | |
590 | /* Set a phy register */ |
591 | static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx, |
592 | u16 val) |
593 | { |
594 | struct smsc911x_data *pdata = bus->priv; |
595 | unsigned long flags; |
596 | unsigned int addr; |
597 | int i, reg; |
598 | |
599 | pm_runtime_get_sync(dev: bus->parent); |
600 | spin_lock_irqsave(&pdata->mac_lock, flags); |
601 | |
602 | /* Confirm MII not busy */ |
603 | if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { |
604 | SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???" ); |
605 | reg = -EIO; |
606 | goto out; |
607 | } |
608 | |
609 | /* Put the data to write in the MAC */ |
610 | smsc911x_mac_write(pdata, MII_DATA, val); |
611 | |
612 | /* Set the address, index & direction (write to PHY) */ |
613 | addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) | |
614 | MII_ACC_MII_WRITE_; |
615 | smsc911x_mac_write(pdata, MII_ACC, val: addr); |
616 | |
617 | /* Wait for write to complete w/ timeout */ |
618 | for (i = 0; i < 100; i++) |
619 | if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { |
620 | reg = 0; |
621 | goto out; |
622 | } |
623 | |
624 | SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish" ); |
625 | reg = -EIO; |
626 | |
627 | out: |
628 | spin_unlock_irqrestore(lock: &pdata->mac_lock, flags); |
629 | pm_runtime_put(dev: bus->parent); |
630 | return reg; |
631 | } |
632 | |
633 | /* Switch to external phy. Assumes tx and rx are stopped. */ |
634 | static void smsc911x_phy_enable_external(struct smsc911x_data *pdata) |
635 | { |
636 | unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); |
637 | |
638 | /* Disable phy clocks to the MAC */ |
639 | hwcfg &= (~HW_CFG_PHY_CLK_SEL_); |
640 | hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; |
641 | smsc911x_reg_write(pdata, HW_CFG, val: hwcfg); |
642 | udelay(10); /* Enough time for clocks to stop */ |
643 | |
644 | /* Switch to external phy */ |
645 | hwcfg |= HW_CFG_EXT_PHY_EN_; |
646 | smsc911x_reg_write(pdata, HW_CFG, val: hwcfg); |
647 | |
648 | /* Enable phy clocks to the MAC */ |
649 | hwcfg &= (~HW_CFG_PHY_CLK_SEL_); |
650 | hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; |
651 | smsc911x_reg_write(pdata, HW_CFG, val: hwcfg); |
652 | udelay(10); /* Enough time for clocks to restart */ |
653 | |
654 | hwcfg |= HW_CFG_SMI_SEL_; |
655 | smsc911x_reg_write(pdata, HW_CFG, val: hwcfg); |
656 | } |
657 | |
658 | /* Autodetects and enables external phy if present on supported chips. |
659 | * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY |
660 | * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */ |
661 | static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata) |
662 | { |
663 | unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); |
664 | |
665 | if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) { |
666 | SMSC_TRACE(pdata, hw, "Forcing internal PHY" ); |
667 | pdata->using_extphy = 0; |
668 | } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) { |
669 | SMSC_TRACE(pdata, hw, "Forcing external PHY" ); |
670 | smsc911x_phy_enable_external(pdata); |
671 | pdata->using_extphy = 1; |
672 | } else if (hwcfg & HW_CFG_EXT_PHY_DET_) { |
673 | SMSC_TRACE(pdata, hw, |
674 | "HW_CFG EXT_PHY_DET set, using external PHY" ); |
675 | smsc911x_phy_enable_external(pdata); |
676 | pdata->using_extphy = 1; |
677 | } else { |
678 | SMSC_TRACE(pdata, hw, |
679 | "HW_CFG EXT_PHY_DET clear, using internal PHY" ); |
680 | pdata->using_extphy = 0; |
681 | } |
682 | } |
683 | |
684 | /* Fetches a tx status out of the status fifo */ |
685 | static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata) |
686 | { |
687 | unsigned int result = |
688 | smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_; |
689 | |
690 | if (result != 0) |
691 | result = smsc911x_reg_read(pdata, TX_STATUS_FIFO); |
692 | |
693 | return result; |
694 | } |
695 | |
696 | /* Fetches the next rx status */ |
697 | static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata) |
698 | { |
699 | unsigned int result = |
700 | smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_; |
701 | |
702 | if (result != 0) |
703 | result = smsc911x_reg_read(pdata, RX_STATUS_FIFO); |
704 | |
705 | return result; |
706 | } |
707 | |
708 | #ifdef USE_PHY_WORK_AROUND |
709 | static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata) |
710 | { |
711 | unsigned int tries; |
712 | u32 wrsz; |
713 | u32 rdsz; |
714 | ulong bufp; |
715 | |
716 | for (tries = 0; tries < 10; tries++) { |
717 | unsigned int txcmd_a; |
718 | unsigned int txcmd_b; |
719 | unsigned int status; |
720 | unsigned int pktlength; |
721 | unsigned int i; |
722 | |
723 | /* Zero-out rx packet memory */ |
724 | memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE); |
725 | |
726 | /* Write tx packet to 118 */ |
727 | txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16; |
728 | txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; |
729 | txcmd_a |= MIN_PACKET_SIZE; |
730 | |
731 | txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE; |
732 | |
733 | smsc911x_reg_write(pdata, TX_DATA_FIFO, val: txcmd_a); |
734 | smsc911x_reg_write(pdata, TX_DATA_FIFO, val: txcmd_b); |
735 | |
736 | bufp = (ulong)pdata->loopback_tx_pkt & (~0x3); |
737 | wrsz = MIN_PACKET_SIZE + 3; |
738 | wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3); |
739 | wrsz >>= 2; |
740 | |
741 | pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); |
742 | |
743 | /* Wait till transmit is done */ |
744 | i = 60; |
745 | do { |
746 | udelay(5); |
747 | status = smsc911x_tx_get_txstatus(pdata); |
748 | } while ((i--) && (!status)); |
749 | |
750 | if (!status) { |
751 | SMSC_WARN(pdata, hw, |
752 | "Failed to transmit during loopback test" ); |
753 | continue; |
754 | } |
755 | if (status & TX_STS_ES_) { |
756 | SMSC_WARN(pdata, hw, |
757 | "Transmit encountered errors during loopback test" ); |
758 | continue; |
759 | } |
760 | |
761 | /* Wait till receive is done */ |
762 | i = 60; |
763 | do { |
764 | udelay(5); |
765 | status = smsc911x_rx_get_rxstatus(pdata); |
766 | } while ((i--) && (!status)); |
767 | |
768 | if (!status) { |
769 | SMSC_WARN(pdata, hw, |
770 | "Failed to receive during loopback test" ); |
771 | continue; |
772 | } |
773 | if (status & RX_STS_ES_) { |
774 | SMSC_WARN(pdata, hw, |
775 | "Receive encountered errors during loopback test" ); |
776 | continue; |
777 | } |
778 | |
779 | pktlength = ((status & 0x3FFF0000UL) >> 16); |
780 | bufp = (ulong)pdata->loopback_rx_pkt; |
781 | rdsz = pktlength + 3; |
782 | rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3); |
783 | rdsz >>= 2; |
784 | |
785 | pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz); |
786 | |
787 | if (pktlength != (MIN_PACKET_SIZE + 4)) { |
788 | SMSC_WARN(pdata, hw, "Unexpected packet size " |
789 | "during loop back test, size=%d, will retry" , |
790 | pktlength); |
791 | } else { |
792 | unsigned int j; |
793 | int mismatch = 0; |
794 | for (j = 0; j < MIN_PACKET_SIZE; j++) { |
795 | if (pdata->loopback_tx_pkt[j] |
796 | != pdata->loopback_rx_pkt[j]) { |
797 | mismatch = 1; |
798 | break; |
799 | } |
800 | } |
801 | if (!mismatch) { |
802 | SMSC_TRACE(pdata, hw, "Successfully verified " |
803 | "loopback packet" ); |
804 | return 0; |
805 | } else { |
806 | SMSC_WARN(pdata, hw, "Data mismatch " |
807 | "during loop back test, will retry" ); |
808 | } |
809 | } |
810 | } |
811 | |
812 | return -EIO; |
813 | } |
814 | |
815 | static int smsc911x_phy_reset(struct smsc911x_data *pdata) |
816 | { |
817 | unsigned int temp; |
818 | unsigned int i = 100000; |
819 | |
820 | temp = smsc911x_reg_read(pdata, PMT_CTRL); |
821 | smsc911x_reg_write(pdata, PMT_CTRL, val: temp | PMT_CTRL_PHY_RST_); |
822 | do { |
823 | msleep(msecs: 1); |
824 | temp = smsc911x_reg_read(pdata, PMT_CTRL); |
825 | } while ((i--) && (temp & PMT_CTRL_PHY_RST_)); |
826 | |
827 | if (unlikely(temp & PMT_CTRL_PHY_RST_)) { |
828 | SMSC_WARN(pdata, hw, "PHY reset failed to complete" ); |
829 | return -EIO; |
830 | } |
831 | /* Extra delay required because the phy may not be completed with |
832 | * its reset when BMCR_RESET is cleared. Specs say 256 uS is |
833 | * enough delay but using 1ms here to be safe */ |
834 | msleep(msecs: 1); |
835 | |
836 | return 0; |
837 | } |
838 | |
839 | static int smsc911x_phy_loopbacktest(struct net_device *dev) |
840 | { |
841 | struct smsc911x_data *pdata = netdev_priv(dev); |
842 | struct phy_device *phy_dev = dev->phydev; |
843 | int result = -EIO; |
844 | unsigned int i, val; |
845 | unsigned long flags; |
846 | |
847 | /* Initialise tx packet using broadcast destination address */ |
848 | eth_broadcast_addr(addr: pdata->loopback_tx_pkt); |
849 | |
850 | /* Use incrementing source address */ |
851 | for (i = 6; i < 12; i++) |
852 | pdata->loopback_tx_pkt[i] = (char)i; |
853 | |
854 | /* Set length type field */ |
855 | pdata->loopback_tx_pkt[12] = 0x00; |
856 | pdata->loopback_tx_pkt[13] = 0x00; |
857 | |
858 | for (i = 14; i < MIN_PACKET_SIZE; i++) |
859 | pdata->loopback_tx_pkt[i] = (char)i; |
860 | |
861 | val = smsc911x_reg_read(pdata, HW_CFG); |
862 | val &= HW_CFG_TX_FIF_SZ_; |
863 | val |= HW_CFG_SF_; |
864 | smsc911x_reg_write(pdata, HW_CFG, val); |
865 | |
866 | smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); |
867 | smsc911x_reg_write(pdata, RX_CFG, |
868 | val: (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8); |
869 | |
870 | for (i = 0; i < 10; i++) { |
871 | /* Set PHY to 10/FD, no ANEG, and loopback mode */ |
872 | smsc911x_mii_write(bus: phy_dev->mdio.bus, phyaddr: phy_dev->mdio.addr, |
873 | MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX); |
874 | |
875 | /* Enable MAC tx/rx, FD */ |
876 | spin_lock_irqsave(&pdata->mac_lock, flags); |
877 | smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_ |
878 | | MAC_CR_TXEN_ | MAC_CR_RXEN_); |
879 | spin_unlock_irqrestore(lock: &pdata->mac_lock, flags); |
880 | |
881 | if (smsc911x_phy_check_loopbackpkt(pdata) == 0) { |
882 | result = 0; |
883 | break; |
884 | } |
885 | pdata->resetcount++; |
886 | |
887 | /* Disable MAC rx */ |
888 | spin_lock_irqsave(&pdata->mac_lock, flags); |
889 | smsc911x_mac_write(pdata, MAC_CR, val: 0); |
890 | spin_unlock_irqrestore(lock: &pdata->mac_lock, flags); |
891 | |
892 | smsc911x_phy_reset(pdata); |
893 | } |
894 | |
895 | /* Disable MAC */ |
896 | spin_lock_irqsave(&pdata->mac_lock, flags); |
897 | smsc911x_mac_write(pdata, MAC_CR, val: 0); |
898 | spin_unlock_irqrestore(lock: &pdata->mac_lock, flags); |
899 | |
900 | /* Cancel PHY loopback mode */ |
901 | smsc911x_mii_write(bus: phy_dev->mdio.bus, phyaddr: phy_dev->mdio.addr, MII_BMCR, val: 0); |
902 | |
903 | smsc911x_reg_write(pdata, TX_CFG, val: 0); |
904 | smsc911x_reg_write(pdata, RX_CFG, val: 0); |
905 | |
906 | return result; |
907 | } |
908 | #endif /* USE_PHY_WORK_AROUND */ |
909 | |
910 | static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata) |
911 | { |
912 | struct net_device *ndev = pdata->dev; |
913 | struct phy_device *phy_dev = ndev->phydev; |
914 | u32 afc = smsc911x_reg_read(pdata, AFC_CFG); |
915 | u32 flow; |
916 | unsigned long flags; |
917 | |
918 | if (phy_dev->duplex == DUPLEX_FULL) { |
919 | u16 lcladv = phy_read(phydev: phy_dev, MII_ADVERTISE); |
920 | u16 rmtadv = phy_read(phydev: phy_dev, MII_LPA); |
921 | u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); |
922 | |
923 | if (cap & FLOW_CTRL_RX) |
924 | flow = 0xFFFF0002; |
925 | else |
926 | flow = 0; |
927 | |
928 | if (cap & FLOW_CTRL_TX) |
929 | afc |= 0xF; |
930 | else |
931 | afc &= ~0xF; |
932 | |
933 | SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s" , |
934 | (cap & FLOW_CTRL_RX ? "enabled" : "disabled" ), |
935 | (cap & FLOW_CTRL_TX ? "enabled" : "disabled" )); |
936 | } else { |
937 | SMSC_TRACE(pdata, hw, "half duplex" ); |
938 | flow = 0; |
939 | afc |= 0xF; |
940 | } |
941 | |
942 | spin_lock_irqsave(&pdata->mac_lock, flags); |
943 | smsc911x_mac_write(pdata, FLOW, val: flow); |
944 | spin_unlock_irqrestore(lock: &pdata->mac_lock, flags); |
945 | |
946 | smsc911x_reg_write(pdata, AFC_CFG, val: afc); |
947 | } |
948 | |
949 | /* Update link mode if anything has changed. Called periodically when the |
950 | * PHY is in polling mode, even if nothing has changed. */ |
951 | static void smsc911x_phy_adjust_link(struct net_device *dev) |
952 | { |
953 | struct smsc911x_data *pdata = netdev_priv(dev); |
954 | struct phy_device *phy_dev = dev->phydev; |
955 | unsigned long flags; |
956 | int carrier; |
957 | |
958 | if (phy_dev->duplex != pdata->last_duplex) { |
959 | unsigned int mac_cr; |
960 | SMSC_TRACE(pdata, hw, "duplex state has changed" ); |
961 | |
962 | spin_lock_irqsave(&pdata->mac_lock, flags); |
963 | mac_cr = smsc911x_mac_read(pdata, MAC_CR); |
964 | if (phy_dev->duplex) { |
965 | SMSC_TRACE(pdata, hw, |
966 | "configuring for full duplex mode" ); |
967 | mac_cr |= MAC_CR_FDPX_; |
968 | } else { |
969 | SMSC_TRACE(pdata, hw, |
970 | "configuring for half duplex mode" ); |
971 | mac_cr &= ~MAC_CR_FDPX_; |
972 | } |
973 | smsc911x_mac_write(pdata, MAC_CR, val: mac_cr); |
974 | spin_unlock_irqrestore(lock: &pdata->mac_lock, flags); |
975 | |
976 | smsc911x_phy_update_flowcontrol(pdata); |
977 | pdata->last_duplex = phy_dev->duplex; |
978 | } |
979 | |
980 | carrier = netif_carrier_ok(dev); |
981 | if (carrier != pdata->last_carrier) { |
982 | SMSC_TRACE(pdata, hw, "carrier state has changed" ); |
983 | if (carrier) { |
984 | SMSC_TRACE(pdata, hw, "configuring for carrier OK" ); |
985 | if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) && |
986 | (!pdata->using_extphy)) { |
987 | /* Restore original GPIO configuration */ |
988 | pdata->gpio_setting = pdata->gpio_orig_setting; |
989 | smsc911x_reg_write(pdata, GPIO_CFG, |
990 | val: pdata->gpio_setting); |
991 | } |
992 | } else { |
993 | SMSC_TRACE(pdata, hw, "configuring for no carrier" ); |
994 | /* Check global setting that LED1 |
995 | * usage is 10/100 indicator */ |
996 | pdata->gpio_setting = smsc911x_reg_read(pdata, |
997 | GPIO_CFG); |
998 | if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) && |
999 | (!pdata->using_extphy)) { |
1000 | /* Force 10/100 LED off, after saving |
1001 | * original GPIO configuration */ |
1002 | pdata->gpio_orig_setting = pdata->gpio_setting; |
1003 | |
1004 | pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_; |
1005 | pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_ |
1006 | | GPIO_CFG_GPIODIR0_ |
1007 | | GPIO_CFG_GPIOD0_); |
1008 | smsc911x_reg_write(pdata, GPIO_CFG, |
1009 | val: pdata->gpio_setting); |
1010 | } |
1011 | } |
1012 | pdata->last_carrier = carrier; |
1013 | } |
1014 | } |
1015 | |
1016 | static int smsc911x_mii_probe(struct net_device *dev) |
1017 | { |
1018 | struct smsc911x_data *pdata = netdev_priv(dev); |
1019 | struct phy_device *phydev; |
1020 | int ret; |
1021 | |
1022 | /* find the first phy */ |
1023 | phydev = phy_find_first(bus: pdata->mii_bus); |
1024 | if (!phydev) { |
1025 | netdev_err(dev, format: "no PHY found\n" ); |
1026 | return -ENODEV; |
1027 | } |
1028 | |
1029 | SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X" , |
1030 | phydev->mdio.addr, phydev->phy_id); |
1031 | |
1032 | ret = phy_connect_direct(dev, phydev, handler: &smsc911x_phy_adjust_link, |
1033 | interface: pdata->config.phy_interface); |
1034 | |
1035 | if (ret) { |
1036 | netdev_err(dev, format: "Could not attach to PHY\n" ); |
1037 | return ret; |
1038 | } |
1039 | |
1040 | phy_attached_info(phydev); |
1041 | |
1042 | phy_set_max_speed(phydev, SPEED_100); |
1043 | |
1044 | /* mask with MAC supported features */ |
1045 | phy_support_asym_pause(phydev); |
1046 | |
1047 | pdata->last_duplex = -1; |
1048 | pdata->last_carrier = -1; |
1049 | |
1050 | #ifdef USE_PHY_WORK_AROUND |
1051 | if (smsc911x_phy_loopbacktest(dev) < 0) { |
1052 | SMSC_WARN(pdata, hw, "Failed Loop Back Test" ); |
1053 | phy_disconnect(phydev); |
1054 | return -ENODEV; |
1055 | } |
1056 | SMSC_TRACE(pdata, hw, "Passed Loop Back Test" ); |
1057 | #endif /* USE_PHY_WORK_AROUND */ |
1058 | |
1059 | SMSC_TRACE(pdata, hw, "phy initialised successfully" ); |
1060 | return 0; |
1061 | } |
1062 | |
1063 | static int smsc911x_mii_init(struct platform_device *pdev, |
1064 | struct net_device *dev) |
1065 | { |
1066 | struct smsc911x_data *pdata = netdev_priv(dev); |
1067 | struct phy_device *phydev; |
1068 | int err = -ENXIO; |
1069 | |
1070 | pdata->mii_bus = mdiobus_alloc(); |
1071 | if (!pdata->mii_bus) { |
1072 | err = -ENOMEM; |
1073 | goto err_out_1; |
1074 | } |
1075 | |
1076 | pdata->mii_bus->name = SMSC_MDIONAME; |
1077 | snprintf(buf: pdata->mii_bus->id, MII_BUS_ID_SIZE, fmt: "%s-%x" , |
1078 | pdev->name, pdev->id); |
1079 | pdata->mii_bus->priv = pdata; |
1080 | pdata->mii_bus->read = smsc911x_mii_read; |
1081 | pdata->mii_bus->write = smsc911x_mii_write; |
1082 | |
1083 | pdata->mii_bus->parent = &pdev->dev; |
1084 | |
1085 | switch (pdata->idrev & 0xFFFF0000) { |
1086 | case 0x01170000: |
1087 | case 0x01150000: |
1088 | case 0x117A0000: |
1089 | case 0x115A0000: |
1090 | /* External PHY supported, try to autodetect */ |
1091 | smsc911x_phy_initialise_external(pdata); |
1092 | break; |
1093 | default: |
1094 | SMSC_TRACE(pdata, hw, "External PHY is not supported, " |
1095 | "using internal PHY" ); |
1096 | pdata->using_extphy = 0; |
1097 | break; |
1098 | } |
1099 | |
1100 | if (!pdata->using_extphy) { |
1101 | /* Mask all PHYs except ID 1 (internal) */ |
1102 | pdata->mii_bus->phy_mask = ~(1 << 1); |
1103 | } |
1104 | |
1105 | if (mdiobus_register(pdata->mii_bus)) { |
1106 | SMSC_WARN(pdata, probe, "Error registering mii bus" ); |
1107 | goto err_out_free_bus_2; |
1108 | } |
1109 | |
1110 | phydev = phy_find_first(bus: pdata->mii_bus); |
1111 | if (phydev) |
1112 | phydev->mac_managed_pm = true; |
1113 | |
1114 | return 0; |
1115 | |
1116 | err_out_free_bus_2: |
1117 | mdiobus_free(bus: pdata->mii_bus); |
1118 | err_out_1: |
1119 | return err; |
1120 | } |
1121 | |
1122 | /* Gets the number of tx statuses in the fifo */ |
1123 | static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata) |
1124 | { |
1125 | return (smsc911x_reg_read(pdata, TX_FIFO_INF) |
1126 | & TX_FIFO_INF_TSUSED_) >> 16; |
1127 | } |
1128 | |
1129 | /* Reads tx statuses and increments counters where necessary */ |
1130 | static void smsc911x_tx_update_txcounters(struct net_device *dev) |
1131 | { |
1132 | struct smsc911x_data *pdata = netdev_priv(dev); |
1133 | unsigned int tx_stat; |
1134 | |
1135 | while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) { |
1136 | if (unlikely(tx_stat & 0x80000000)) { |
1137 | /* In this driver the packet tag is used as the packet |
1138 | * length. Since a packet length can never reach the |
1139 | * size of 0x8000, this bit is reserved. It is worth |
1140 | * noting that the "reserved bit" in the warning above |
1141 | * does not reference a hardware defined reserved bit |
1142 | * but rather a driver defined one. |
1143 | */ |
1144 | SMSC_WARN(pdata, hw, "Packet tag reserved bit is high" ); |
1145 | } else { |
1146 | if (unlikely(tx_stat & TX_STS_ES_)) { |
1147 | dev->stats.tx_errors++; |
1148 | } else { |
1149 | dev->stats.tx_packets++; |
1150 | dev->stats.tx_bytes += (tx_stat >> 16); |
1151 | } |
1152 | if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) { |
1153 | dev->stats.collisions += 16; |
1154 | dev->stats.tx_aborted_errors += 1; |
1155 | } else { |
1156 | dev->stats.collisions += |
1157 | ((tx_stat >> 3) & 0xF); |
1158 | } |
1159 | if (unlikely(tx_stat & TX_STS_LOST_CARRIER_)) |
1160 | dev->stats.tx_carrier_errors += 1; |
1161 | if (unlikely(tx_stat & TX_STS_LATE_COL_)) { |
1162 | dev->stats.collisions++; |
1163 | dev->stats.tx_aborted_errors++; |
1164 | } |
1165 | } |
1166 | } |
1167 | } |
1168 | |
1169 | /* Increments the Rx error counters */ |
1170 | static void |
1171 | smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat) |
1172 | { |
1173 | int crc_err = 0; |
1174 | |
1175 | if (unlikely(rxstat & RX_STS_ES_)) { |
1176 | dev->stats.rx_errors++; |
1177 | if (unlikely(rxstat & RX_STS_CRC_ERR_)) { |
1178 | dev->stats.rx_crc_errors++; |
1179 | crc_err = 1; |
1180 | } |
1181 | } |
1182 | if (likely(!crc_err)) { |
1183 | if (unlikely((rxstat & RX_STS_FRAME_TYPE_) && |
1184 | (rxstat & RX_STS_LENGTH_ERR_))) |
1185 | dev->stats.rx_length_errors++; |
1186 | if (rxstat & RX_STS_MCAST_) |
1187 | dev->stats.multicast++; |
1188 | } |
1189 | } |
1190 | |
1191 | /* Quickly dumps bad packets */ |
1192 | static void |
1193 | smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords) |
1194 | { |
1195 | if (likely(pktwords >= 4)) { |
1196 | unsigned int timeout = 500; |
1197 | unsigned int val; |
1198 | smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_); |
1199 | do { |
1200 | udelay(1); |
1201 | val = smsc911x_reg_read(pdata, RX_DP_CTRL); |
1202 | } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout); |
1203 | |
1204 | if (unlikely(timeout == 0)) |
1205 | SMSC_WARN(pdata, hw, "Timed out waiting for " |
1206 | "RX FFWD to finish, RX_DP_CTRL: 0x%08X" , val); |
1207 | } else { |
1208 | while (pktwords--) |
1209 | smsc911x_reg_read(pdata, RX_DATA_FIFO); |
1210 | } |
1211 | } |
1212 | |
1213 | /* NAPI poll function */ |
1214 | static int smsc911x_poll(struct napi_struct *napi, int budget) |
1215 | { |
1216 | struct smsc911x_data *pdata = |
1217 | container_of(napi, struct smsc911x_data, napi); |
1218 | struct net_device *dev = pdata->dev; |
1219 | int npackets = 0; |
1220 | |
1221 | while (npackets < budget) { |
1222 | unsigned int pktlength; |
1223 | unsigned int pktwords; |
1224 | struct sk_buff *skb; |
1225 | unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata); |
1226 | |
1227 | if (!rxstat) { |
1228 | unsigned int temp; |
1229 | /* We processed all packets available. Tell NAPI it can |
1230 | * stop polling then re-enable rx interrupts */ |
1231 | smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_); |
1232 | napi_complete(n: napi); |
1233 | temp = smsc911x_reg_read(pdata, INT_EN); |
1234 | temp |= INT_EN_RSFL_EN_; |
1235 | smsc911x_reg_write(pdata, INT_EN, val: temp); |
1236 | break; |
1237 | } |
1238 | |
1239 | /* Count packet for NAPI scheduling, even if it has an error. |
1240 | * Error packets still require cycles to discard */ |
1241 | npackets++; |
1242 | |
1243 | pktlength = ((rxstat & 0x3FFF0000) >> 16); |
1244 | pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2; |
1245 | smsc911x_rx_counterrors(dev, rxstat); |
1246 | |
1247 | if (unlikely(rxstat & RX_STS_ES_)) { |
1248 | SMSC_WARN(pdata, rx_err, |
1249 | "Discarding packet with error bit set" ); |
1250 | /* Packet has an error, discard it and continue with |
1251 | * the next */ |
1252 | smsc911x_rx_fastforward(pdata, pktwords); |
1253 | dev->stats.rx_dropped++; |
1254 | continue; |
1255 | } |
1256 | |
1257 | skb = netdev_alloc_skb(dev, length: pktwords << 2); |
1258 | if (unlikely(!skb)) { |
1259 | SMSC_WARN(pdata, rx_err, |
1260 | "Unable to allocate skb for rx packet" ); |
1261 | /* Drop the packet and stop this polling iteration */ |
1262 | smsc911x_rx_fastforward(pdata, pktwords); |
1263 | dev->stats.rx_dropped++; |
1264 | break; |
1265 | } |
1266 | |
1267 | pdata->ops->rx_readfifo(pdata, |
1268 | (unsigned int *)skb->data, pktwords); |
1269 | |
1270 | /* Align IP on 16B boundary */ |
1271 | skb_reserve(skb, NET_IP_ALIGN); |
1272 | skb_put(skb, len: pktlength - 4); |
1273 | skb->protocol = eth_type_trans(skb, dev); |
1274 | skb_checksum_none_assert(skb); |
1275 | netif_receive_skb(skb); |
1276 | |
1277 | /* Update counters */ |
1278 | dev->stats.rx_packets++; |
1279 | dev->stats.rx_bytes += (pktlength - 4); |
1280 | } |
1281 | |
1282 | /* Return total received packets */ |
1283 | return npackets; |
1284 | } |
1285 | |
1286 | /* Returns hash bit number for given MAC address |
1287 | * Example: |
1288 | * 01 00 5E 00 00 01 -> returns bit number 31 */ |
1289 | static unsigned int smsc911x_hash(char addr[ETH_ALEN]) |
1290 | { |
1291 | return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; |
1292 | } |
1293 | |
1294 | static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata) |
1295 | { |
1296 | /* Performs the multicast & mac_cr update. This is called when |
1297 | * safe on the current hardware, and with the mac_lock held */ |
1298 | unsigned int mac_cr; |
1299 | |
1300 | SMSC_ASSERT_MAC_LOCK(pdata); |
1301 | |
1302 | mac_cr = smsc911x_mac_read(pdata, MAC_CR); |
1303 | mac_cr |= pdata->set_bits_mask; |
1304 | mac_cr &= ~(pdata->clear_bits_mask); |
1305 | smsc911x_mac_write(pdata, MAC_CR, val: mac_cr); |
1306 | smsc911x_mac_write(pdata, HASHH, val: pdata->hashhi); |
1307 | smsc911x_mac_write(pdata, HASHL, val: pdata->hashlo); |
1308 | SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X" , |
1309 | mac_cr, pdata->hashhi, pdata->hashlo); |
1310 | } |
1311 | |
1312 | static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata) |
1313 | { |
1314 | unsigned int mac_cr; |
1315 | |
1316 | /* This function is only called for older LAN911x devices |
1317 | * (revA or revB), where MAC_CR, HASHH and HASHL should not |
1318 | * be modified during Rx - newer devices immediately update the |
1319 | * registers. |
1320 | * |
1321 | * This is called from interrupt context */ |
1322 | |
1323 | spin_lock(lock: &pdata->mac_lock); |
1324 | |
1325 | /* Check Rx has stopped */ |
1326 | if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_) |
1327 | SMSC_WARN(pdata, drv, "Rx not stopped" ); |
1328 | |
1329 | /* Perform the update - safe to do now Rx has stopped */ |
1330 | smsc911x_rx_multicast_update(pdata); |
1331 | |
1332 | /* Re-enable Rx */ |
1333 | mac_cr = smsc911x_mac_read(pdata, MAC_CR); |
1334 | mac_cr |= MAC_CR_RXEN_; |
1335 | smsc911x_mac_write(pdata, MAC_CR, val: mac_cr); |
1336 | |
1337 | pdata->multicast_update_pending = 0; |
1338 | |
1339 | spin_unlock(lock: &pdata->mac_lock); |
1340 | } |
1341 | |
1342 | static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata) |
1343 | { |
1344 | struct net_device *ndev = pdata->dev; |
1345 | struct phy_device *phy_dev = ndev->phydev; |
1346 | int rc = 0; |
1347 | |
1348 | if (!phy_dev) |
1349 | return rc; |
1350 | |
1351 | /* If the internal PHY is in General Power-Down mode, all, except the |
1352 | * management interface, is powered-down and stays in that condition as |
1353 | * long as Phy register bit 0.11 is HIGH. |
1354 | * |
1355 | * In that case, clear the bit 0.11, so the PHY powers up and we can |
1356 | * access to the phy registers. |
1357 | */ |
1358 | rc = phy_read(phydev: phy_dev, MII_BMCR); |
1359 | if (rc < 0) { |
1360 | SMSC_WARN(pdata, drv, "Failed reading PHY control reg" ); |
1361 | return rc; |
1362 | } |
1363 | |
1364 | /* If the PHY general power-down bit is not set is not necessary to |
1365 | * disable the general power down-mode. |
1366 | */ |
1367 | if (rc & BMCR_PDOWN) { |
1368 | rc = phy_write(phydev: phy_dev, MII_BMCR, val: rc & ~BMCR_PDOWN); |
1369 | if (rc < 0) { |
1370 | SMSC_WARN(pdata, drv, "Failed writing PHY control reg" ); |
1371 | return rc; |
1372 | } |
1373 | |
1374 | usleep_range(min: 1000, max: 1500); |
1375 | } |
1376 | |
1377 | return 0; |
1378 | } |
1379 | |
1380 | static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata) |
1381 | { |
1382 | struct net_device *ndev = pdata->dev; |
1383 | struct phy_device *phy_dev = ndev->phydev; |
1384 | int rc = 0; |
1385 | |
1386 | if (!phy_dev) |
1387 | return rc; |
1388 | |
1389 | rc = phy_read(phydev: phy_dev, MII_LAN83C185_CTRL_STATUS); |
1390 | |
1391 | if (rc < 0) { |
1392 | SMSC_WARN(pdata, drv, "Failed reading PHY control reg" ); |
1393 | return rc; |
1394 | } |
1395 | |
1396 | /* Only disable if energy detect mode is already enabled */ |
1397 | if (rc & MII_LAN83C185_EDPWRDOWN) { |
1398 | /* Disable energy detect mode for this SMSC Transceivers */ |
1399 | rc = phy_write(phydev: phy_dev, MII_LAN83C185_CTRL_STATUS, |
1400 | val: rc & (~MII_LAN83C185_EDPWRDOWN)); |
1401 | |
1402 | if (rc < 0) { |
1403 | SMSC_WARN(pdata, drv, "Failed writing PHY control reg" ); |
1404 | return rc; |
1405 | } |
1406 | /* Allow PHY to wakeup */ |
1407 | mdelay(2); |
1408 | } |
1409 | |
1410 | return 0; |
1411 | } |
1412 | |
1413 | static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata) |
1414 | { |
1415 | struct net_device *ndev = pdata->dev; |
1416 | struct phy_device *phy_dev = ndev->phydev; |
1417 | int rc = 0; |
1418 | |
1419 | if (!phy_dev) |
1420 | return rc; |
1421 | |
1422 | rc = phy_read(phydev: phy_dev, MII_LAN83C185_CTRL_STATUS); |
1423 | |
1424 | if (rc < 0) { |
1425 | SMSC_WARN(pdata, drv, "Failed reading PHY control reg" ); |
1426 | return rc; |
1427 | } |
1428 | |
1429 | /* Only enable if energy detect mode is already disabled */ |
1430 | if (!(rc & MII_LAN83C185_EDPWRDOWN)) { |
1431 | /* Enable energy detect mode for this SMSC Transceivers */ |
1432 | rc = phy_write(phydev: phy_dev, MII_LAN83C185_CTRL_STATUS, |
1433 | val: rc | MII_LAN83C185_EDPWRDOWN); |
1434 | |
1435 | if (rc < 0) { |
1436 | SMSC_WARN(pdata, drv, "Failed writing PHY control reg" ); |
1437 | return rc; |
1438 | } |
1439 | } |
1440 | return 0; |
1441 | } |
1442 | |
1443 | static int smsc911x_soft_reset(struct smsc911x_data *pdata) |
1444 | { |
1445 | unsigned int timeout; |
1446 | unsigned int temp; |
1447 | int ret; |
1448 | unsigned int reset_offset = HW_CFG; |
1449 | unsigned int reset_mask = HW_CFG_SRST_; |
1450 | |
1451 | /* |
1452 | * Make sure to power-up the PHY chip before doing a reset, otherwise |
1453 | * the reset fails. |
1454 | */ |
1455 | ret = smsc911x_phy_general_power_up(pdata); |
1456 | if (ret) { |
1457 | SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip" ); |
1458 | return ret; |
1459 | } |
1460 | |
1461 | /* |
1462 | * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that |
1463 | * are initialized in a Energy Detect Power-Down mode that prevents |
1464 | * the MAC chip to be software reseted. So we have to wakeup the PHY |
1465 | * before. |
1466 | */ |
1467 | if (pdata->generation == 4) { |
1468 | ret = smsc911x_phy_disable_energy_detect(pdata); |
1469 | |
1470 | if (ret) { |
1471 | SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip" ); |
1472 | return ret; |
1473 | } |
1474 | } |
1475 | |
1476 | if ((pdata->idrev & 0xFFFF0000) == LAN9250) { |
1477 | /* special reset for LAN9250 */ |
1478 | reset_offset = RESET_CTL; |
1479 | reset_mask = RESET_CTL_DIGITAL_RST_; |
1480 | } |
1481 | |
1482 | /* Reset the LAN911x */ |
1483 | smsc911x_reg_write(pdata, reg: reset_offset, val: reset_mask); |
1484 | |
1485 | /* verify reset bit is cleared */ |
1486 | timeout = 10; |
1487 | do { |
1488 | udelay(10); |
1489 | temp = smsc911x_reg_read(pdata, reg: reset_offset); |
1490 | } while ((--timeout) && (temp & reset_mask)); |
1491 | |
1492 | if (unlikely(temp & reset_mask)) { |
1493 | SMSC_WARN(pdata, drv, "Failed to complete reset" ); |
1494 | return -EIO; |
1495 | } |
1496 | |
1497 | if (pdata->generation == 4) { |
1498 | ret = smsc911x_phy_enable_energy_detect(pdata); |
1499 | |
1500 | if (ret) { |
1501 | SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip" ); |
1502 | return ret; |
1503 | } |
1504 | } |
1505 | |
1506 | return 0; |
1507 | } |
1508 | |
1509 | /* Sets the device MAC address to dev_addr, called with mac_lock held */ |
1510 | static void |
1511 | smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, const u8 dev_addr[6]) |
1512 | { |
1513 | u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4]; |
1514 | u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) | |
1515 | (dev_addr[1] << 8) | dev_addr[0]; |
1516 | |
1517 | SMSC_ASSERT_MAC_LOCK(pdata); |
1518 | |
1519 | smsc911x_mac_write(pdata, ADDRH, val: mac_high16); |
1520 | smsc911x_mac_write(pdata, ADDRL, val: mac_low32); |
1521 | } |
1522 | |
1523 | static void smsc911x_disable_irq_chip(struct net_device *dev) |
1524 | { |
1525 | struct smsc911x_data *pdata = netdev_priv(dev); |
1526 | |
1527 | smsc911x_reg_write(pdata, INT_EN, val: 0); |
1528 | smsc911x_reg_write(pdata, INT_STS, val: 0xFFFFFFFF); |
1529 | } |
1530 | |
1531 | static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id) |
1532 | { |
1533 | struct net_device *dev = dev_id; |
1534 | struct smsc911x_data *pdata = netdev_priv(dev); |
1535 | u32 intsts = smsc911x_reg_read(pdata, INT_STS); |
1536 | u32 inten = smsc911x_reg_read(pdata, INT_EN); |
1537 | int serviced = IRQ_NONE; |
1538 | u32 temp; |
1539 | |
1540 | if (unlikely(intsts & inten & INT_STS_SW_INT_)) { |
1541 | temp = smsc911x_reg_read(pdata, INT_EN); |
1542 | temp &= (~INT_EN_SW_INT_EN_); |
1543 | smsc911x_reg_write(pdata, INT_EN, val: temp); |
1544 | smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_); |
1545 | pdata->software_irq_signal = 1; |
1546 | smp_wmb(); |
1547 | serviced = IRQ_HANDLED; |
1548 | } |
1549 | |
1550 | if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) { |
1551 | /* Called when there is a multicast update scheduled and |
1552 | * it is now safe to complete the update */ |
1553 | SMSC_TRACE(pdata, intr, "RX Stop interrupt" ); |
1554 | smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_); |
1555 | if (pdata->multicast_update_pending) |
1556 | smsc911x_rx_multicast_update_workaround(pdata); |
1557 | serviced = IRQ_HANDLED; |
1558 | } |
1559 | |
1560 | if (intsts & inten & INT_STS_TDFA_) { |
1561 | temp = smsc911x_reg_read(pdata, FIFO_INT); |
1562 | temp |= FIFO_INT_TX_AVAIL_LEVEL_; |
1563 | smsc911x_reg_write(pdata, FIFO_INT, val: temp); |
1564 | smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_); |
1565 | netif_wake_queue(dev); |
1566 | serviced = IRQ_HANDLED; |
1567 | } |
1568 | |
1569 | if (unlikely(intsts & inten & INT_STS_RXE_)) { |
1570 | SMSC_TRACE(pdata, intr, "RX Error interrupt" ); |
1571 | smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_); |
1572 | serviced = IRQ_HANDLED; |
1573 | } |
1574 | |
1575 | if (likely(intsts & inten & INT_STS_RSFL_)) { |
1576 | if (likely(napi_schedule_prep(&pdata->napi))) { |
1577 | /* Disable Rx interrupts */ |
1578 | temp = smsc911x_reg_read(pdata, INT_EN); |
1579 | temp &= (~INT_EN_RSFL_EN_); |
1580 | smsc911x_reg_write(pdata, INT_EN, val: temp); |
1581 | /* Schedule a NAPI poll */ |
1582 | __napi_schedule(n: &pdata->napi); |
1583 | } else { |
1584 | SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed" ); |
1585 | } |
1586 | serviced = IRQ_HANDLED; |
1587 | } |
1588 | |
1589 | return serviced; |
1590 | } |
1591 | |
1592 | static int smsc911x_open(struct net_device *dev) |
1593 | { |
1594 | struct smsc911x_data *pdata = netdev_priv(dev); |
1595 | unsigned int timeout; |
1596 | unsigned int temp; |
1597 | unsigned int intcfg; |
1598 | int retval; |
1599 | int irq_flags; |
1600 | |
1601 | pm_runtime_get_sync(dev: dev->dev.parent); |
1602 | |
1603 | /* find and start the given phy */ |
1604 | if (!dev->phydev) { |
1605 | retval = smsc911x_mii_probe(dev); |
1606 | if (retval < 0) { |
1607 | SMSC_WARN(pdata, probe, "Error starting phy" ); |
1608 | goto out; |
1609 | } |
1610 | } |
1611 | |
1612 | /* Reset the LAN911x */ |
1613 | retval = smsc911x_soft_reset(pdata); |
1614 | if (retval) { |
1615 | SMSC_WARN(pdata, hw, "soft reset failed" ); |
1616 | goto mii_free_out; |
1617 | } |
1618 | |
1619 | smsc911x_reg_write(pdata, HW_CFG, val: 0x00050000); |
1620 | smsc911x_reg_write(pdata, AFC_CFG, val: 0x006E3740); |
1621 | |
1622 | /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */ |
1623 | spin_lock_irq(lock: &pdata->mac_lock); |
1624 | smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q); |
1625 | spin_unlock_irq(lock: &pdata->mac_lock); |
1626 | |
1627 | /* Make sure EEPROM has finished loading before setting GPIO_CFG */ |
1628 | timeout = 50; |
1629 | while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) && |
1630 | --timeout) { |
1631 | udelay(10); |
1632 | } |
1633 | |
1634 | if (unlikely(timeout == 0)) |
1635 | SMSC_WARN(pdata, ifup, |
1636 | "Timed out waiting for EEPROM busy bit to clear" ); |
1637 | |
1638 | smsc911x_reg_write(pdata, GPIO_CFG, val: 0x70070000); |
1639 | |
1640 | /* The soft reset above cleared the device's MAC address, |
1641 | * restore it from local copy (set in probe) */ |
1642 | spin_lock_irq(lock: &pdata->mac_lock); |
1643 | smsc911x_set_hw_mac_address(pdata, dev_addr: dev->dev_addr); |
1644 | spin_unlock_irq(lock: &pdata->mac_lock); |
1645 | |
1646 | /* Initialise irqs, but leave all sources disabled */ |
1647 | smsc911x_disable_irq_chip(dev); |
1648 | |
1649 | /* Set interrupt deassertion to 100uS */ |
1650 | intcfg = ((10 << 24) | INT_CFG_IRQ_EN_); |
1651 | |
1652 | if (pdata->config.irq_polarity) { |
1653 | SMSC_TRACE(pdata, ifup, "irq polarity: active high" ); |
1654 | intcfg |= INT_CFG_IRQ_POL_; |
1655 | } else { |
1656 | SMSC_TRACE(pdata, ifup, "irq polarity: active low" ); |
1657 | } |
1658 | |
1659 | if (pdata->config.irq_type) { |
1660 | SMSC_TRACE(pdata, ifup, "irq type: push-pull" ); |
1661 | intcfg |= INT_CFG_IRQ_TYPE_; |
1662 | } else { |
1663 | SMSC_TRACE(pdata, ifup, "irq type: open drain" ); |
1664 | } |
1665 | |
1666 | smsc911x_reg_write(pdata, INT_CFG, val: intcfg); |
1667 | |
1668 | SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d" , dev->irq); |
1669 | pdata->software_irq_signal = 0; |
1670 | smp_wmb(); |
1671 | |
1672 | irq_flags = irq_get_trigger_type(irq: dev->irq); |
1673 | retval = request_irq(irq: dev->irq, handler: smsc911x_irqhandler, |
1674 | flags: irq_flags | IRQF_SHARED, name: dev->name, dev); |
1675 | if (retval) { |
1676 | SMSC_WARN(pdata, probe, |
1677 | "Unable to claim requested irq: %d" , dev->irq); |
1678 | goto mii_free_out; |
1679 | } |
1680 | |
1681 | temp = smsc911x_reg_read(pdata, INT_EN); |
1682 | temp |= INT_EN_SW_INT_EN_; |
1683 | smsc911x_reg_write(pdata, INT_EN, val: temp); |
1684 | |
1685 | timeout = 1000; |
1686 | while (timeout--) { |
1687 | if (pdata->software_irq_signal) |
1688 | break; |
1689 | msleep(msecs: 1); |
1690 | } |
1691 | |
1692 | if (!pdata->software_irq_signal) { |
1693 | netdev_warn(dev, format: "ISR failed signaling test (IRQ %d)\n" , |
1694 | dev->irq); |
1695 | retval = -ENODEV; |
1696 | goto irq_stop_out; |
1697 | } |
1698 | SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d" , |
1699 | dev->irq); |
1700 | |
1701 | netdev_info(dev, format: "SMSC911x/921x identified at %#08lx, IRQ: %d\n" , |
1702 | (unsigned long)pdata->ioaddr, dev->irq); |
1703 | |
1704 | /* Reset the last known duplex and carrier */ |
1705 | pdata->last_duplex = -1; |
1706 | pdata->last_carrier = -1; |
1707 | |
1708 | /* Bring the PHY up */ |
1709 | phy_start(phydev: dev->phydev); |
1710 | |
1711 | temp = smsc911x_reg_read(pdata, HW_CFG); |
1712 | /* Preserve TX FIFO size and external PHY configuration */ |
1713 | temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF); |
1714 | temp |= HW_CFG_SF_; |
1715 | smsc911x_reg_write(pdata, HW_CFG, val: temp); |
1716 | |
1717 | temp = smsc911x_reg_read(pdata, FIFO_INT); |
1718 | temp |= FIFO_INT_TX_AVAIL_LEVEL_; |
1719 | temp &= ~(FIFO_INT_RX_STS_LEVEL_); |
1720 | smsc911x_reg_write(pdata, FIFO_INT, val: temp); |
1721 | |
1722 | /* set RX Data offset to 2 bytes for alignment */ |
1723 | smsc911x_reg_write(pdata, RX_CFG, val: (NET_IP_ALIGN << 8)); |
1724 | |
1725 | /* enable NAPI polling before enabling RX interrupts */ |
1726 | napi_enable(n: &pdata->napi); |
1727 | |
1728 | temp = smsc911x_reg_read(pdata, INT_EN); |
1729 | temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_); |
1730 | smsc911x_reg_write(pdata, INT_EN, val: temp); |
1731 | |
1732 | spin_lock_irq(lock: &pdata->mac_lock); |
1733 | temp = smsc911x_mac_read(pdata, MAC_CR); |
1734 | temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); |
1735 | smsc911x_mac_write(pdata, MAC_CR, val: temp); |
1736 | spin_unlock_irq(lock: &pdata->mac_lock); |
1737 | |
1738 | smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); |
1739 | |
1740 | netif_start_queue(dev); |
1741 | return 0; |
1742 | |
1743 | irq_stop_out: |
1744 | free_irq(dev->irq, dev); |
1745 | mii_free_out: |
1746 | phy_disconnect(phydev: dev->phydev); |
1747 | out: |
1748 | pm_runtime_put(dev: dev->dev.parent); |
1749 | return retval; |
1750 | } |
1751 | |
1752 | /* Entry point for stopping the interface */ |
1753 | static int smsc911x_stop(struct net_device *dev) |
1754 | { |
1755 | struct smsc911x_data *pdata = netdev_priv(dev); |
1756 | unsigned int temp; |
1757 | |
1758 | /* Disable all device interrupts */ |
1759 | temp = smsc911x_reg_read(pdata, INT_CFG); |
1760 | temp &= ~INT_CFG_IRQ_EN_; |
1761 | smsc911x_reg_write(pdata, INT_CFG, val: temp); |
1762 | |
1763 | /* Stop Tx and Rx polling */ |
1764 | netif_stop_queue(dev); |
1765 | napi_disable(n: &pdata->napi); |
1766 | |
1767 | /* At this point all Rx and Tx activity is stopped */ |
1768 | dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); |
1769 | smsc911x_tx_update_txcounters(dev); |
1770 | |
1771 | free_irq(dev->irq, dev); |
1772 | |
1773 | /* Bring the PHY down */ |
1774 | if (dev->phydev) { |
1775 | phy_stop(phydev: dev->phydev); |
1776 | phy_disconnect(phydev: dev->phydev); |
1777 | } |
1778 | netif_carrier_off(dev); |
1779 | pm_runtime_put(dev: dev->dev.parent); |
1780 | |
1781 | SMSC_TRACE(pdata, ifdown, "Interface stopped" ); |
1782 | return 0; |
1783 | } |
1784 | |
1785 | /* Entry point for transmitting a packet */ |
1786 | static netdev_tx_t |
1787 | smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) |
1788 | { |
1789 | struct smsc911x_data *pdata = netdev_priv(dev); |
1790 | unsigned int freespace; |
1791 | unsigned int tx_cmd_a; |
1792 | unsigned int tx_cmd_b; |
1793 | unsigned int temp; |
1794 | u32 wrsz; |
1795 | ulong bufp; |
1796 | |
1797 | freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_; |
1798 | |
1799 | if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD)) |
1800 | SMSC_WARN(pdata, tx_err, |
1801 | "Tx data fifo low, space available: %d" , freespace); |
1802 | |
1803 | /* Word alignment adjustment */ |
1804 | tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16; |
1805 | tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; |
1806 | tx_cmd_a |= (unsigned int)skb->len; |
1807 | |
1808 | tx_cmd_b = ((unsigned int)skb->len) << 16; |
1809 | tx_cmd_b |= (unsigned int)skb->len; |
1810 | |
1811 | smsc911x_reg_write(pdata, TX_DATA_FIFO, val: tx_cmd_a); |
1812 | smsc911x_reg_write(pdata, TX_DATA_FIFO, val: tx_cmd_b); |
1813 | |
1814 | bufp = (ulong)skb->data & (~0x3); |
1815 | wrsz = (u32)skb->len + 3; |
1816 | wrsz += (u32)((ulong)skb->data & 0x3); |
1817 | wrsz >>= 2; |
1818 | |
1819 | pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); |
1820 | freespace -= (skb->len + 32); |
1821 | skb_tx_timestamp(skb); |
1822 | dev_consume_skb_any(skb); |
1823 | |
1824 | if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30)) |
1825 | smsc911x_tx_update_txcounters(dev); |
1826 | |
1827 | if (freespace < TX_FIFO_LOW_THRESHOLD) { |
1828 | netif_stop_queue(dev); |
1829 | temp = smsc911x_reg_read(pdata, FIFO_INT); |
1830 | temp &= 0x00FFFFFF; |
1831 | temp |= 0x32000000; |
1832 | smsc911x_reg_write(pdata, FIFO_INT, val: temp); |
1833 | } |
1834 | |
1835 | return NETDEV_TX_OK; |
1836 | } |
1837 | |
1838 | /* Entry point for getting status counters */ |
1839 | static struct net_device_stats *smsc911x_get_stats(struct net_device *dev) |
1840 | { |
1841 | struct smsc911x_data *pdata = netdev_priv(dev); |
1842 | smsc911x_tx_update_txcounters(dev); |
1843 | dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); |
1844 | return &dev->stats; |
1845 | } |
1846 | |
1847 | /* Entry point for setting addressing modes */ |
1848 | static void smsc911x_set_multicast_list(struct net_device *dev) |
1849 | { |
1850 | struct smsc911x_data *pdata = netdev_priv(dev); |
1851 | unsigned long flags; |
1852 | |
1853 | if (dev->flags & IFF_PROMISC) { |
1854 | /* Enabling promiscuous mode */ |
1855 | pdata->set_bits_mask = MAC_CR_PRMS_; |
1856 | pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_); |
1857 | pdata->hashhi = 0; |
1858 | pdata->hashlo = 0; |
1859 | } else if (dev->flags & IFF_ALLMULTI) { |
1860 | /* Enabling all multicast mode */ |
1861 | pdata->set_bits_mask = MAC_CR_MCPAS_; |
1862 | pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_); |
1863 | pdata->hashhi = 0; |
1864 | pdata->hashlo = 0; |
1865 | } else if (!netdev_mc_empty(dev)) { |
1866 | /* Enabling specific multicast addresses */ |
1867 | unsigned int hash_high = 0; |
1868 | unsigned int hash_low = 0; |
1869 | struct netdev_hw_addr *ha; |
1870 | |
1871 | pdata->set_bits_mask = MAC_CR_HPFILT_; |
1872 | pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_); |
1873 | |
1874 | netdev_for_each_mc_addr(ha, dev) { |
1875 | unsigned int bitnum = smsc911x_hash(addr: ha->addr); |
1876 | unsigned int mask = 0x01 << (bitnum & 0x1F); |
1877 | |
1878 | if (bitnum & 0x20) |
1879 | hash_high |= mask; |
1880 | else |
1881 | hash_low |= mask; |
1882 | } |
1883 | |
1884 | pdata->hashhi = hash_high; |
1885 | pdata->hashlo = hash_low; |
1886 | } else { |
1887 | /* Enabling local MAC address only */ |
1888 | pdata->set_bits_mask = 0; |
1889 | pdata->clear_bits_mask = |
1890 | (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); |
1891 | pdata->hashhi = 0; |
1892 | pdata->hashlo = 0; |
1893 | } |
1894 | |
1895 | spin_lock_irqsave(&pdata->mac_lock, flags); |
1896 | |
1897 | if (pdata->generation <= 1) { |
1898 | /* Older hardware revision - cannot change these flags while |
1899 | * receiving data */ |
1900 | if (!pdata->multicast_update_pending) { |
1901 | unsigned int temp; |
1902 | SMSC_TRACE(pdata, hw, "scheduling mcast update" ); |
1903 | pdata->multicast_update_pending = 1; |
1904 | |
1905 | /* Request the hardware to stop, then perform the |
1906 | * update when we get an RX_STOP interrupt */ |
1907 | temp = smsc911x_mac_read(pdata, MAC_CR); |
1908 | temp &= ~(MAC_CR_RXEN_); |
1909 | smsc911x_mac_write(pdata, MAC_CR, val: temp); |
1910 | } else { |
1911 | /* There is another update pending, this should now |
1912 | * use the newer values */ |
1913 | } |
1914 | } else { |
1915 | /* Newer hardware revision - can write immediately */ |
1916 | smsc911x_rx_multicast_update(pdata); |
1917 | } |
1918 | |
1919 | spin_unlock_irqrestore(lock: &pdata->mac_lock, flags); |
1920 | } |
1921 | |
1922 | #ifdef CONFIG_NET_POLL_CONTROLLER |
1923 | static void smsc911x_poll_controller(struct net_device *dev) |
1924 | { |
1925 | disable_irq(irq: dev->irq); |
1926 | smsc911x_irqhandler(irq: 0, dev_id: dev); |
1927 | enable_irq(irq: dev->irq); |
1928 | } |
1929 | #endif /* CONFIG_NET_POLL_CONTROLLER */ |
1930 | |
1931 | static int smsc911x_set_mac_address(struct net_device *dev, void *p) |
1932 | { |
1933 | struct smsc911x_data *pdata = netdev_priv(dev); |
1934 | struct sockaddr *addr = p; |
1935 | |
1936 | /* On older hardware revisions we cannot change the mac address |
1937 | * registers while receiving data. Newer devices can safely change |
1938 | * this at any time. */ |
1939 | if (pdata->generation <= 1 && netif_running(dev)) |
1940 | return -EBUSY; |
1941 | |
1942 | if (!is_valid_ether_addr(addr: addr->sa_data)) |
1943 | return -EADDRNOTAVAIL; |
1944 | |
1945 | eth_hw_addr_set(dev, addr: addr->sa_data); |
1946 | |
1947 | spin_lock_irq(lock: &pdata->mac_lock); |
1948 | smsc911x_set_hw_mac_address(pdata, dev_addr: dev->dev_addr); |
1949 | spin_unlock_irq(lock: &pdata->mac_lock); |
1950 | |
1951 | netdev_info(dev, format: "MAC Address: %pM\n" , dev->dev_addr); |
1952 | |
1953 | return 0; |
1954 | } |
1955 | |
1956 | static void smsc911x_ethtool_getdrvinfo(struct net_device *dev, |
1957 | struct ethtool_drvinfo *info) |
1958 | { |
1959 | strscpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver)); |
1960 | strscpy(info->version, SMSC_DRV_VERSION, sizeof(info->version)); |
1961 | strscpy(info->bus_info, dev_name(dev->dev.parent), |
1962 | sizeof(info->bus_info)); |
1963 | } |
1964 | |
1965 | static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev) |
1966 | { |
1967 | struct smsc911x_data *pdata = netdev_priv(dev); |
1968 | return pdata->msg_enable; |
1969 | } |
1970 | |
1971 | static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) |
1972 | { |
1973 | struct smsc911x_data *pdata = netdev_priv(dev); |
1974 | pdata->msg_enable = level; |
1975 | } |
1976 | |
1977 | static int smsc911x_ethtool_getregslen(struct net_device *dev) |
1978 | { |
1979 | return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) * |
1980 | sizeof(u32); |
1981 | } |
1982 | |
1983 | static void |
1984 | smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs, |
1985 | void *buf) |
1986 | { |
1987 | struct smsc911x_data *pdata = netdev_priv(dev); |
1988 | struct phy_device *phy_dev = dev->phydev; |
1989 | unsigned long flags; |
1990 | unsigned int i; |
1991 | unsigned int j = 0; |
1992 | u32 *data = buf; |
1993 | |
1994 | regs->version = pdata->idrev; |
1995 | for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32))) |
1996 | data[j++] = smsc911x_reg_read(pdata, reg: i); |
1997 | |
1998 | for (i = MAC_CR; i <= WUCSR; i++) { |
1999 | spin_lock_irqsave(&pdata->mac_lock, flags); |
2000 | data[j++] = smsc911x_mac_read(pdata, offset: i); |
2001 | spin_unlock_irqrestore(lock: &pdata->mac_lock, flags); |
2002 | } |
2003 | |
2004 | for (i = 0; i <= 31; i++) |
2005 | data[j++] = smsc911x_mii_read(bus: phy_dev->mdio.bus, |
2006 | phyaddr: phy_dev->mdio.addr, regidx: i); |
2007 | } |
2008 | |
2009 | static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata) |
2010 | { |
2011 | unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG); |
2012 | temp &= ~GPIO_CFG_EEPR_EN_; |
2013 | smsc911x_reg_write(pdata, GPIO_CFG, val: temp); |
2014 | msleep(msecs: 1); |
2015 | } |
2016 | |
2017 | static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op) |
2018 | { |
2019 | int timeout = 100; |
2020 | u32 e2cmd; |
2021 | |
2022 | SMSC_TRACE(pdata, drv, "op 0x%08x" , op); |
2023 | if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) { |
2024 | SMSC_WARN(pdata, drv, "Busy at start" ); |
2025 | return -EBUSY; |
2026 | } |
2027 | |
2028 | e2cmd = op | E2P_CMD_EPC_BUSY_; |
2029 | smsc911x_reg_write(pdata, E2P_CMD, val: e2cmd); |
2030 | |
2031 | do { |
2032 | msleep(msecs: 1); |
2033 | e2cmd = smsc911x_reg_read(pdata, E2P_CMD); |
2034 | } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout)); |
2035 | |
2036 | if (!timeout) { |
2037 | SMSC_TRACE(pdata, drv, "TIMED OUT" ); |
2038 | return -EAGAIN; |
2039 | } |
2040 | |
2041 | if (e2cmd & E2P_CMD_EPC_TIMEOUT_) { |
2042 | SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation" ); |
2043 | return -EINVAL; |
2044 | } |
2045 | |
2046 | return 0; |
2047 | } |
2048 | |
2049 | static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata, |
2050 | u8 address, u8 *data) |
2051 | { |
2052 | u32 op = E2P_CMD_EPC_CMD_READ_ | address; |
2053 | int ret; |
2054 | |
2055 | SMSC_TRACE(pdata, drv, "address 0x%x" , address); |
2056 | ret = smsc911x_eeprom_send_cmd(pdata, op); |
2057 | |
2058 | if (!ret) |
2059 | data[address] = smsc911x_reg_read(pdata, E2P_DATA); |
2060 | |
2061 | return ret; |
2062 | } |
2063 | |
2064 | static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata, |
2065 | u8 address, u8 data) |
2066 | { |
2067 | u32 op = E2P_CMD_EPC_CMD_ERASE_ | address; |
2068 | int ret; |
2069 | |
2070 | SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x" , address, data); |
2071 | ret = smsc911x_eeprom_send_cmd(pdata, op); |
2072 | |
2073 | if (!ret) { |
2074 | op = E2P_CMD_EPC_CMD_WRITE_ | address; |
2075 | smsc911x_reg_write(pdata, E2P_DATA, val: (u32)data); |
2076 | |
2077 | /* Workaround for hardware read-after-write restriction */ |
2078 | smsc911x_reg_read(pdata, BYTE_TEST); |
2079 | |
2080 | ret = smsc911x_eeprom_send_cmd(pdata, op); |
2081 | } |
2082 | |
2083 | return ret; |
2084 | } |
2085 | |
2086 | static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev) |
2087 | { |
2088 | return SMSC911X_EEPROM_SIZE; |
2089 | } |
2090 | |
2091 | static int smsc911x_ethtool_get_eeprom(struct net_device *dev, |
2092 | struct ethtool_eeprom *eeprom, u8 *data) |
2093 | { |
2094 | struct smsc911x_data *pdata = netdev_priv(dev); |
2095 | u8 eeprom_data[SMSC911X_EEPROM_SIZE]; |
2096 | int len; |
2097 | int i; |
2098 | |
2099 | smsc911x_eeprom_enable_access(pdata); |
2100 | |
2101 | len = min(eeprom->len, SMSC911X_EEPROM_SIZE); |
2102 | for (i = 0; i < len; i++) { |
2103 | int ret = smsc911x_eeprom_read_location(pdata, address: i, data: eeprom_data); |
2104 | if (ret < 0) { |
2105 | eeprom->len = 0; |
2106 | return ret; |
2107 | } |
2108 | } |
2109 | |
2110 | memcpy(data, &eeprom_data[eeprom->offset], len); |
2111 | eeprom->len = len; |
2112 | return 0; |
2113 | } |
2114 | |
2115 | static int smsc911x_ethtool_set_eeprom(struct net_device *dev, |
2116 | struct ethtool_eeprom *eeprom, u8 *data) |
2117 | { |
2118 | int ret; |
2119 | struct smsc911x_data *pdata = netdev_priv(dev); |
2120 | |
2121 | smsc911x_eeprom_enable_access(pdata); |
2122 | smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_); |
2123 | ret = smsc911x_eeprom_write_location(pdata, address: eeprom->offset, data: *data); |
2124 | smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_); |
2125 | |
2126 | /* Single byte write, according to man page */ |
2127 | eeprom->len = 1; |
2128 | |
2129 | return ret; |
2130 | } |
2131 | |
2132 | static const struct ethtool_ops smsc911x_ethtool_ops = { |
2133 | .get_link = ethtool_op_get_link, |
2134 | .get_drvinfo = smsc911x_ethtool_getdrvinfo, |
2135 | .nway_reset = phy_ethtool_nway_reset, |
2136 | .get_msglevel = smsc911x_ethtool_getmsglevel, |
2137 | .set_msglevel = smsc911x_ethtool_setmsglevel, |
2138 | .get_regs_len = smsc911x_ethtool_getregslen, |
2139 | .get_regs = smsc911x_ethtool_getregs, |
2140 | .get_eeprom_len = smsc911x_ethtool_get_eeprom_len, |
2141 | .get_eeprom = smsc911x_ethtool_get_eeprom, |
2142 | .set_eeprom = smsc911x_ethtool_set_eeprom, |
2143 | .get_ts_info = ethtool_op_get_ts_info, |
2144 | .get_link_ksettings = phy_ethtool_get_link_ksettings, |
2145 | .set_link_ksettings = phy_ethtool_set_link_ksettings, |
2146 | }; |
2147 | |
2148 | static const struct net_device_ops smsc911x_netdev_ops = { |
2149 | .ndo_open = smsc911x_open, |
2150 | .ndo_stop = smsc911x_stop, |
2151 | .ndo_start_xmit = smsc911x_hard_start_xmit, |
2152 | .ndo_get_stats = smsc911x_get_stats, |
2153 | .ndo_set_rx_mode = smsc911x_set_multicast_list, |
2154 | .ndo_eth_ioctl = phy_do_ioctl_running, |
2155 | .ndo_validate_addr = eth_validate_addr, |
2156 | .ndo_set_mac_address = smsc911x_set_mac_address, |
2157 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2158 | .ndo_poll_controller = smsc911x_poll_controller, |
2159 | #endif |
2160 | }; |
2161 | |
2162 | /* copies the current mac address from hardware to dev->dev_addr */ |
2163 | static void smsc911x_read_mac_address(struct net_device *dev) |
2164 | { |
2165 | struct smsc911x_data *pdata = netdev_priv(dev); |
2166 | u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH); |
2167 | u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL); |
2168 | u8 addr[ETH_ALEN]; |
2169 | |
2170 | addr[0] = (u8)(mac_low32); |
2171 | addr[1] = (u8)(mac_low32 >> 8); |
2172 | addr[2] = (u8)(mac_low32 >> 16); |
2173 | addr[3] = (u8)(mac_low32 >> 24); |
2174 | addr[4] = (u8)(mac_high16); |
2175 | addr[5] = (u8)(mac_high16 >> 8); |
2176 | eth_hw_addr_set(dev, addr); |
2177 | } |
2178 | |
2179 | /* Initializing private device structures, only called from probe */ |
2180 | static int smsc911x_init(struct net_device *dev) |
2181 | { |
2182 | struct smsc911x_data *pdata = netdev_priv(dev); |
2183 | unsigned int byte_test, mask; |
2184 | unsigned int to = 100; |
2185 | |
2186 | SMSC_TRACE(pdata, probe, "Driver Parameters:" ); |
2187 | SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX" , |
2188 | (unsigned long)pdata->ioaddr); |
2189 | SMSC_TRACE(pdata, probe, "IRQ: %d" , dev->irq); |
2190 | SMSC_TRACE(pdata, probe, "PHY will be autodetected." ); |
2191 | |
2192 | spin_lock_init(&pdata->dev_lock); |
2193 | spin_lock_init(&pdata->mac_lock); |
2194 | |
2195 | if (pdata->ioaddr == NULL) { |
2196 | SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000" ); |
2197 | return -ENODEV; |
2198 | } |
2199 | |
2200 | /* |
2201 | * poll the READY bit in PMT_CTRL. Any other access to the device is |
2202 | * forbidden while this bit isn't set. Try for 100ms |
2203 | * |
2204 | * Note that this test is done before the WORD_SWAP register is |
2205 | * programmed. So in some configurations the READY bit is at 16 before |
2206 | * WORD_SWAP is written to. This issue is worked around by waiting |
2207 | * until either bit 0 or bit 16 gets set in PMT_CTRL. |
2208 | * |
2209 | * SMSC has confirmed that checking bit 16 (marked as reserved in |
2210 | * the datasheet) is fine since these bits "will either never be set |
2211 | * or can only go high after READY does (so also indicate the device |
2212 | * is ready)". |
2213 | */ |
2214 | |
2215 | mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_); |
2216 | while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to) |
2217 | udelay(1000); |
2218 | |
2219 | if (to == 0) { |
2220 | netdev_err(dev, format: "Device not READY in 100ms aborting\n" ); |
2221 | return -ENODEV; |
2222 | } |
2223 | |
2224 | /* Check byte ordering */ |
2225 | byte_test = smsc911x_reg_read(pdata, BYTE_TEST); |
2226 | SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X" , byte_test); |
2227 | if (byte_test == 0x43218765) { |
2228 | SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, " |
2229 | "applying WORD_SWAP" ); |
2230 | smsc911x_reg_write(pdata, WORD_SWAP, val: 0xffffffff); |
2231 | |
2232 | /* 1 dummy read of BYTE_TEST is needed after a write to |
2233 | * WORD_SWAP before its contents are valid */ |
2234 | byte_test = smsc911x_reg_read(pdata, BYTE_TEST); |
2235 | |
2236 | byte_test = smsc911x_reg_read(pdata, BYTE_TEST); |
2237 | } |
2238 | |
2239 | if (byte_test != 0x87654321) { |
2240 | SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X" , byte_test); |
2241 | if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) { |
2242 | SMSC_WARN(pdata, probe, |
2243 | "top 16 bits equal to bottom 16 bits" ); |
2244 | SMSC_TRACE(pdata, probe, |
2245 | "This may mean the chip is set " |
2246 | "for 32 bit while the bus is reading 16 bit" ); |
2247 | } |
2248 | return -ENODEV; |
2249 | } |
2250 | |
2251 | /* Default generation to zero (all workarounds apply) */ |
2252 | pdata->generation = 0; |
2253 | |
2254 | pdata->idrev = smsc911x_reg_read(pdata, ID_REV); |
2255 | switch (pdata->idrev & 0xFFFF0000) { |
2256 | case LAN9118: |
2257 | case LAN9117: |
2258 | case LAN9116: |
2259 | case LAN9115: |
2260 | case LAN89218: |
2261 | /* LAN911[5678] family */ |
2262 | pdata->generation = pdata->idrev & 0x0000FFFF; |
2263 | break; |
2264 | |
2265 | case LAN9218: |
2266 | case LAN9217: |
2267 | case LAN9216: |
2268 | case LAN9215: |
2269 | /* LAN921[5678] family */ |
2270 | pdata->generation = 3; |
2271 | break; |
2272 | |
2273 | case LAN9210: |
2274 | case LAN9211: |
2275 | case LAN9220: |
2276 | case LAN9221: |
2277 | case LAN9250: |
2278 | /* LAN9210/LAN9211/LAN9220/LAN9221/LAN9250 */ |
2279 | pdata->generation = 4; |
2280 | break; |
2281 | |
2282 | default: |
2283 | SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X" , |
2284 | pdata->idrev); |
2285 | return -ENODEV; |
2286 | } |
2287 | |
2288 | SMSC_TRACE(pdata, probe, |
2289 | "LAN911x identified, idrev: 0x%08X, generation: %d" , |
2290 | pdata->idrev, pdata->generation); |
2291 | |
2292 | if (pdata->generation == 0) |
2293 | SMSC_WARN(pdata, probe, |
2294 | "This driver is not intended for this chip revision" ); |
2295 | |
2296 | /* workaround for platforms without an eeprom, where the mac address |
2297 | * is stored elsewhere and set by the bootloader. This saves the |
2298 | * mac address before resetting the device */ |
2299 | if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) { |
2300 | spin_lock_irq(lock: &pdata->mac_lock); |
2301 | smsc911x_read_mac_address(dev); |
2302 | spin_unlock_irq(lock: &pdata->mac_lock); |
2303 | } |
2304 | |
2305 | /* Reset the LAN911x */ |
2306 | if (smsc911x_phy_reset(pdata) || smsc911x_soft_reset(pdata)) |
2307 | return -ENODEV; |
2308 | |
2309 | dev->flags |= IFF_MULTICAST; |
2310 | netif_napi_add_weight(dev, napi: &pdata->napi, poll: smsc911x_poll, |
2311 | SMSC_NAPI_WEIGHT); |
2312 | dev->netdev_ops = &smsc911x_netdev_ops; |
2313 | dev->ethtool_ops = &smsc911x_ethtool_ops; |
2314 | |
2315 | return 0; |
2316 | } |
2317 | |
2318 | static void smsc911x_drv_remove(struct platform_device *pdev) |
2319 | { |
2320 | struct net_device *dev; |
2321 | struct smsc911x_data *pdata; |
2322 | struct resource *res; |
2323 | |
2324 | dev = platform_get_drvdata(pdev); |
2325 | BUG_ON(!dev); |
2326 | pdata = netdev_priv(dev); |
2327 | BUG_ON(!pdata); |
2328 | BUG_ON(!pdata->ioaddr); |
2329 | |
2330 | SMSC_TRACE(pdata, ifdown, "Stopping driver" ); |
2331 | |
2332 | unregister_netdev(dev); |
2333 | |
2334 | mdiobus_unregister(bus: pdata->mii_bus); |
2335 | mdiobus_free(bus: pdata->mii_bus); |
2336 | |
2337 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
2338 | "smsc911x-memory" ); |
2339 | if (!res) |
2340 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2341 | |
2342 | release_mem_region(res->start, resource_size(res)); |
2343 | |
2344 | iounmap(addr: pdata->ioaddr); |
2345 | |
2346 | (void)smsc911x_disable_resources(pdev); |
2347 | smsc911x_free_resources(pdev); |
2348 | |
2349 | free_netdev(dev); |
2350 | |
2351 | pm_runtime_disable(dev: &pdev->dev); |
2352 | } |
2353 | |
2354 | /* standard register acces */ |
2355 | static const struct smsc911x_ops standard_smsc911x_ops = { |
2356 | .reg_read = __smsc911x_reg_read, |
2357 | .reg_write = __smsc911x_reg_write, |
2358 | .rx_readfifo = smsc911x_rx_readfifo, |
2359 | .tx_writefifo = smsc911x_tx_writefifo, |
2360 | }; |
2361 | |
2362 | /* shifted register access */ |
2363 | static const struct smsc911x_ops shifted_smsc911x_ops = { |
2364 | .reg_read = __smsc911x_reg_read_shift, |
2365 | .reg_write = __smsc911x_reg_write_shift, |
2366 | .rx_readfifo = smsc911x_rx_readfifo_shift, |
2367 | .tx_writefifo = smsc911x_tx_writefifo_shift, |
2368 | }; |
2369 | |
2370 | static int smsc911x_probe_config(struct smsc911x_platform_config *config, |
2371 | struct device *dev) |
2372 | { |
2373 | int phy_interface; |
2374 | u32 width = 0; |
2375 | int err; |
2376 | |
2377 | phy_interface = device_get_phy_mode(dev); |
2378 | if (phy_interface < 0) |
2379 | phy_interface = PHY_INTERFACE_MODE_NA; |
2380 | config->phy_interface = phy_interface; |
2381 | |
2382 | device_get_mac_address(dev, addr: config->mac); |
2383 | |
2384 | err = device_property_read_u32(dev, propname: "reg-io-width" , val: &width); |
2385 | if (err == -ENXIO) |
2386 | return err; |
2387 | if (!err && width == 4) |
2388 | config->flags |= SMSC911X_USE_32BIT; |
2389 | else |
2390 | config->flags |= SMSC911X_USE_16BIT; |
2391 | |
2392 | device_property_read_u32(dev, propname: "reg-shift" , val: &config->shift); |
2393 | |
2394 | if (device_property_present(dev, propname: "smsc,irq-active-high" )) |
2395 | config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH; |
2396 | |
2397 | if (device_property_present(dev, propname: "smsc,irq-push-pull" )) |
2398 | config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL; |
2399 | |
2400 | if (device_property_present(dev, propname: "smsc,force-internal-phy" )) |
2401 | config->flags |= SMSC911X_FORCE_INTERNAL_PHY; |
2402 | |
2403 | if (device_property_present(dev, propname: "smsc,force-external-phy" )) |
2404 | config->flags |= SMSC911X_FORCE_EXTERNAL_PHY; |
2405 | |
2406 | if (device_property_present(dev, propname: "smsc,save-mac-address" )) |
2407 | config->flags |= SMSC911X_SAVE_MAC_ADDRESS; |
2408 | |
2409 | return 0; |
2410 | } |
2411 | |
2412 | static int smsc911x_drv_probe(struct platform_device *pdev) |
2413 | { |
2414 | struct net_device *dev; |
2415 | struct smsc911x_data *pdata; |
2416 | struct smsc911x_platform_config *config = dev_get_platdata(dev: &pdev->dev); |
2417 | struct resource *res; |
2418 | int res_size, irq; |
2419 | int retval; |
2420 | |
2421 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
2422 | "smsc911x-memory" ); |
2423 | if (!res) |
2424 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2425 | if (!res) { |
2426 | pr_warn("Could not allocate resource\n" ); |
2427 | retval = -ENODEV; |
2428 | goto out_0; |
2429 | } |
2430 | res_size = resource_size(res); |
2431 | |
2432 | irq = platform_get_irq(pdev, 0); |
2433 | if (irq == -EPROBE_DEFER) { |
2434 | retval = -EPROBE_DEFER; |
2435 | goto out_0; |
2436 | } else if (irq < 0) { |
2437 | pr_warn("Could not allocate irq resource\n" ); |
2438 | retval = -ENODEV; |
2439 | goto out_0; |
2440 | } |
2441 | |
2442 | if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) { |
2443 | retval = -EBUSY; |
2444 | goto out_0; |
2445 | } |
2446 | |
2447 | dev = alloc_etherdev(sizeof(struct smsc911x_data)); |
2448 | if (!dev) { |
2449 | retval = -ENOMEM; |
2450 | goto out_release_io_1; |
2451 | } |
2452 | |
2453 | SET_NETDEV_DEV(dev, &pdev->dev); |
2454 | |
2455 | pdata = netdev_priv(dev); |
2456 | dev->irq = irq; |
2457 | pdata->ioaddr = ioremap(offset: res->start, size: res_size); |
2458 | if (!pdata->ioaddr) { |
2459 | retval = -ENOMEM; |
2460 | goto out_ioremap_fail; |
2461 | } |
2462 | |
2463 | pdata->dev = dev; |
2464 | pdata->msg_enable = ((1 << debug) - 1); |
2465 | |
2466 | platform_set_drvdata(pdev, data: dev); |
2467 | |
2468 | retval = smsc911x_request_resources(pdev); |
2469 | if (retval) |
2470 | goto out_request_resources_fail; |
2471 | |
2472 | retval = smsc911x_enable_resources(pdev); |
2473 | if (retval) |
2474 | goto out_enable_resources_fail; |
2475 | |
2476 | if (pdata->ioaddr == NULL) { |
2477 | SMSC_WARN(pdata, probe, "Error smsc911x base address invalid" ); |
2478 | retval = -ENOMEM; |
2479 | goto out_disable_resources; |
2480 | } |
2481 | |
2482 | retval = smsc911x_probe_config(config: &pdata->config, dev: &pdev->dev); |
2483 | if (retval && config) { |
2484 | /* copy config parameters across to pdata */ |
2485 | memcpy(&pdata->config, config, sizeof(pdata->config)); |
2486 | retval = 0; |
2487 | } |
2488 | |
2489 | if (retval) { |
2490 | SMSC_WARN(pdata, probe, "Error smsc911x config not found" ); |
2491 | goto out_disable_resources; |
2492 | } |
2493 | |
2494 | /* assume standard, non-shifted, access to HW registers */ |
2495 | pdata->ops = &standard_smsc911x_ops; |
2496 | /* apply the right access if shifting is needed */ |
2497 | if (pdata->config.shift) |
2498 | pdata->ops = &shifted_smsc911x_ops; |
2499 | |
2500 | pm_runtime_enable(dev: &pdev->dev); |
2501 | pm_runtime_get_sync(dev: &pdev->dev); |
2502 | |
2503 | retval = smsc911x_init(dev); |
2504 | if (retval < 0) |
2505 | goto out_init_fail; |
2506 | |
2507 | netif_carrier_off(dev); |
2508 | |
2509 | retval = smsc911x_mii_init(pdev, dev); |
2510 | if (retval) { |
2511 | SMSC_WARN(pdata, probe, "Error %i initialising mii" , retval); |
2512 | goto out_init_fail; |
2513 | } |
2514 | |
2515 | retval = register_netdev(dev); |
2516 | if (retval) { |
2517 | SMSC_WARN(pdata, probe, "Error %i registering device" , retval); |
2518 | goto out_init_fail; |
2519 | } else { |
2520 | SMSC_TRACE(pdata, probe, |
2521 | "Network interface: \"%s\"" , dev->name); |
2522 | } |
2523 | |
2524 | spin_lock_irq(lock: &pdata->mac_lock); |
2525 | |
2526 | /* Check if mac address has been specified when bringing interface up */ |
2527 | if (is_valid_ether_addr(addr: dev->dev_addr)) { |
2528 | smsc911x_set_hw_mac_address(pdata, dev_addr: dev->dev_addr); |
2529 | SMSC_TRACE(pdata, probe, |
2530 | "MAC Address is specified by configuration" ); |
2531 | } else if (is_valid_ether_addr(addr: pdata->config.mac)) { |
2532 | eth_hw_addr_set(dev, addr: pdata->config.mac); |
2533 | SMSC_TRACE(pdata, probe, |
2534 | "MAC Address specified by platform data" ); |
2535 | } else { |
2536 | /* Try reading mac address from device. if EEPROM is present |
2537 | * it will already have been set */ |
2538 | smsc_get_mac(dev); |
2539 | |
2540 | if (is_valid_ether_addr(addr: dev->dev_addr)) { |
2541 | /* eeprom values are valid so use them */ |
2542 | SMSC_TRACE(pdata, probe, |
2543 | "Mac Address is read from LAN911x EEPROM" ); |
2544 | } else { |
2545 | /* eeprom values are invalid, generate random MAC */ |
2546 | eth_hw_addr_random(dev); |
2547 | smsc911x_set_hw_mac_address(pdata, dev_addr: dev->dev_addr); |
2548 | SMSC_TRACE(pdata, probe, |
2549 | "MAC Address is set to eth_random_addr" ); |
2550 | } |
2551 | } |
2552 | |
2553 | spin_unlock_irq(lock: &pdata->mac_lock); |
2554 | pm_runtime_put(dev: &pdev->dev); |
2555 | |
2556 | netdev_info(dev, format: "MAC Address: %pM\n" , dev->dev_addr); |
2557 | |
2558 | return 0; |
2559 | |
2560 | out_init_fail: |
2561 | pm_runtime_put(dev: &pdev->dev); |
2562 | pm_runtime_disable(dev: &pdev->dev); |
2563 | out_disable_resources: |
2564 | (void)smsc911x_disable_resources(pdev); |
2565 | out_enable_resources_fail: |
2566 | smsc911x_free_resources(pdev); |
2567 | out_request_resources_fail: |
2568 | iounmap(addr: pdata->ioaddr); |
2569 | out_ioremap_fail: |
2570 | free_netdev(dev); |
2571 | out_release_io_1: |
2572 | release_mem_region(res->start, resource_size(res)); |
2573 | out_0: |
2574 | return retval; |
2575 | } |
2576 | |
2577 | #ifdef CONFIG_PM |
2578 | /* This implementation assumes the devices remains powered on its VDDVARIO |
2579 | * pins during suspend. */ |
2580 | |
2581 | /* TODO: implement freeze/thaw callbacks for hibernation.*/ |
2582 | |
2583 | static int smsc911x_suspend(struct device *dev) |
2584 | { |
2585 | struct net_device *ndev = dev_get_drvdata(dev); |
2586 | struct smsc911x_data *pdata = netdev_priv(dev: ndev); |
2587 | |
2588 | if (netif_running(dev: ndev)) { |
2589 | netif_stop_queue(dev: ndev); |
2590 | netif_device_detach(dev: ndev); |
2591 | if (!device_may_wakeup(dev)) |
2592 | phy_stop(phydev: ndev->phydev); |
2593 | } |
2594 | |
2595 | /* enable wake on LAN, energy detection and the external PME |
2596 | * signal. */ |
2597 | smsc911x_reg_write(pdata, PMT_CTRL, |
2598 | PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ | |
2599 | PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_); |
2600 | |
2601 | pm_runtime_disable(dev); |
2602 | pm_runtime_set_suspended(dev); |
2603 | |
2604 | return 0; |
2605 | } |
2606 | |
2607 | static int smsc911x_resume(struct device *dev) |
2608 | { |
2609 | struct net_device *ndev = dev_get_drvdata(dev); |
2610 | struct smsc911x_data *pdata = netdev_priv(dev: ndev); |
2611 | unsigned int to = 100; |
2612 | |
2613 | pm_runtime_enable(dev); |
2614 | pm_runtime_resume(dev); |
2615 | |
2616 | /* Note 3.11 from the datasheet: |
2617 | * "When the LAN9220 is in a power saving state, a write of any |
2618 | * data to the BYTE_TEST register will wake-up the device." |
2619 | */ |
2620 | smsc911x_reg_write(pdata, BYTE_TEST, val: 0); |
2621 | |
2622 | /* poll the READY bit in PMT_CTRL. Any other access to the device is |
2623 | * forbidden while this bit isn't set. Try for 100ms and return -EIO |
2624 | * if it failed. */ |
2625 | while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to) |
2626 | udelay(1000); |
2627 | |
2628 | if (to == 0) |
2629 | return -EIO; |
2630 | |
2631 | if (netif_running(dev: ndev)) { |
2632 | netif_device_attach(dev: ndev); |
2633 | netif_start_queue(dev: ndev); |
2634 | if (!device_may_wakeup(dev)) |
2635 | phy_start(phydev: ndev->phydev); |
2636 | } |
2637 | |
2638 | return 0; |
2639 | } |
2640 | |
2641 | static const struct dev_pm_ops smsc911x_pm_ops = { |
2642 | .suspend = smsc911x_suspend, |
2643 | .resume = smsc911x_resume, |
2644 | }; |
2645 | |
2646 | #define SMSC911X_PM_OPS (&smsc911x_pm_ops) |
2647 | |
2648 | #else |
2649 | #define SMSC911X_PM_OPS NULL |
2650 | #endif |
2651 | |
2652 | #ifdef CONFIG_OF |
2653 | static const struct of_device_id smsc911x_dt_ids[] = { |
2654 | { .compatible = "smsc,lan9115" , }, |
2655 | { /* sentinel */ } |
2656 | }; |
2657 | MODULE_DEVICE_TABLE(of, smsc911x_dt_ids); |
2658 | #endif |
2659 | |
2660 | #ifdef CONFIG_ACPI |
2661 | static const struct acpi_device_id smsc911x_acpi_match[] = { |
2662 | { "ARMH9118" , 0 }, |
2663 | { } |
2664 | }; |
2665 | MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match); |
2666 | #endif |
2667 | |
2668 | static struct platform_driver smsc911x_driver = { |
2669 | .probe = smsc911x_drv_probe, |
2670 | .remove_new = smsc911x_drv_remove, |
2671 | .driver = { |
2672 | .name = SMSC_CHIPNAME, |
2673 | .pm = SMSC911X_PM_OPS, |
2674 | .of_match_table = of_match_ptr(smsc911x_dt_ids), |
2675 | .acpi_match_table = ACPI_PTR(smsc911x_acpi_match), |
2676 | }, |
2677 | }; |
2678 | |
2679 | /* Entry point for loading the module */ |
2680 | static int __init smsc911x_init_module(void) |
2681 | { |
2682 | SMSC_INITIALIZE(); |
2683 | return platform_driver_register(&smsc911x_driver); |
2684 | } |
2685 | |
2686 | /* entry point for unloading the module */ |
2687 | static void __exit smsc911x_cleanup_module(void) |
2688 | { |
2689 | platform_driver_unregister(&smsc911x_driver); |
2690 | } |
2691 | |
2692 | module_init(smsc911x_init_module); |
2693 | module_exit(smsc911x_cleanup_module); |
2694 | |